Add iomux configuration api.

Signed-off-by: Peng Fan <peng....@nxp.com>
---
 arch/arm/include/asm/arch-imx8/iomux.h | 40 +++++++++++++++++++++++++++++++
 arch/arm/mach-imx/imx8/Makefile        |  2 +-
 arch/arm/mach-imx/imx8/iomux.c         | 43 ++++++++++++++++++++++++++++++++++
 3 files changed, 84 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/include/asm/arch-imx8/iomux.h
 create mode 100644 arch/arm/mach-imx/imx8/iomux.c

diff --git a/arch/arm/include/asm/arch-imx8/iomux.h 
b/arch/arm/include/asm/arch-imx8/iomux.h
new file mode 100644
index 0000000000..bedd01bfd8
--- /dev/null
+++ b/arch/arm/include/asm/arch-imx8/iomux.h
@@ -0,0 +1,40 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2018 NXP
+ */
+
+#ifndef __ASM_ARCH_IMX8_IOMUX_H__
+#define __ASM_ARCH_IMX8_IOMUX_H__
+
+/*
+ * We use 64bits value for iomux settings.
+ * High 32bits are used for padring register value,
+ * low 16bits are used for pin index.
+ */
+typedef u64 iomux_cfg_t;
+
+#define PADRING_IFMUX_EN_SHIFT         31
+#define PADRING_IFMUX_EN_MASK          BIT(31)
+#define PADRING_GP_EN_SHIFT            30
+#define PADRING_GP_EN_MASK             BIT(30)
+#define PADRING_IFMUX_SHIFT            27
+#define PADRING_IFMUX_MASK             GENMASK(29, 27)
+#define PADRING_CONFIG_SHIFT           25
+#define PADRING_LPCONFIG_SHIFT         23
+#define PADRING_PULL_SHIFT             5
+#define PADRING_DSE_SHIFT              0
+
+#define MUX_PAD_CTRL_SHIFT     32
+#define MUX_PAD_CTRL_MASK      ((iomux_cfg_t)0xFFFFFFFF << MUX_PAD_CTRL_SHIFT)
+#define MUX_PAD_CTRL(x)                ((iomux_cfg_t)(x) << MUX_PAD_CTRL_SHIFT)
+#define MUX_MODE_SHIFT         (PADRING_IFMUX_SHIFT + MUX_PAD_CTRL_SHIFT)
+#define MUX_MODE_MASK          ((iomux_cfg_t)0x7 << MUX_MODE_SHIFT)
+#define PIN_ID_MASK            ((iomux_cfg_t)0xFFFF)
+
+/* Valid mux alt0 to alt7 */
+#define MUX_MODE_ALT(x)                (((iomux_cfg_t)(x) << MUX_MODE_SHIFT) & 
\
+                                MUX_MODE_MASK)
+
+void imx8_iomux_setup_pad(iomux_cfg_t pad);
+void imx8_iomux_setup_multiple_pads(iomux_cfg_t const *pad_list, u32 count);
+#endif /* __ASM_ARCH_IMX8_IOMUX_H__ */
diff --git a/arch/arm/mach-imx/imx8/Makefile b/arch/arm/mach-imx/imx8/Makefile
index 57876139a1..31ad169ccf 100644
--- a/arch/arm/mach-imx/imx8/Makefile
+++ b/arch/arm/mach-imx/imx8/Makefile
@@ -4,4 +4,4 @@
 # SPDX-License-Identifier:     GPL-2.0+
 #
 
-obj-y += cpu.o
+obj-y += cpu.o iomux.o
diff --git a/arch/arm/mach-imx/imx8/iomux.c b/arch/arm/mach-imx/imx8/iomux.c
new file mode 100644
index 0000000000..0ade85fb8f
--- /dev/null
+++ b/arch/arm/mach-imx/imx8/iomux.c
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018 NXP
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/iomux.h>
+#include <asm/arch/sci/sci.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * configures a single pad in the iomuxer
+ */
+void imx8_iomux_setup_pad(iomux_cfg_t pad)
+{
+       sc_pad_t pin_id = pad & PIN_ID_MASK;
+       int ret;
+
+       u32 val = (u32)((pad & MUX_PAD_CTRL_MASK) >> MUX_PAD_CTRL_SHIFT);
+
+       val |= PADRING_IFMUX_EN_MASK;
+       val |= PADRING_GP_EN_MASK;
+
+       ret = sc_pad_set(-1, pin_id, val);
+       if (ret)
+               printf("sc_pad_set failed!, pin: %u, val: 0x%x\n", pin_id, val);
+
+       debug("iomux: pin %d, val = 0x%x\n", pin_id, val);
+}
+
+/* configures a list of pads within declared with IOMUX_PADS macro */
+void imx8_iomux_setup_multiple_pads(iomux_cfg_t const *pad_list, u32 count)
+{
+       iomux_cfg_t const *p = pad_list;
+       int i;
+
+       for (i = 0; i < count; i++) {
+               imx8_iomux_setup_pad(*p);
+               p++;
+       }
+}
-- 
2.14.1

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