Re: [U-Boot] [PATCH V3 09/12] board:origen: Enable device tree on Origen

2014-02-25 Thread Minkyu Kang
On 25/02/14 23:33, Piotr Wilczek wrote:
> This patch enables to run Origen board on device tree.
> 
> Uart, DRAM and MMC init functions are removed as their
> generic replacements form the common board file are used.
> 
> The config file is modified to contain only board specific options.
> 
> Signed-off-by: Piotr Wilczek 
> Signed-off-by: Kyungmin Park 
> Cc: Chander Kashyap 
> Cc: Minkyu Kang 
> ---
> Changes for v3:
>  - dts file moved to arch/arm/dts
> 
> Changes for v2:
>  - no changes
> 
>  arch/arm/dts/Makefile  |   2 +
>  arch/arm/dts/exynos4210-origen.dts |  45 ++
>  board/samsung/origen/origen.c  | 112 +++
>  include/configs/origen.h   | 117 
> +
>  4 files changed, 96 insertions(+), 180 deletions(-)
>  create mode 100644 arch/arm/dts/exynos4210-origen.dts
> 
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 2658911..7abca75 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -1,3 +1,5 @@
> +dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb
> +
>  dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
>   exynos5250-snow.dtb \
>   exynos5250-smdk5250.dtb \
> diff --git a/arch/arm/dts/exynos4210-origen.dts 
> b/arch/arm/dts/exynos4210-origen.dts
> new file mode 100644
> index 000..5c9d2ae
> --- /dev/null
> +++ b/arch/arm/dts/exynos4210-origen.dts
> @@ -0,0 +1,45 @@
> +/*
> + * Samsung's Exynos4210 based Origen board device tree source
> + *
> + * Copyright (c) 2014 Samsung Electronics Co., Ltd.
> + *   http://www.samsung.com
> + *
> + * SPDX-License-Identifier:  GPL-2.0+
> + */
> +
> +/dts-v1/;
> +/include/ "skeleton.dtsi"
> +/include/ "exynos4.dtsi"
> +
> +/ {
> + model = "Insignal Origen evaluation board based on Exynos4210";
> + compatible = "insignal,origen", "samsung,exynos4210";
> +
> + chosen {
> + bootargs ="";
> + };
> +
> + aliases {
> + serial0 = "/serial@1380";
> + console = "/serial@1382";
> + mmc2 = "sdhci@1253";
> + };
> +
> + sdhci@1251 {
> + status = "disabled";
> + };
> +
> + sdhci@1252 {
> + status = "disabled";
> + };
> +
> + sdhci@1253 {
> + samsung,bus-width = <4>;
> + samsung,timing = <1 2 3>;
> + cd-gpios = <&gpio 0x2008002 0>;
> + };
> +
> + sdhci@1254 {
> + status = "disabled";
> + };
> +};
> \ No newline at end of file
> diff --git a/board/samsung/origen/origen.c b/board/samsung/origen/origen.c
> index 15f77ca..d502f02 100644
> --- a/board/samsung/origen/origen.c
> +++ b/board/samsung/origen/origen.c
> @@ -11,129 +11,35 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  
>  DECLARE_GLOBAL_DATA_PTR;
> -struct exynos4_gpio_part1 *gpio1;
> -struct exynos4_gpio_part2 *gpio2;
>  
> -int board_init(void)
> +u32 get_board_rev(void)
>  {
> - gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE;
> - gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE;
> -
> - gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
>   return 0;
>  }
>  
> -static int board_uart_init(void)
> +int exynos_init(void)
>  {
> - int err;
> -
> - err = exynos_pinmux_config(PERIPH_ID_UART0, PINMUX_FLAG_NONE);
> - if (err) {
> - debug("UART0 not configured\n");
> - return err;
> - }
> -
> - err = exynos_pinmux_config(PERIPH_ID_UART1, PINMUX_FLAG_NONE);
> - if (err) {
> - debug("UART1 not configured\n");
> - return err;
> - }
> -
> - err = exynos_pinmux_config(PERIPH_ID_UART2, PINMUX_FLAG_NONE);
> - if (err) {
> - debug("UART2 not configured\n");
> - return err;
> - }
> -
> - err = exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
> - if (err) {
> - debug("UART3 not configured\n");
> - return err;
> - }
> -
>   return 0;
>  }
>  
> -#ifdef CONFIG_BOARD_EARLY_INIT_F
> -int board_early_init_f(void)
> -{
> - int err;
> - err = board_uart_init();
> - if (err) {
> - debug("UART init failed\n");
> - return err;
> - }
> - return err;
> -}
> -#endif
> -
> -int dram_init(void)
> +int board_usb_init(int index, enum usb_init_type init)
>  {
> - gd->ram_size= get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE)
> - + get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE)
> - + get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE)
> - + get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
> -
>   return 0;
>  }
>  
> -void dram_init_banksize(void)
> -{
> - gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
> - gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, \
> - PHYS_SDRAM_1_SIZE);
> - gd->bd-

[U-Boot] [PATCH V3 09/12] board:origen: Enable device tree on Origen

2014-02-25 Thread Piotr Wilczek
This patch enables to run Origen board on device tree.

Uart, DRAM and MMC init functions are removed as their
generic replacements form the common board file are used.

The config file is modified to contain only board specific options.

Signed-off-by: Piotr Wilczek 
Signed-off-by: Kyungmin Park 
Cc: Chander Kashyap 
Cc: Minkyu Kang 
---
Changes for v3:
 - dts file moved to arch/arm/dts

Changes for v2:
 - no changes

 arch/arm/dts/Makefile  |   2 +
 arch/arm/dts/exynos4210-origen.dts |  45 ++
 board/samsung/origen/origen.c  | 112 +++
 include/configs/origen.h   | 117 +
 4 files changed, 96 insertions(+), 180 deletions(-)
 create mode 100644 arch/arm/dts/exynos4210-origen.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 2658911..7abca75 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1,3 +1,5 @@
+dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb
+
 dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
exynos5250-snow.dtb \
exynos5250-smdk5250.dtb \
diff --git a/arch/arm/dts/exynos4210-origen.dts 
b/arch/arm/dts/exynos4210-origen.dts
new file mode 100644
index 000..5c9d2ae
--- /dev/null
+++ b/arch/arm/dts/exynos4210-origen.dts
@@ -0,0 +1,45 @@
+/*
+ * Samsung's Exynos4210 based Origen board device tree source
+ *
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/dts-v1/;
+/include/ "skeleton.dtsi"
+/include/ "exynos4.dtsi"
+
+/ {
+   model = "Insignal Origen evaluation board based on Exynos4210";
+   compatible = "insignal,origen", "samsung,exynos4210";
+
+   chosen {
+   bootargs ="";
+   };
+
+   aliases {
+   serial0 = "/serial@1380";
+   console = "/serial@1382";
+   mmc2 = "sdhci@1253";
+   };
+
+   sdhci@1251 {
+   status = "disabled";
+   };
+
+   sdhci@1252 {
+   status = "disabled";
+   };
+
+   sdhci@1253 {
+   samsung,bus-width = <4>;
+   samsung,timing = <1 2 3>;
+   cd-gpios = <&gpio 0x2008002 0>;
+   };
+
+   sdhci@1254 {
+   status = "disabled";
+   };
+};
\ No newline at end of file
diff --git a/board/samsung/origen/origen.c b/board/samsung/origen/origen.c
index 15f77ca..d502f02 100644
--- a/board/samsung/origen/origen.c
+++ b/board/samsung/origen/origen.c
@@ -11,129 +11,35 @@
 #include 
 #include 
 #include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
-struct exynos4_gpio_part1 *gpio1;
-struct exynos4_gpio_part2 *gpio2;
 
-int board_init(void)
+u32 get_board_rev(void)
 {
-   gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE;
-   gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE;
-
-   gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
return 0;
 }
 
-static int board_uart_init(void)
+int exynos_init(void)
 {
-   int err;
-
-   err = exynos_pinmux_config(PERIPH_ID_UART0, PINMUX_FLAG_NONE);
-   if (err) {
-   debug("UART0 not configured\n");
-   return err;
-   }
-
-   err = exynos_pinmux_config(PERIPH_ID_UART1, PINMUX_FLAG_NONE);
-   if (err) {
-   debug("UART1 not configured\n");
-   return err;
-   }
-
-   err = exynos_pinmux_config(PERIPH_ID_UART2, PINMUX_FLAG_NONE);
-   if (err) {
-   debug("UART2 not configured\n");
-   return err;
-   }
-
-   err = exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
-   if (err) {
-   debug("UART3 not configured\n");
-   return err;
-   }
-
return 0;
 }
 
-#ifdef CONFIG_BOARD_EARLY_INIT_F
-int board_early_init_f(void)
-{
-   int err;
-   err = board_uart_init();
-   if (err) {
-   debug("UART init failed\n");
-   return err;
-   }
-   return err;
-}
-#endif
-
-int dram_init(void)
+int board_usb_init(int index, enum usb_init_type init)
 {
-   gd->ram_size= get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE)
-   + get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE)
-   + get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE)
-   + get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
-
return 0;
 }
 
-void dram_init_banksize(void)
-{
-   gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-   gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, \
-   PHYS_SDRAM_1_SIZE);
-   gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
-   gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2, \
-   PHYS_SDRAM_2_SIZE);
-   gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
-   gd->bd->bi_dr