Re: [U-Boot] [PATCH V4 12/19] i2c: lpi2c: add lpi2c driver for i.MX7ULP

[Stefano Babic]

On 24/02/2017 04:56, Peng Fan wrote:
> Add lpi2c driver for i.MX7ULP.
> Need to enable the two options to use this driver:
> CONFIG_DM_I2C=y
> CONFIG_SYS_I2C_IMX_LPI2C=y
> 
> Signed-off-by: Peng Fan 
> Acked-by: Heiko Schocher 
> Cc: Stefano Babic 
> ---
> 

Fine with me - I have integrate your patches in my own tree (not yet
pushed). I will check Jagan's before sending my PR to Tom.

Regards,
Stefano


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[U-Boot] [PATCH V4 12/19] i2c: lpi2c: add lpi2c driver for i.MX7ULP

[Peng Fan]

Add lpi2c driver for i.MX7ULP.
Need to enable the two options to use this driver:
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_IMX_LPI2C=y

Signed-off-by: Peng Fan 
Acked-by: Heiko Schocher 
Cc: Stefano Babic 
---

I do not repost the whole patch set, only post the single lpi2c patch
in V4. Other patches are still valid in V3.

V4:
 Use SYS_I2C_IMX_LPI2C as the Kconfig entry
 Add Ack tag
V3:
 none
V2:
 none

 arch/arm/include/asm/arch-mx7ulp/imx_lpi2c.h | 520 +++
 drivers/i2c/Kconfig  |   6 +
 drivers/i2c/Makefile |   1 +
 drivers/i2c/imx_lpi2c.c  | 462 
 4 files changed, 989 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-mx7ulp/imx_lpi2c.h
 create mode 100644 drivers/i2c/imx_lpi2c.c

diff --git a/arch/arm/include/asm/arch-mx7ulp/imx_lpi2c.h 
b/arch/arm/include/asm/arch-mx7ulp/imx_lpi2c.h
new file mode 100644
index 000..f1b3113
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx7ulp/imx_lpi2c.h
@@ -0,0 +1,520 @@
+/*
+ * Copyright 2016 Freescale Semiconductors, Inc.
+ *
+ * I2CLP driver for i.MX
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ *
+ */
+#ifndef __IMX_LPI2C_H__
+#define __IMX_LPI2C_H__
+
+struct imx_lpi2c_bus {
+   int index;
+   ulong base;
+   ulong driver_data;
+   int speed;
+   struct i2c_pads_info *pads_info;
+   struct udevice *bus;
+};
+
+struct imx_lpi2c_reg {
+   u32 verid;
+   u32 param;
+   u8  reserved_0[8];
+   u32 mcr;
+   u32 msr;
+   u32 mier;
+   u32 mder;
+   u32 mcfgr0;
+   u32 mcfgr1;
+   u32 mcfgr2;
+   u32 mcfgr3;
+   u8  reserved_1[16];
+   u32 mdmr;
+   u8  reserved_2[4];
+   u32 mccr0;
+   u8  reserved_3[4];
+   u32 mccr1;
+   u8  reserved_4[4];
+   u32 mfcr;
+   u32 mfsr;
+   u32 mtdr;
+   u8  reserved_5[12];
+   u32 mrdr;
+   u8  reserved_6[156];
+   u32 scr;
+   u32 ssr;
+   u32 sier;
+   u32 sder;
+   u8  reserved_7[4];
+   u32 scfgr1;
+   u32 scfgr2;
+   u8  reserved_8[20];
+   u32 samr;
+   u8  reserved_9[12];
+   u32 sasr;
+   u32 star;
+   u8  reserved_10[8];
+   u32 stdr;
+   u8  reserved_11[12];
+   u32 srdr;
+};
+
+typedef enum lpi2c_status {
+   LPI2C_SUCESS = 0,
+   LPI2C_END_PACKET_ERR,
+   LPI2C_STOP_ERR,
+   LPI2C_NAK_ERR,
+   LPI2C_ARB_LOST_ERR,
+   LPI2C_FIFO_ERR,
+   LPI2C_PIN_LOW_TIMEOUT_ERR,
+   LPI2C_DATA_MATCH_ERR,
+   LPI2C_BUSY,
+   LPI2C_IDLE,
+   LPI2C_BIT_ERR,
+   LPI2C_NO_TRANS_PROG,
+   LPI2C_DMA_REQ_FAIL,
+} lpi2c_status_t;
+
+/* 
+   -- LPI2C Register Masks
+   
 */
+
+/*!
+ * @addtogroup LPI2C_Register_Masks LPI2C Register Masks
+ * @{
+ */
+
+/*! @name VERID - Version ID Register */
+#define LPI2C_VERID_FEATURE_MASK (0xU)
+#define LPI2C_VERID_FEATURE_SHIFT(0U)
+#define LPI2C_VERID_FEATURE(x)   (((uint32_t)(((uint32_t)(x)) 
<< LPI2C_VERID_FEATURE_SHIFT)) & LPI2C_VERID_FEATURE_MASK)
+#define LPI2C_VERID_MINOR_MASK   (0xFFU)
+#define LPI2C_VERID_MINOR_SHIFT  (16U)
+#define LPI2C_VERID_MINOR(x) (((uint32_t)(((uint32_t)(x)) 
<< LPI2C_VERID_MINOR_SHIFT)) & LPI2C_VERID_MINOR_MASK)
+#define LPI2C_VERID_MAJOR_MASK   (0xFF00U)
+#define LPI2C_VERID_MAJOR_SHIFT  (24U)
+#define LPI2C_VERID_MAJOR(x) (((uint32_t)(((uint32_t)(x)) 
<< LPI2C_VERID_MAJOR_SHIFT)) & LPI2C_VERID_MAJOR_MASK)
+
+/*! @name PARAM - Parameter Register */
+#define LPI2C_PARAM_MTXFIFO_MASK (0xFU)
+#define LPI2C_PARAM_MTXFIFO_SHIFT(0U)
+#define LPI2C_PARAM_MTXFIFO(x)   (((uint32_t)(((uint32_t)(x)) 
<< LPI2C_PARAM_MTXFIFO_SHIFT)) & LPI2C_PARAM_MTXFIFO_MASK)
+#define LPI2C_PARAM_MRXFIFO_MASK (0xF00U)
+#define LPI2C_PARAM_MRXFIFO_SHIFT(8U)
+#define LPI2C_PARAM_MRXFIFO(x)   (((uint32_t)(((uint32_t)(x)) 
<< LPI2C_PARAM_MRXFIFO_SHIFT)) & LPI2C_PARAM_MRXFIFO_MASK)
+
+/*! @name MCR - Master Control Register */
+#define LPI2C_MCR_MEN_MASK   (0x1U)
+#define LPI2C_MCR_MEN_SHIFT  (0U)
+#define LPI2C_MCR_MEN(x) (((uint32_t)(((uint32_t)(x)) 
<< LPI2C_MCR_MEN_SHIFT)) & LPI2C_MCR_MEN_MASK)
+#define LPI2C_MCR_RST_MASK   (0x2U)
+#define LPI2C_MCR_RST_SHIFT  (1U)
+#define LPI2C_MCR_RST(x) (((uint32_t)(((uint32_t)(x)) 
<< LPI2C_MCR_RST_SHIFT)) & LPI2C_MCR_RST_MASK)
+#define LPI2C_MCR_DOZEN_MASK (0x4U)
+#define LPI2C_MCR_DOZEN_SHIFT(2U)

[U-Boot] [PATCH V4 12/19] i2c: lpi2c: add lpi2c driver for i.MX7ULP

[Peng Fan]

Add lpi2c driver for i.MX7ULP.
Need to enable the two options to use this driver:
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_IMX_LPI2C=y

Signed-off-by: Peng Fan 
Acked-by: Heiko Schocher 
Cc: Stefano Babic 
---

I do not repost the whole patch set, only post the single lpi2c patch
in V4. Other patches are still valid in V3.

V4:
 Use SYS_I2C_IMX_LPI2C as the Kconfig entry
 Add Ack tag
V3:
 none
V2:
 none

 arch/arm/include/asm/arch-mx7ulp/imx_lpi2c.h | 520 +++
 drivers/i2c/Kconfig  |   6 +
 drivers/i2c/Makefile |   1 +
 drivers/i2c/imx_lpi2c.c  | 462 
 4 files changed, 989 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-mx7ulp/imx_lpi2c.h
 create mode 100644 drivers/i2c/imx_lpi2c.c

diff --git a/arch/arm/include/asm/arch-mx7ulp/imx_lpi2c.h 
b/arch/arm/include/asm/arch-mx7ulp/imx_lpi2c.h
new file mode 100644
index 000..f1b3113
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx7ulp/imx_lpi2c.h
@@ -0,0 +1,520 @@
+/*
+ * Copyright 2016 Freescale Semiconductors, Inc.
+ *
+ * I2CLP driver for i.MX
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ *
+ */
+#ifndef __IMX_LPI2C_H__
+#define __IMX_LPI2C_H__
+
+struct imx_lpi2c_bus {
+   int index;
+   ulong base;
+   ulong driver_data;
+   int speed;
+   struct i2c_pads_info *pads_info;
+   struct udevice *bus;
+};
+
+struct imx_lpi2c_reg {
+   u32 verid;
+   u32 param;
+   u8  reserved_0[8];
+   u32 mcr;
+   u32 msr;
+   u32 mier;
+   u32 mder;
+   u32 mcfgr0;
+   u32 mcfgr1;
+   u32 mcfgr2;
+   u32 mcfgr3;
+   u8  reserved_1[16];
+   u32 mdmr;
+   u8  reserved_2[4];
+   u32 mccr0;
+   u8  reserved_3[4];
+   u32 mccr1;
+   u8  reserved_4[4];
+   u32 mfcr;
+   u32 mfsr;
+   u32 mtdr;
+   u8  reserved_5[12];
+   u32 mrdr;
+   u8  reserved_6[156];
+   u32 scr;
+   u32 ssr;
+   u32 sier;
+   u32 sder;
+   u8  reserved_7[4];
+   u32 scfgr1;
+   u32 scfgr2;
+   u8  reserved_8[20];
+   u32 samr;
+   u8  reserved_9[12];
+   u32 sasr;
+   u32 star;
+   u8  reserved_10[8];
+   u32 stdr;
+   u8  reserved_11[12];
+   u32 srdr;
+};
+
+typedef enum lpi2c_status {
+   LPI2C_SUCESS = 0,
+   LPI2C_END_PACKET_ERR,
+   LPI2C_STOP_ERR,
+   LPI2C_NAK_ERR,
+   LPI2C_ARB_LOST_ERR,
+   LPI2C_FIFO_ERR,
+   LPI2C_PIN_LOW_TIMEOUT_ERR,
+   LPI2C_DATA_MATCH_ERR,
+   LPI2C_BUSY,
+   LPI2C_IDLE,
+   LPI2C_BIT_ERR,
+   LPI2C_NO_TRANS_PROG,
+   LPI2C_DMA_REQ_FAIL,
+} lpi2c_status_t;
+
+/* 
+   -- LPI2C Register Masks
+   
 */
+
+/*!
+ * @addtogroup LPI2C_Register_Masks LPI2C Register Masks
+ * @{
+ */
+
+/*! @name VERID - Version ID Register */
+#define LPI2C_VERID_FEATURE_MASK (0xU)
+#define LPI2C_VERID_FEATURE_SHIFT(0U)
+#define LPI2C_VERID_FEATURE(x)   (((uint32_t)(((uint32_t)(x)) 
<< LPI2C_VERID_FEATURE_SHIFT)) & LPI2C_VERID_FEATURE_MASK)
+#define LPI2C_VERID_MINOR_MASK   (0xFFU)
+#define LPI2C_VERID_MINOR_SHIFT  (16U)
+#define LPI2C_VERID_MINOR(x) (((uint32_t)(((uint32_t)(x)) 
<< LPI2C_VERID_MINOR_SHIFT)) & LPI2C_VERID_MINOR_MASK)
+#define LPI2C_VERID_MAJOR_MASK   (0xFF00U)
+#define LPI2C_VERID_MAJOR_SHIFT  (24U)
+#define LPI2C_VERID_MAJOR(x) (((uint32_t)(((uint32_t)(x)) 
<< LPI2C_VERID_MAJOR_SHIFT)) & LPI2C_VERID_MAJOR_MASK)
+
+/*! @name PARAM - Parameter Register */
+#define LPI2C_PARAM_MTXFIFO_MASK (0xFU)
+#define LPI2C_PARAM_MTXFIFO_SHIFT(0U)
+#define LPI2C_PARAM_MTXFIFO(x)   (((uint32_t)(((uint32_t)(x)) 
<< LPI2C_PARAM_MTXFIFO_SHIFT)) & LPI2C_PARAM_MTXFIFO_MASK)
+#define LPI2C_PARAM_MRXFIFO_MASK (0xF00U)
+#define LPI2C_PARAM_MRXFIFO_SHIFT(8U)
+#define LPI2C_PARAM_MRXFIFO(x)   (((uint32_t)(((uint32_t)(x)) 
<< LPI2C_PARAM_MRXFIFO_SHIFT)) & LPI2C_PARAM_MRXFIFO_MASK)
+
+/*! @name MCR - Master Control Register */
+#define LPI2C_MCR_MEN_MASK   (0x1U)
+#define LPI2C_MCR_MEN_SHIFT  (0U)
+#define LPI2C_MCR_MEN(x) (((uint32_t)(((uint32_t)(x)) 
<< LPI2C_MCR_MEN_SHIFT)) & LPI2C_MCR_MEN_MASK)
+#define LPI2C_MCR_RST_MASK   (0x2U)
+#define LPI2C_MCR_RST_SHIFT  (1U)
+#define LPI2C_MCR_RST(x) (((uint32_t)(((uint32_t)(x)) 
<< LPI2C_MCR_RST_SHIFT)) & LPI2C_MCR_RST_MASK)
+#define LPI2C_MCR_DOZEN_MASK (0x4U)
+#define LPI2C_MCR_DOZEN_SHIFT(2U)