subject:"\[U\-Boot\] \[PATCH v1 08\/18\] MIPS\: pic32\: Add driver for Microchip PIC32 flash controller."

Re: [U-Boot] [PATCH v1 08/18] MIPS: pic32: Add driver for Microchip PIC32 flash controller.

2016-01-08 Thread Stefan Roese


On 08.01.2016 14:53, Purna Chandra Mandal wrote:

On 12/21/2015 08:50 PM, Stefan Roese wrote:

On 21.12.2015 15:58, Daniel Schwierzeck wrote:



Am 17.12.2015 um 18:30 schrieb Purna Chandra Mandal:

From: Cristian Birsan 

Signed-off-by: Cristian Birsan 
Signed-off-by: Purna Chandra Mandal 
---

   arch/mips/mach-pic32/Makefile |   5 +-
   arch/mips/mach-pic32/flash.c  | 471 
++
   include/flash.h   |   5 +-
   3 files changed, 479 insertions(+), 2 deletions(-)
   create mode 100644 arch/mips/mach-pic32/flash.c



+cc Stefan Roese

have you tried to use drivers/mtd/cfi_flash.c? You are duplicating some
common code. If you need additional logic for your flash controller,
then you can try to overwrite the weak flash_readX/flash_writeX
accessors. You have to enable CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS to be
able to do this.


Yes, this really looks like it could use the common CFI flash driver.
You might need to add support for the new flash devices with the
commands, if its not already supported. But this should be better
than duplicating some of the code already available.


Thanks Stefan.

Tried to understand and map PIC32 flash driver on cfi_flash.c. It is not 
straight
forward and resultant code becomes clumsy, full of if-else.


Ughh. Thats definitely not something that we strive for.


Please note PIC32 flash is not CFI complaint. Specific operations
(like erase, and program) on the flash panel are handled by PIC32 nvm 
controller.
NVM controller documentation: 
http://ww1.microchip.com/downloads/en/DeviceDoc/60001193B.pdf

Instead I'll propose to improve current pic32_flash driver and move it to 
drivers/mtd/
(like st_smi.c).


Okay. Then please continue with this approach and lets see,
how the resulting code will be structured.

Thanks,
Stefan

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Re: [U-Boot] [PATCH v1 08/18] MIPS: pic32: Add driver for Microchip PIC32 flash controller.

2016-01-08 Thread Purna Chandra Mandal

On 12/21/2015 08:50 PM, Stefan Roese wrote:
> On 21.12.2015 15:58, Daniel Schwierzeck wrote:
>>
>>
>> Am 17.12.2015 um 18:30 schrieb Purna Chandra Mandal:
>>> From: Cristian Birsan 
>>>
>>> Signed-off-by: Cristian Birsan 
>>> Signed-off-by: Purna Chandra Mandal 
>>> ---
>>>
>>>   arch/mips/mach-pic32/Makefile |   5 +-
>>>   arch/mips/mach-pic32/flash.c  | 471 
>>> ++
>>>   include/flash.h   |   5 +-
>>>   3 files changed, 479 insertions(+), 2 deletions(-)
>>>   create mode 100644 arch/mips/mach-pic32/flash.c
>>>
>>
>> +cc Stefan Roese
>>
>> have you tried to use drivers/mtd/cfi_flash.c? You are duplicating some
>> common code. If you need additional logic for your flash controller,
>> then you can try to overwrite the weak flash_readX/flash_writeX
>> accessors. You have to enable CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS to be
>> able to do this.
>
> Yes, this really looks like it could use the common CFI flash driver.
> You might need to add support for the new flash devices with the
> commands, if its not already supported. But this should be better
> than duplicating some of the code already available.
>
Thanks Stefan.

Tried to understand and map PIC32 flash driver on cfi_flash.c. It is not 
straight
forward and resultant code becomes clumsy, full of if-else.

Please note PIC32 flash is not CFI complaint. Specific operations
(like erase, and program) on the flash panel are handled by PIC32 nvm 
controller.
NVM controller documentation: 
http://ww1.microchip.com/downloads/en/DeviceDoc/60001193B.pdf

Instead I'll propose to improve current pic32_flash driver and move it to 
drivers/mtd/
(like st_smi.c).

NVM controller: 

Thanks,
Purna

> So please take a deeper look at cfi_flash.c and try to integrate
> your flash support there.
>
> Thanks,
> Stefan
>
>>> diff --git a/arch/mips/mach-pic32/Makefile b/arch/mips/mach-pic32/Makefile
>>> index 03d5f27..3a621c3 100644
>>> --- a/arch/mips/mach-pic32/Makefile
>>> +++ b/arch/mips/mach-pic32/Makefile
>>> @@ -4,4 +4,7 @@
>>>   # SPDX-License-Identifier:  GPL-2.0+
>>>   #
>>>
>>> -obj-y = cpu.o reset.o lowlevel_init.o
>>> \ No newline at end of file
>>> +obj-y = cpu.o reset.o lowlevel_init.o
>>> +ifndef CONFIG_SYS_NO_FLASH
>>> +obj-y += flash.o
>>> +endif
>>> \ No newline at end of file
>>> diff --git a/arch/mips/mach-pic32/flash.c b/arch/mips/mach-pic32/flash.c
>>> new file mode 100644
>>> index 000..b3c1e0a
>>> --- /dev/null
>>> +++ b/arch/mips/mach-pic32/flash.c
>>> @@ -0,0 +1,471 @@
>>> +/*
>>> + * Copyright (C) 2015
>>> + * Cristian Birsan 
>>> + *
>>> + * SPDX-License-Identifier:GPL-2.0+
>>> + *
>>> + */
>>> +
>>> +#include 
>>> +#include 
>>> +#include 
>>> +#include 
>>> +#include 
>>> +
>>> +#if defined(CONFIG_ENV_IS_IN_FLASH)
>>> +#ifndef CONFIG_ENV_ADDR
>>> +#define CONFIG_ENV_ADDR(CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
>>> +#endif
>>> +
>>> +#ifndef CONFIG_ENV_SIZE
>>> +#define CONFIG_ENV_SIZECONFIG_ENV_SECT_SIZE
>>> +#endif
>>> +
>>> +#ifndef CONFIG_ENV_SECT_SIZE
>>> +#define CONFIG_ENV_SECT_SIZE  CONFIG_ENV_SIZE
>>> +#endif
>>> +#endif
>>> +
>>> +/* NVM Controller registers */
>>> +#define NVMCON(PIC32_NVM_BASE + 0x00)
>>> +#define NVMCONCLR(NVMCON + _CLR_OFFSET)
>>> +#define NVMCONSET(NVMCON + _SET_OFFSET)
>>> +#define NVMKEY(PIC32_NVM_BASE + 0x10)
>>> +#define NVMADDR(PIC32_NVM_BASE + 0x20)
>>> +#define NVMDATA0(PIC32_NVM_BASE + 0x30)
>>> +
>>> +/* NVM Operations */
>>> +#define NVMOP_NOP0x
>>> +#define NVMOP_WORD_WRITE0x0001
>>> +#define NVMOP_PAGE_ERASE0x0004
>>> +
>>> +/* NVM Programming Control Register*/
>>> +#define NVMCON_WREN0x4000
>>> +#define NVMCON_WR0x8000
>>> +#define NVMCON_WRERR0x2000
>>> +#define NVMCON_LVDERR0x1000
>>> +
>>> +/*---
>>> + */
>>> +flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
>>> +
>>> +/*
>>> + * The following code cannot be run from FLASH!
>>> + */
>>> +static ulong flash_get_size(vu_long *addr, flash_info_t *info)
>>> +{
>>> +short i;
>>> +ulong base = (ulong)addr;
>>> +ulong sector_offset;
>>> +
>>> +/* On chip flash ID */
>>> +switch (info->flash_id & FLASH_VENDMASK) {
>>> +case FLASH_MAN_MCHP:
>>> +break;
>>> +default:
>>> +/* no or unknown flash*/
>>> +printf("unknown manufacturer: 0x%lx\n",
>>> +   info->flash_id & FLASH_VENDMASK);
>>> +info->flash_id = FLASH_UNKNOWN;
>>> +info->sector_count = 0;
>>> +info->size = 0;
>>> +return 0;
>>> +}
>>> +
>>> +switch (info->flash_id & FLASH_TYPEMASK) {
>>> +case FLASH_MCHP100T:
>>> +info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
>>> +info->size = CONFIG_SYS_FLASH_SIZE;
>>>

Re: [U-Boot] [PATCH v1 08/18] MIPS: pic32: Add driver for Microchip PIC32 flash controller.

2015-12-21 Thread Daniel Schwierzeck



Am 17.12.2015 um 18:30 schrieb Purna Chandra Mandal:
> From: Cristian Birsan 
> 
> Signed-off-by: Cristian Birsan 
> Signed-off-by: Purna Chandra Mandal 
> ---
> 
>  arch/mips/mach-pic32/Makefile |   5 +-
>  arch/mips/mach-pic32/flash.c  | 471 
> ++
>  include/flash.h   |   5 +-
>  3 files changed, 479 insertions(+), 2 deletions(-)
>  create mode 100644 arch/mips/mach-pic32/flash.c
> 

+cc Stefan Roese

have you tried to use drivers/mtd/cfi_flash.c? You are duplicating some
common code. If you need additional logic for your flash controller,
then you can try to overwrite the weak flash_readX/flash_writeX
accessors. You have to enable CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS to be
able to do this.

> diff --git a/arch/mips/mach-pic32/Makefile b/arch/mips/mach-pic32/Makefile
> index 03d5f27..3a621c3 100644
> --- a/arch/mips/mach-pic32/Makefile
> +++ b/arch/mips/mach-pic32/Makefile
> @@ -4,4 +4,7 @@
>  # SPDX-License-Identifier:  GPL-2.0+
>  #
>  
> -obj-y = cpu.o reset.o lowlevel_init.o
> \ No newline at end of file
> +obj-y = cpu.o reset.o lowlevel_init.o
> +ifndef CONFIG_SYS_NO_FLASH
> +obj-y += flash.o
> +endif
> \ No newline at end of file
> diff --git a/arch/mips/mach-pic32/flash.c b/arch/mips/mach-pic32/flash.c
> new file mode 100644
> index 000..b3c1e0a
> --- /dev/null
> +++ b/arch/mips/mach-pic32/flash.c
> @@ -0,0 +1,471 @@
> +/*
> + * Copyright (C) 2015
> + * Cristian Birsan 
> + *
> + * SPDX-License-Identifier:GPL-2.0+
> + *
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#if defined(CONFIG_ENV_IS_IN_FLASH)
> +#ifndef CONFIG_ENV_ADDR
> +#define CONFIG_ENV_ADDR(CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
> +#endif
> +
> +#ifndef CONFIG_ENV_SIZE
> +#define CONFIG_ENV_SIZECONFIG_ENV_SECT_SIZE
> +#endif
> +
> +#ifndef CONFIG_ENV_SECT_SIZE
> +#define CONFIG_ENV_SECT_SIZE  CONFIG_ENV_SIZE
> +#endif
> +#endif
> +
> +/* NVM Controller registers */
> +#define NVMCON(PIC32_NVM_BASE + 0x00)
> +#define NVMCONCLR(NVMCON + _CLR_OFFSET)
> +#define NVMCONSET(NVMCON + _SET_OFFSET)
> +#define NVMKEY(PIC32_NVM_BASE + 0x10)
> +#define NVMADDR(PIC32_NVM_BASE + 0x20)
> +#define NVMDATA0(PIC32_NVM_BASE + 0x30)
> +
> +/* NVM Operations */
> +#define NVMOP_NOP0x
> +#define NVMOP_WORD_WRITE0x0001
> +#define NVMOP_PAGE_ERASE0x0004
> +
> +/* NVM Programming Control Register*/
> +#define NVMCON_WREN0x4000
> +#define NVMCON_WR0x8000
> +#define NVMCON_WRERR0x2000
> +#define NVMCON_LVDERR0x1000
> +
> +/*---
> + */
> +flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
> +
> +/*
> + * The following code cannot be run from FLASH!
> + */
> +static ulong flash_get_size(vu_long *addr, flash_info_t *info)
> +{
> +short i;
> +ulong base = (ulong)addr;
> +ulong sector_offset;
> +
> +/* On chip flash ID */
> +switch (info->flash_id & FLASH_VENDMASK) {
> +case FLASH_MAN_MCHP:
> +break;
> +default:
> +/* no or unknown flash*/
> +printf("unknown manufacturer: 0x%lx\n",
> +   info->flash_id & FLASH_VENDMASK);
> +info->flash_id = FLASH_UNKNOWN;
> +info->sector_count = 0;
> +info->size = 0;
> +return 0;
> +}
> +
> +switch (info->flash_id & FLASH_TYPEMASK) {
> +case FLASH_MCHP100T:
> +info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
> +info->size = CONFIG_SYS_FLASH_SIZE;
> +sector_offset = info->size / info->sector_count;
> +break;
> +default:
> +info->flash_id = FLASH_UNKNOWN;
> +return 0;/* => no or unknown flash */
> +}
> +
> +/* set up sector start address table */
> +for (i = 0; i < info->sector_count; i++) {
> +info->start[i] = base;
> +base += sector_offset;
> +/* protect each sector by default */
> +info->protect[i] = 1;
> +}
> +
> +/* Disable Flash Write/Erase operations */
> +writel(NVMCON_WREN, NVMCONCLR);
> +
> +if (info->flash_id != FLASH_UNKNOWN)
> +addr = (vu_long *)info->start[0];
> +
> +return info->size;
> +}
> +
> +/*---
> + */
> +void flash_print_info(flash_info_t *info)
> +{
> +int i;
> +
> +if (info->flash_id == FLASH_UNKNOWN) {
> +printf("missing or unknown FLASH type\n");
> +return;
> +}
> +
> +switch (info->flash_id & FLASH_VENDMASK) {
> +case FLASH_MAN_MCHP:
> +printf("Microchip ");
> +break;
> +default:
> +printf("Unknown Vendor ");
> +break;
> +}
> +
> +switch (info->flash_id & FLASH_TYPEMASK) {
> +case FLASH_MCHP100T:
> +

Re: [U-Boot] [PATCH v1 08/18] MIPS: pic32: Add driver for Microchip PIC32 flash controller.

2015-12-21 Thread Stefan Roese


On 21.12.2015 15:58, Daniel Schwierzeck wrote:



Am 17.12.2015 um 18:30 schrieb Purna Chandra Mandal:

From: Cristian Birsan 

Signed-off-by: Cristian Birsan 
Signed-off-by: Purna Chandra Mandal 
---

  arch/mips/mach-pic32/Makefile |   5 +-
  arch/mips/mach-pic32/flash.c  | 471 ++
  include/flash.h   |   5 +-
  3 files changed, 479 insertions(+), 2 deletions(-)
  create mode 100644 arch/mips/mach-pic32/flash.c



+cc Stefan Roese

have you tried to use drivers/mtd/cfi_flash.c? You are duplicating some
common code. If you need additional logic for your flash controller,
then you can try to overwrite the weak flash_readX/flash_writeX
accessors. You have to enable CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS to be
able to do this.


Yes, this really looks like it could use the common CFI flash driver.
You might need to add support for the new flash devices with the
commands, if its not already supported. But this should be better
than duplicating some of the code already available.

So please take a deeper look at cfi_flash.c and try to integrate
your flash support there.

Thanks,
Stefan


diff --git a/arch/mips/mach-pic32/Makefile b/arch/mips/mach-pic32/Makefile
index 03d5f27..3a621c3 100644
--- a/arch/mips/mach-pic32/Makefile
+++ b/arch/mips/mach-pic32/Makefile
@@ -4,4 +4,7 @@
  # SPDX-License-Identifier:  GPL-2.0+
  #

-obj-y = cpu.o reset.o lowlevel_init.o
\ No newline at end of file
+obj-y = cpu.o reset.o lowlevel_init.o
+ifndef CONFIG_SYS_NO_FLASH
+obj-y += flash.o
+endif
\ No newline at end of file
diff --git a/arch/mips/mach-pic32/flash.c b/arch/mips/mach-pic32/flash.c
new file mode 100644
index 000..b3c1e0a
--- /dev/null
+++ b/arch/mips/mach-pic32/flash.c
@@ -0,0 +1,471 @@
+/*
+ * Copyright (C) 2015
+ * Cristian Birsan 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#if defined(CONFIG_ENV_IS_IN_FLASH)
+#ifndef CONFIG_ENV_ADDR
+#define CONFIG_ENV_ADDR(CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
+#endif
+
+#ifndef CONFIG_ENV_SIZE
+#define CONFIG_ENV_SIZECONFIG_ENV_SECT_SIZE
+#endif
+
+#ifndef CONFIG_ENV_SECT_SIZE
+#define CONFIG_ENV_SECT_SIZE  CONFIG_ENV_SIZE
+#endif
+#endif
+
+/* NVM Controller registers */
+#define NVMCON(PIC32_NVM_BASE + 0x00)
+#define NVMCONCLR(NVMCON + _CLR_OFFSET)
+#define NVMCONSET(NVMCON + _SET_OFFSET)
+#define NVMKEY(PIC32_NVM_BASE + 0x10)
+#define NVMADDR(PIC32_NVM_BASE + 0x20)
+#define NVMDATA0(PIC32_NVM_BASE + 0x30)
+
+/* NVM Operations */
+#define NVMOP_NOP0x
+#define NVMOP_WORD_WRITE0x0001
+#define NVMOP_PAGE_ERASE0x0004
+
+/* NVM Programming Control Register*/
+#define NVMCON_WREN0x4000
+#define NVMCON_WR0x8000
+#define NVMCON_WRERR0x2000
+#define NVMCON_LVDERR0x1000
+
+/*---
+ */
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
+
+/*
+ * The following code cannot be run from FLASH!
+ */
+static ulong flash_get_size(vu_long *addr, flash_info_t *info)
+{
+short i;
+ulong base = (ulong)addr;
+ulong sector_offset;
+
+/* On chip flash ID */
+switch (info->flash_id & FLASH_VENDMASK) {
+case FLASH_MAN_MCHP:
+break;
+default:
+/* no or unknown flash*/
+printf("unknown manufacturer: 0x%lx\n",
+   info->flash_id & FLASH_VENDMASK);
+info->flash_id = FLASH_UNKNOWN;
+info->sector_count = 0;
+info->size = 0;
+return 0;
+}
+
+switch (info->flash_id & FLASH_TYPEMASK) {
+case FLASH_MCHP100T:
+info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
+info->size = CONFIG_SYS_FLASH_SIZE;
+sector_offset = info->size / info->sector_count;
+break;
+default:
+info->flash_id = FLASH_UNKNOWN;
+return 0;/* => no or unknown flash */
+}
+
+/* set up sector start address table */
+for (i = 0; i < info->sector_count; i++) {
+info->start[i] = base;
+base += sector_offset;
+/* protect each sector by default */
+info->protect[i] = 1;
+}
+
+/* Disable Flash Write/Erase operations */
+writel(NVMCON_WREN, NVMCONCLR);
+
+if (info->flash_id != FLASH_UNKNOWN)
+addr = (vu_long *)info->start[0];
+
+return info->size;
+}
+
+/*---
+ */
+void flash_print_info(flash_info_t *info)
+{
+int i;
+
+if (info->flash_id == FLASH_UNKNOWN) {
+printf("missing or unknown FLASH type\n");
+return;
+}
+
+switch (info->flash_id & FLASH_VENDMASK) {
+case FLASH_MAN_MCHP:
+printf("Microchip ");
+break;
+default:
+printf("Unknown Vendor ");
+

[U-Boot] [PATCH v1 08/18] MIPS: pic32: Add driver for Microchip PIC32 flash controller.

2015-12-17 Thread Purna Chandra Mandal

From: Cristian Birsan 

Signed-off-by: Cristian Birsan 
Signed-off-by: Purna Chandra Mandal 
---

 arch/mips/mach-pic32/Makefile |   5 +-
 arch/mips/mach-pic32/flash.c  | 471 ++
 include/flash.h   |   5 +-
 3 files changed, 479 insertions(+), 2 deletions(-)
 create mode 100644 arch/mips/mach-pic32/flash.c

diff --git a/arch/mips/mach-pic32/Makefile b/arch/mips/mach-pic32/Makefile
index 03d5f27..3a621c3 100644
--- a/arch/mips/mach-pic32/Makefile
+++ b/arch/mips/mach-pic32/Makefile
@@ -4,4 +4,7 @@
 # SPDX-License-Identifier:  GPL-2.0+
 #
 
-obj-y = cpu.o reset.o lowlevel_init.o
\ No newline at end of file
+obj-y = cpu.o reset.o lowlevel_init.o
+ifndef CONFIG_SYS_NO_FLASH
+obj-y += flash.o
+endif
\ No newline at end of file
diff --git a/arch/mips/mach-pic32/flash.c b/arch/mips/mach-pic32/flash.c
new file mode 100644
index 000..b3c1e0a
--- /dev/null
+++ b/arch/mips/mach-pic32/flash.c
@@ -0,0 +1,471 @@
+/*
+ * Copyright (C) 2015
+ * Cristian Birsan 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#if defined(CONFIG_ENV_IS_IN_FLASH)
+#ifndef CONFIG_ENV_ADDR
+#define CONFIG_ENV_ADDR(CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
+#endif
+
+#ifndef CONFIG_ENV_SIZE
+#define CONFIG_ENV_SIZECONFIG_ENV_SECT_SIZE
+#endif
+
+#ifndef CONFIG_ENV_SECT_SIZE
+#define CONFIG_ENV_SECT_SIZE  CONFIG_ENV_SIZE
+#endif
+#endif
+
+/* NVM Controller registers */
+#define NVMCON(PIC32_NVM_BASE + 0x00)
+#define NVMCONCLR(NVMCON + _CLR_OFFSET)
+#define NVMCONSET(NVMCON + _SET_OFFSET)
+#define NVMKEY(PIC32_NVM_BASE + 0x10)
+#define NVMADDR(PIC32_NVM_BASE + 0x20)
+#define NVMDATA0(PIC32_NVM_BASE + 0x30)
+
+/* NVM Operations */
+#define NVMOP_NOP0x
+#define NVMOP_WORD_WRITE0x0001
+#define NVMOP_PAGE_ERASE0x0004
+
+/* NVM Programming Control Register*/
+#define NVMCON_WREN0x4000
+#define NVMCON_WR0x8000
+#define NVMCON_WRERR0x2000
+#define NVMCON_LVDERR0x1000
+
+/*---
+ */
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
+
+/*
+ * The following code cannot be run from FLASH!
+ */
+static ulong flash_get_size(vu_long *addr, flash_info_t *info)
+{
+short i;
+ulong base = (ulong)addr;
+ulong sector_offset;
+
+/* On chip flash ID */
+switch (info->flash_id & FLASH_VENDMASK) {
+case FLASH_MAN_MCHP:
+break;
+default:
+/* no or unknown flash*/
+printf("unknown manufacturer: 0x%lx\n",
+   info->flash_id & FLASH_VENDMASK);
+info->flash_id = FLASH_UNKNOWN;
+info->sector_count = 0;
+info->size = 0;
+return 0;
+}
+
+switch (info->flash_id & FLASH_TYPEMASK) {
+case FLASH_MCHP100T:
+info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
+info->size = CONFIG_SYS_FLASH_SIZE;
+sector_offset = info->size / info->sector_count;
+break;
+default:
+info->flash_id = FLASH_UNKNOWN;
+return 0;/* => no or unknown flash */
+}
+
+/* set up sector start address table */
+for (i = 0; i < info->sector_count; i++) {
+info->start[i] = base;
+base += sector_offset;
+/* protect each sector by default */
+info->protect[i] = 1;
+}
+
+/* Disable Flash Write/Erase operations */
+writel(NVMCON_WREN, NVMCONCLR);
+
+if (info->flash_id != FLASH_UNKNOWN)
+addr = (vu_long *)info->start[0];
+
+return info->size;
+}
+
+/*---
+ */
+void flash_print_info(flash_info_t *info)
+{
+int i;
+
+if (info->flash_id == FLASH_UNKNOWN) {
+printf("missing or unknown FLASH type\n");
+return;
+}
+
+switch (info->flash_id & FLASH_VENDMASK) {
+case FLASH_MAN_MCHP:
+printf("Microchip ");
+break;
+default:
+printf("Unknown Vendor ");
+break;
+}
+
+switch (info->flash_id & FLASH_TYPEMASK) {
+case FLASH_MCHP100T:
+printf("Internal (8 Mbit, 64 x 16k)\n");
+break;
+default:
+printf("Unknown Chip Type\n");
+break;
+}
+
+printf("  Size: %ld MB in %d Sectors\n",
+   info->size >> 20, info->sector_count);
+
+printf("  Sector Start Addresses:");
+for (i = 0; i < info->sector_count; ++i) {
+if ((i % 5) == 0)
+printf("\n   ");
+
+printf(" %08lX%s", info->start[i],
+   info->protect[i] ? " (RO)" : " ");
+}
+printf("\n");
+}
+
+static inline void flash_initiate_operation(void)
+{
+/* Unlock sequence */
+writel(0x, NVMKEY);
+writel(0xAA996655, NVMKEY);
+writel(0x556699AA,

Re: [U-Boot] [PATCH v1 08/18] MIPS: pic32: Add driver for Microchip PIC32 flash controller.

Re: [U-Boot] [PATCH v1 08/18] MIPS: pic32: Add driver for Microchip PIC32 flash controller.

Re: [U-Boot] [PATCH v1 08/18] MIPS: pic32: Add driver for Microchip PIC32 flash controller.

Re: [U-Boot] [PATCH v1 08/18] MIPS: pic32: Add driver for Microchip PIC32 flash controller.

[U-Boot] [PATCH v1 08/18] MIPS: pic32: Add driver for Microchip PIC32 flash controller.

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