Re: [U-Boot] [PATCH v1 2/7] board/ti/am335x: add support for beaglebone NAND cape
>From: Tom Rini [mailto:tom.r...@gmail.com] On Behalf Of Rini, Tom >>On Sat, Jul 05, 2014 at 12:35:12AM +0530, Pekon Gupta wrote: >> Beaglebone Board can be connected to expansion boards to add devices to them. >> These expansion boards are called 'capes'. This patch adds support for >> following versions of Beaglebone(AM335x) NAND capes >> (a) NAND Device with bus-width=16, block-size=128k, page-size=2k, oob-size=64 >> (b) NAND Device with bus-width=16, block-size=256k, page-size=4k, >> oob-size=224 >> Further information and datasheets can be found at [1] and [2] >[snip] >> @@ -377,7 +391,11 @@ void enable_board_pin_mux(struct am335x_baseboard_id >> *header) >> configure_module_pin_mux(i2c1_pin_mux); >> configure_module_pin_mux(mii1_pin_mux); >> configure_module_pin_mux(mmc0_pin_mux); >> +#if defined(CONFIG_NAND) >> +configure_module_pin_mux(nand_pin_mux); >> +#else >> configure_module_pin_mux(mmc1_pin_mux); >> +#endif > >The above is the case for Beaglebone Black. Did you test the capes >there as well? AFAIK the eMMC makes it a bit more tricky (or >impossible?) to use some of the memory capes. > Yes, slightly tricky, but not impossible :-) On Beaglebone all storage devices (NAND, NOR and eMMC) share GPMC pins. So this patch gives priority based on configs enabled in board-profile: #ifdef CONFIG_NAND /* define NAND pin-mux */ #elseif CONFIG_NOR /* configure NOR pin-mux */ #else /* config eMMC pin-mux (default, if no NAND | NOR cape is present) */ #endif Please refer to following log from beaglebone Black booting from NAND. U-boot was flashed on NAND using following commands: /* Flash MLO to NAND */ fatload mmc 0 0x8200 mlo nand write 0x8200 0x0 0x2 /* Flash u-boot.img to NAND */ fatload mmc 0 0x8200 u-boot.img nand write 0x8200 0xc 0x8 - U-Boot 2014.07-00013-g838a657-dirty (Jul 21 2014 - 10:27:34) I2C: ready DRAM: 512 MiB NAND: 512 MiB MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 *** Warning - bad CRC, using default environment Net:not set. Validating first E-fuse MAC cpsw, usb_ether Hit any key to stop autoboot: 1 0 U-Boot# -- *IMPORTANT NOTE* As Beaglebone board shares the same config as AM335x EVM, so following changes are required in addition to this patch for Beaglebone NAND cape. Therefore above image has a 'dirty commit'. (1) Enable NAND in am335x_beaglebone board profile (2) Add CONFIG_SYS_NAND_BUSWIDTH_16BIT to board config because: - AM335x EVM has NAND device with datawidth=8, whereas - Beaglebone NAND cape has NAND device with data-width=16 diff --git a/boards.cfg b/boards.cfg -Active arm armv7 am33xx ti am335x am335x_boneblack am335x_evm:SERIAL +Active arm armv7 am33xx ti am335x am335x_boneblack am335x_evm:SERIAL diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h +#define CONFIG_SYS_NAND_BUSWIDTH_16BIT with regards, pekon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v1 2/7] board/ti/am335x: add support for beaglebone NAND cape
On Sat, Jul 05, 2014 at 12:35:12AM +0530, Pekon Gupta wrote: > Beaglebone Board can be connected to expansion boards to add devices to them. > These expansion boards are called 'capes'. This patch adds support for > following versions of Beaglebone(AM335x) NAND capes > (a) NAND Device with bus-width=16, block-size=128k, page-size=2k, oob-size=64 > (b) NAND Device with bus-width=16, block-size=256k, page-size=4k, oob-size=224 > Further information and datasheets can be found at [1] and [2] [snip] > @@ -377,7 +391,11 @@ void enable_board_pin_mux(struct am335x_baseboard_id > *header) > configure_module_pin_mux(i2c1_pin_mux); > configure_module_pin_mux(mii1_pin_mux); > configure_module_pin_mux(mmc0_pin_mux); > +#if defined(CONFIG_NAND) > + configure_module_pin_mux(nand_pin_mux); > +#else > configure_module_pin_mux(mmc1_pin_mux); > +#endif The above is the case for Beaglebone Black. Did you test the capes there as well? AFAIK the eMMC makes it a bit more tricky (or impossible?) to use some of the memory capes. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v1 2/7] board/ti/am335x: add support for beaglebone NAND cape
Beaglebone Board can be connected to expansion boards to add devices to them.
These expansion boards are called 'capes'. This patch adds support for
following versions of Beaglebone(AM335x) NAND capes
(a) NAND Device with bus-width=16, block-size=128k, page-size=2k, oob-size=64
(b) NAND Device with bus-width=16, block-size=256k, page-size=4k, oob-size=224
Further information and datasheets can be found at [1] and [2]
* How to boot from NAND using Memory Expander + NAND Cape ? *
- Important: As BOOTSEL values are sampled only at POR, so after changing any
setting on SW2 (DIP switch), disconnect and reconnect all board power supply
(including mini-USB console port) to POR the beaglebone.
- Selection of ECC scheme
for NAND cape(a), ROM code expects BCH8_HW ecc-scheme
for NAND cape(b), ROM code expects BCH16_HW ecc-scheme
- Selction of boot modes can be controlled via DIP switch(SW2) present on
Memory Expander cape.
SW2[SWITCH_BOOT] == OFF follow default boot order MMC-> SPI -> UART -> USB
SW2[SWITCH_BOOT] == ON boot mode selected via DIP switch(SW2)
So to flash NAND, first boot via MMC or other sources and then switch to
SW2[SWITCH_BOOT]=ON to boot from NAND Cape.
- For NAND boot following switch settings need to be followed
SW2[ 1] = OFF (SYSBOOT[ 0]==1: NAND boot mode selected )
SW2[ 2] = OFF (SYSBOOT[ 1]==1: -- do -- )
SW2[ 3] = ON (SYSBOOT[ 2]==0: -- do -- )
SW2[ 4] = ON (SYSBOOT[ 3]==0: -- do -- )
SW2[ 5] = OFF (SYSBOOT[ 4]==1: -- do -- )
SW2[ 6] = OFF (SYSBOOT[ 8]==1: 0:x8 device, 1:x16 device )
SW2[ 7] = ON (SYSBOOT[ 9]==0: ECC done by ROM )
SW2[ 8] = ON (SYSBOOT[10]==0: Non Muxed device )
SW2[ 9] = ON (SYSBOOT[11]==0:-- do -- )
[1] http://beagleboardtoys.info/index.php?title=BeagleBone_Memory_Expansion
[2]
http://beagleboardtoys.info/index.php?title=BeagleBone_4Gb_16-Bit_NAND_Module
Signed-off-by: Pekon Gupta
---
board/ti/am335x/mux.c | 58 +--
1 file changed, 38 insertions(+), 20 deletions(-)
diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c
index b2bfda5..439da4b 100644
--- a/board/ti/am335x/mux.c
+++ b/board/ti/am335x/mux.c
@@ -171,25 +171,36 @@ static struct module_pin_mux mii1_pin_mux[] = {
{-1},
};
+#ifdef CONFIG_NAND
static struct module_pin_mux nand_pin_mux[] = {
- {OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */
- {OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */
- {OFFSET(gpmc_ad2), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD2 */
- {OFFSET(gpmc_ad3), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD3 */
- {OFFSET(gpmc_ad4), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD4 */
- {OFFSET(gpmc_ad5), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD5 */
- {OFFSET(gpmc_ad6), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD6 */
- {OFFSET(gpmc_ad7), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD7 */
- {OFFSET(gpmc_wait0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* NAND WAIT */
- {OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN | RXACTIVE)}, /* NAND_WPN */
- {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)}, /* NAND_CS0 */
- {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */
- {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)}, /* NAND_OE */
- {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)}, /* NAND_WEN */
- {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)}, /* NAND_BE_CLE */
+ {OFFSET(gpmc_ad0), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD0 */
+ {OFFSET(gpmc_ad1), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD1 */
+ {OFFSET(gpmc_ad2), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD2 */
+ {OFFSET(gpmc_ad3), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD3 */
+ {OFFSET(gpmc_ad4), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD4 */
+ {OFFSET(gpmc_ad5), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD5 */
+ {OFFSET(gpmc_ad6), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD6 */
+ {OFFSET(gpmc_ad7), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD7 */
+#ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT
+ {OFFSET(gpmc_ad8), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD8 */
+ {OFFSET(gpmc_ad9), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD9 */
+ {OFFSET(gpmc_ad10), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD10 */
+ {OFFSET(gpmc_ad11), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD11 */
+ {OFFSET(gpmc_ad12), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD12 */
+ {OFFSET(gpmc_ad13), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD13 */
+ {OFFSET(gpmc_ad14), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD14 */
+ {OFFSET(gpmc_ad15), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD15 */
+#endif
+ {OFFSET(gpmc_wait0),(MODE(0) | PULLUP_EN | RXACTIVE)}, /* nWAIT */
+ {OFFSET(gpmc_wpn), (MO
