Re: [U-Boot] [PATCH v1 8/8] OMAP3: mt_ventoux: added video support
On 28/08/2012 10:47, Jeroen Hofstee wrote: > Hello Stefano, > > Could we use here a define, something like this: > > #define PANEL_TIMING_H(bp, fp, sw) (((bp - 1) << 20) | ((fp - 1) << 8) | > (sw - 1)) > >> Agree - and put it in a common header (arch/dss.h), making it accessible >> to all boards. And we need only one macro PANEL_TIMING, the register has >> the same layout. >> >> I'll do in V2. >> > The hbp, hfp, hsw, vsw all have a "(program to value minus 1)." > vbp and vfp don't, you can set those to zero. > > So while the layout is the same, the meaning isn't. To make the values > match the lcd specification, I would prefer to have the separate > defines. That's right - I will put two separate defines. Regards, Stefano -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v1 8/8] OMAP3: mt_ventoux: added video support
Hello Stefano, Could we use here a define, something like this: #define PANEL_TIMING_H(bp, fp, sw) (((bp - 1) << 20) | ((fp - 1) << 8) | (sw - 1)) Agree - and put it in a common header (arch/dss.h), making it accessible to all boards. And we need only one macro PANEL_TIMING, the register has the same layout. I'll do in V2. The hbp, hfp, hsw, vsw all have a "(program to value minus 1)." vbp and vfp don't, you can set those to zero. So while the layout is the same, the meaning isn't. To make the values match the lcd specification, I would prefer to have the separate defines. Regards, Jeroen ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v1 8/8] OMAP3: mt_ventoux: added video support
On 28/08/2012 10:11, Heiko Schocher wrote:
> Hello Stefano,
>
Hi Heiko,
>> +static struct panel_config lcd_cfg[] = {
>> +{
>> +.timing_h = ((4 /* hpb */ - 1)<< 20) |
>> +((8 /*hfp */- 1)<< 8) |
>> +(41 /* hsw */ - 1), /* Horizontal timing */
>
> Could we use here a define, something like this:
>
> #define PANEL_TIMING_H(bp, fp, sw) (((bp - 1) << 20) | ((fp - 1) << 8) |
> (sw - 1))
Agree - and put it in a common header (arch/dss.h), making it accessible
to all boards. And we need only one macro PANEL_TIMING, the register has
the same layout.
I'll do in V2.
>
> .panel_config = {
> .timing_h = PANEL_TIMING_H(4, 8, 41),
>
>> +.timing_v = (2 /*vbp */<< 24) |
> ^^
> Is this correct? In the manual I
> see for the timing H and V
> settings
> the same bitpositions!
>
This is not correct, thanks. It has no influence on my hardware because
it simply increments vbp, but I will fix it.
Stefano
--
=
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
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Re: [U-Boot] [PATCH v1 8/8] OMAP3: mt_ventoux: added video support
Hello Stefano,
On 28.08.2012 09:46, Stefano Babic wrote:
Signed-off-by: Stefano Babic
---
board/teejet/mt_ventoux/mt_ventoux.c | 91 ++
board/teejet/mt_ventoux/mt_ventoux.h |2 +-
include/configs/mt_ventoux.h | 16 ++
3 files changed, 108 insertions(+), 1 deletion(-)
diff --git a/board/teejet/mt_ventoux/mt_ventoux.c
b/board/teejet/mt_ventoux/mt_ventoux.c
index 814e72f..a2bda4b 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.c
+++ b/board/teejet/mt_ventoux/mt_ventoux.c
@@ -21,13 +21,17 @@
#include
#include
+#include
#include
+#include
#include
#include
#include
#include
#include
#include
+#include
+#include
#include
#include
#include
@@ -53,6 +57,50 @@ DECLARE_GLOBAL_DATA_PTR;
#define FPGA_INIT 119
#define FPGA_DONE 154
+#define LCD_PWR138
+#define LCD_PON_PIN139
+
+#if defined(CONFIG_VIDEO)&& !defined(CONFIG_SPL_BUILD)
+static struct {
+ u32 xres;
+ u32 yres;
+} panel_resolution[] = {
+ { 480, 272 },
+ { 800, 480 }
+};
+
+static struct panel_config lcd_cfg[] = {
+ {
+ .timing_h = ((4 /* hpb */ - 1)<< 20) |
+ ((8 /*hfp */- 1)<< 8) |
+ (41 /* hsw */ - 1), /* Horizontal timing */
Could we use here a define, something like this:
#define PANEL_TIMING_H(bp, fp, sw) (((bp - 1) << 20) | ((fp - 1) << 8) | (sw -
1))
.panel_config = {
.timing_h = PANEL_TIMING_H(4, 8, 41),
+ .timing_v = (2 /*vbp */<< 24) |
^^
Is this correct? In the manual I
see for the timing H and V settings
the same bitpositions!
+ (4 /* vfp */<< 8) |
+ (10 - 1), /* Vertical timing */
#define PANEL_TIMING_V(bp, fp, sw) (((bp) << 20) | ((fp) << 8) | (sw - 1))
and here too ?
+ .pol_freq = 0x, /* Pol Freq */
+ .divisor= 0x0001000d, /* 33Mhz Pixel Clock */
+ .panel_type = 0x01, /* TFT */
+ .data_lines = 0x03, /* 24 Bit RGB */
+ .load_mode = 0x02, /* Frame Mode */
+ .panel_color= 0,
+ },
+ {
+ .timing_h = ((20 /* hpb */ - 1)<< 20) |
+ ((192 /*hfp */- 1)<< 8) |
+ (4 /* hsw */ - 1), /* Horizontal timing */
and here ...
+ .timing_v = (2 /*vbp */<< 24) |
+ (20 /* vfp */<< 8) |
+ (10 /* vsw */ - 1), /* Vertical timing */
and here.
+ .pol_freq = 0x4000, /* Pol Freq */
+ .divisor= 0x0001000E, /* 36Mhz Pixel Clock */
+ .panel_type = 0x01, /* TFT */
+ .data_lines = 0x03, /* 24 Bit RGB */
+ .load_mode = 0x02, /* Frame Mode */
+ .panel_color= 0,
+ }
+};
+#endif
[...]
bye,
Heiko
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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[U-Boot] [PATCH v1 8/8] OMAP3: mt_ventoux: added video support
Signed-off-by: Stefano Babic
---
board/teejet/mt_ventoux/mt_ventoux.c | 91 ++
board/teejet/mt_ventoux/mt_ventoux.h |2 +-
include/configs/mt_ventoux.h | 16 ++
3 files changed, 108 insertions(+), 1 deletion(-)
diff --git a/board/teejet/mt_ventoux/mt_ventoux.c
b/board/teejet/mt_ventoux/mt_ventoux.c
index 814e72f..a2bda4b 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.c
+++ b/board/teejet/mt_ventoux/mt_ventoux.c
@@ -21,13 +21,17 @@
#include
#include
+#include
#include
+#include
#include
#include
#include
#include
#include
#include
+#include
+#include
#include
#include
#include
@@ -53,6 +57,50 @@ DECLARE_GLOBAL_DATA_PTR;
#define FPGA_INIT 119
#define FPGA_DONE 154
+#define LCD_PWR138
+#define LCD_PON_PIN139
+
+#if defined(CONFIG_VIDEO) && !defined(CONFIG_SPL_BUILD)
+static struct {
+ u32 xres;
+ u32 yres;
+} panel_resolution[] = {
+ { 480, 272 },
+ { 800, 480 }
+};
+
+static struct panel_config lcd_cfg[] = {
+ {
+ .timing_h = ((4 /* hpb */ - 1) << 20) |
+ ((8 /*hfp */- 1) << 8) |
+ (41 /* hsw */ - 1), /* Horizontal timing */
+ .timing_v = (2 /*vbp */ << 24) |
+ (4 /* vfp */ << 8) |
+ (10 - 1), /* Vertical timing */
+ .pol_freq = 0x, /* Pol Freq */
+ .divisor= 0x0001000d, /* 33Mhz Pixel Clock */
+ .panel_type = 0x01, /* TFT */
+ .data_lines = 0x03, /* 24 Bit RGB */
+ .load_mode = 0x02, /* Frame Mode */
+ .panel_color= 0,
+ },
+ {
+ .timing_h = ((20 /* hpb */ - 1) << 20) |
+ ((192 /*hfp */- 1) << 8) |
+ (4 /* hsw */ - 1), /* Horizontal timing */
+ .timing_v = (2 /*vbp */ << 24) |
+ (20 /* vfp */ << 8) |
+ (10 /* vsw */ - 1), /* Vertical timing */
+ .pol_freq = 0x4000, /* Pol Freq */
+ .divisor= 0x0001000E, /* 36Mhz Pixel Clock */
+ .panel_type = 0x01, /* TFT */
+ .data_lines = 0x03, /* 24 Bit RGB */
+ .load_mode = 0x02, /* Frame Mode */
+ .panel_color= 0,
+ }
+};
+#endif
+
/* Timing definitions for FPGA */
static const u32 gpmc_fpga[] = {
FPGA_GPMC_CONFIG1,
@@ -254,3 +302,46 @@ int board_mmc_init(bd_t *bis)
return omap_mmc_init(0, 0, 0);
}
#endif
+
+#if defined(CONFIG_VIDEO) && !defined(CONFIG_SPL_BUILD)
+int board_video_init(void)
+{
+ struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
+ struct panel_config *panel = &lcd_cfg[0];
+ char *s;
+ u32 index = 0;
+
+ void *fb;
+
+ fb = (void *)0x8800;
+
+ s = getenv("panel");
+ if (s) {
+ index = simple_strtoul(s, NULL, 10);
+ if (index < ARRAY_SIZE(lcd_cfg))
+ panel = &lcd_cfg[index];
+ else
+ return 0;
+ }
+
+ panel->frame_buffer = fb;
+ printf("Panel: %dx%d\n", panel_resolution[index].xres,
+ panel_resolution[index].yres);
+ panel->lcd_size = (panel_resolution[index].yres - 1) << 16 |
+ (panel_resolution[index].xres - 1);
+
+ gpio_request(LCD_PWR, "LCD Power");
+ gpio_request(LCD_PON_PIN, "LCD Pon");
+ gpio_direction_output(LCD_PWR, 0);
+ gpio_direction_output(LCD_PON_PIN, 1);
+
+
+ setbits_le32(&prcm_base->fclken_dss, FCK_DSS_ON);
+ setbits_le32(&prcm_base->iclken_dss, ICK_DSS_ON);
+
+ omap3_dss_panel_config(panel);
+ omap3_dss_enable();
+
+ return 0;
+}
+#endif
diff --git a/board/teejet/mt_ventoux/mt_ventoux.h
b/board/teejet/mt_ventoux/mt_ventoux.h
index eadb8a5..1cd7ec2 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.h
+++ b/board/teejet/mt_ventoux/mt_ventoux.h
@@ -203,7 +203,7 @@ const omap3_sysinfo sysinfo = {
MUX_VAL(CP(MMC2_DAT5), (IDIS | PTU | EN | M4)) \
MUX_VAL(CP(MMC2_DAT6), (IDIS | PTU | EN | M4)) \
/* GPIO_138: LCD_ENVD */\
- MUX_VAL(CP(MMC2_DAT7), (IDIS | PTU | EN | M4)) \
+ MUX_VAL(CP(MMC2_DAT7), (IDIS | PTD | EN | M4)) \
/* GPIO_139: LCD_PON */\
/* McBSP */\
MUX_VAL(CP(MCBSP_CLKS), (IEN | PTU | DIS | M0)) \
diff --git a/include/configs/mt_ventoux.h b/include/configs/mt_ventoux.h
index 131670a..8d35943 100644
--- a/include/configs/mt_ventoux.h
+++ b/include/configs/mt_ventoux.h
@@ -2,6 +2,9 @@
* Copyright (C) 2011
* Stefano Babic, DENX Software Engineering, sba...@denx.de.
*
+ *
+ * Configuration settings for the Teejet mt_ventoux board.
+ *
* Copyright (C) 2009 TechNexion Ltd.
*
* This program is free software; you can redistribute it and/or modify
@@ -24,6 +27,10 @@
#include "tam3517-common.h"
+#u
