When TFA is used as EL3 firmware, then u-boot is crashing
because DDR is not coherent.
Changing DDR memory attributes to device type fix the issue.
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggar...@nxp.com>
Signed-off-by: Udit Kumar <udit.ku...@nxp.com>
---
arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index be21685..32f3d2a 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -100,9 +100,10 @@ static struct mm_region early_map[] = {
#endif
{ CONFIG_SYS_FSL_DRAM_BASE1, CONFIG_SYS_FSL_DRAM_BASE1,
CONFIG_SYS_FSL_DRAM_SIZE1,
-#if defined(CONFIG_TFABOOT) || \
- (defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD))
- PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+#if defined(CONFIG_TFABOOT)
+ PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE)
+#elif defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
+ PTE_BLOCK_MEMTYPE(MT_NORMAL)
#else /* Start with nGnRnE and PXN and UXN to prevent speculative access */
PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_PXN | PTE_BLOCK_UXN |
#endif
--
1.9.1
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