Re: [U-Boot] [PATCH v2] esdhc/usdhc: Fix PIO mode bug in fsl_esdhc driver
Hi there,
On Feb 20, 2014, at 12:00 PM, Ye.Li wrote:
From: Ye.Li b37...@freescale.com
When configure the fsl_esdhc driver to PIO mode by defining
CONFIG_SYS_FSL_ESDHC_USE_PIO, the SD/MMC read and write will fail.
Two bugs in the driver to cause the issue:
1. The read buffer was invalidated after reading from DATAPORT register,
which should be only applied to DMA mode. The valid data in cache was
overwritten by physical memory.
2. The watermarks are not set in PIO mode, will cause according state not
be set.
Signed-off-by: Ye.Li b37...@freescale.com
---
Changes for V2:
-Address the comments from Stefano Babic and Albert ARIBAUD to modify the
subject
drivers/mmc/fsl_esdhc.c | 23 +--
1 file changed, 9 insertions(+), 14 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 7b146a3..5bd0df3 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -174,7 +174,7 @@ static int esdhc_setup_data(struct mmc *mmc, struct
mmc_data *data)
int timeout;
struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc-priv;
struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg-esdhc_base;
-#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
+
uint wml_value;
wml_value = data-blocksize/4;
@@ -184,12 +184,15 @@ static int esdhc_setup_data(struct mmc *mmc, struct
mmc_data *data)
wml_value = WML_RD_WML_MAX_VAL;
esdhc_clrsetbits32(regs-wml, WML_RD_WML_MASK, wml_value);
+#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
esdhc_write32(regs-dsaddr, (u32)data-dest);
+#endif
} else {
+#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
flush_dcache_range((ulong)data-src,
(ulong)data-src+data-blocks
*data-blocksize);
-
+#endif
if (wml_value WML_WR_WML_MAX)
wml_value = WML_WR_WML_MAX_VAL;
if ((esdhc_read32(regs-prsstat) PRSSTAT_WPSPL) == 0) {
@@ -199,19 +202,10 @@ static int esdhc_setup_data(struct mmc *mmc, struct
mmc_data *data)
esdhc_clrsetbits32(regs-wml, WML_WR_WML_MASK,
wml_value 16);
+#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
esdhc_write32(regs-dsaddr, (u32)data-src);
+#endif
}
-#else/* CONFIG_SYS_FSL_ESDHC_USE_PIO */
- if (!(data-flags MMC_DATA_READ)) {
- if ((esdhc_read32(regs-prsstat) PRSSTAT_WPSPL) == 0) {
- printf(\nThe SD card is locked.
- Can not write to a locked card.\n\n);
- return TIMEOUT;
- }
- esdhc_write32(regs-dsaddr, (u32)data-src);
- } else
- esdhc_write32(regs-dsaddr, (u32)data-dest);
-#endif /* CONFIG_SYS_FSL_ESDHC_USE_PIO */
esdhc_write32(regs-blkattr, data-blocks 16 | data-blocksize);
@@ -393,9 +387,10 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
struct mmc_data *data)
if (irqstat DATA_ERR)
return COMM_ERR;
} while ((irqstat DATA_COMPLETE) != DATA_COMPLETE);
-#endif
+
if (data-flags MMC_DATA_READ)
check_and_invalidate_dcache_range(cmd, data);
+#endif
}
esdhc_write32(regs-irqstat, -1);
--
1.7.9.5
Applied, thanks
Acked-by: Pantelis Antoniou pa...@antoniou-consulting.com
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[U-Boot] [PATCH v2] esdhc/usdhc: Fix PIO mode bug in fsl_esdhc driver
From: Ye.Li b37...@freescale.com
When configure the fsl_esdhc driver to PIO mode by defining
CONFIG_SYS_FSL_ESDHC_USE_PIO, the SD/MMC read and write will fail.
Two bugs in the driver to cause the issue:
1. The read buffer was invalidated after reading from DATAPORT register,
which should be only applied to DMA mode. The valid data in cache was
overwritten by physical memory.
2. The watermarks are not set in PIO mode, will cause according state not
be set.
Signed-off-by: Ye.Li b37...@freescale.com
---
Changes for V2:
-Address the comments from Stefano Babic and Albert ARIBAUD to modify the
subject
drivers/mmc/fsl_esdhc.c | 23 +--
1 file changed, 9 insertions(+), 14 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 7b146a3..5bd0df3 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -174,7 +174,7 @@ static int esdhc_setup_data(struct mmc *mmc, struct
mmc_data *data)
int timeout;
struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc-priv;
struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg-esdhc_base;
-#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
+
uint wml_value;
wml_value = data-blocksize/4;
@@ -184,12 +184,15 @@ static int esdhc_setup_data(struct mmc *mmc, struct
mmc_data *data)
wml_value = WML_RD_WML_MAX_VAL;
esdhc_clrsetbits32(regs-wml, WML_RD_WML_MASK, wml_value);
+#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
esdhc_write32(regs-dsaddr, (u32)data-dest);
+#endif
} else {
+#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
flush_dcache_range((ulong)data-src,
(ulong)data-src+data-blocks
*data-blocksize);
-
+#endif
if (wml_value WML_WR_WML_MAX)
wml_value = WML_WR_WML_MAX_VAL;
if ((esdhc_read32(regs-prsstat) PRSSTAT_WPSPL) == 0) {
@@ -199,19 +202,10 @@ static int esdhc_setup_data(struct mmc *mmc, struct
mmc_data *data)
esdhc_clrsetbits32(regs-wml, WML_WR_WML_MASK,
wml_value 16);
+#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
esdhc_write32(regs-dsaddr, (u32)data-src);
+#endif
}
-#else /* CONFIG_SYS_FSL_ESDHC_USE_PIO */
- if (!(data-flags MMC_DATA_READ)) {
- if ((esdhc_read32(regs-prsstat) PRSSTAT_WPSPL) == 0) {
- printf(\nThe SD card is locked.
- Can not write to a locked card.\n\n);
- return TIMEOUT;
- }
- esdhc_write32(regs-dsaddr, (u32)data-src);
- } else
- esdhc_write32(regs-dsaddr, (u32)data-dest);
-#endif /* CONFIG_SYS_FSL_ESDHC_USE_PIO */
esdhc_write32(regs-blkattr, data-blocks 16 | data-blocksize);
@@ -393,9 +387,10 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
struct mmc_data *data)
if (irqstat DATA_ERR)
return COMM_ERR;
} while ((irqstat DATA_COMPLETE) != DATA_COMPLETE);
-#endif
+
if (data-flags MMC_DATA_READ)
check_and_invalidate_dcache_range(cmd, data);
+#endif
}
esdhc_write32(regs-irqstat, -1);
--
1.7.9.5
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