Re: [U-Boot] [PATCH v2] spi: cadence_qspi: Add quad write support

2019-04-04 Thread Jagan Teki 
On Wed, Apr 3, 2019 at 5:22 PM Marek Vasut  wrote:
>
> On 4/3/19 8:13 AM, Jagan Teki wrote:
> > On Wed, Feb 27, 2019 at 11:06 AM Ley Foon Tan  
> > wrote:
> >>
> >> Use quad write if SPI_TX_QUAD flag is set.
> >>
> >> Tested quad write on Stratix 10 SoC board (Micron
> >> serial NOR flash, mt25qu02g)
> >>
> >> Signed-off-by: Ley Foon Tan 
> >>
> >> ---
> >
> > Applied to u-boot-spi/master
>
> That means it goes into THIS release ? If so, NAK.

for next release.
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Re: [U-Boot] [PATCH v2] spi: cadence_qspi: Add quad write support

2019-04-03 Thread Marek Vasut 
On 4/3/19 8:13 AM, Jagan Teki wrote:
> On Wed, Feb 27, 2019 at 11:06 AM Ley Foon Tan  wrote:
>>
>> Use quad write if SPI_TX_QUAD flag is set.
>>
>> Tested quad write on Stratix 10 SoC board (Micron
>> serial NOR flash, mt25qu02g)
>>
>> Signed-off-by: Ley Foon Tan 
>>
>> ---
> 
> Applied to u-boot-spi/master

That means it goes into THIS release ? If so, NAK.

-- 
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v2] spi: cadence_qspi: Add quad write support

2019-04-03 Thread Jagan Teki 
On Wed, Feb 27, 2019 at 11:06 AM Ley Foon Tan  wrote:
>
> Use quad write if SPI_TX_QUAD flag is set.
>
> Tested quad write on Stratix 10 SoC board (Micron
> serial NOR flash, mt25qu02g)
>
> Signed-off-by: Ley Foon Tan 
>
> ---

Applied to u-boot-spi/master
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Re: [U-Boot] [PATCH v2] spi: cadence_qspi: Add quad write support

2019-03-25 Thread Ley Foon Tan 
On Mon, Mar 25, 2019 at 6:54 PM Marek Vasut  wrote:
>
> On 3/25/19 6:24 AM, Ley Foon Tan wrote:
> > On Mon, Mar 4, 2019 at 8:24 PM Jagan Teki  
> > wrote:
> >>
> >> On Wed, Feb 27, 2019 at 11:06 AM Ley Foon Tan  
> >> wrote:
> >>>
> >>> Use quad write if SPI_TX_QUAD flag is set.
> >>>
> >>> Tested quad write on Stratix 10 SoC board (Micron
> >>> serial NOR flash, mt25qu02g)
> >>>
> >>> Signed-off-by: Ley Foon Tan 
> >>>
> >>> ---
> >>> v1 -> v2:
> >>> - Update commit message
> >>> - Restore file permission
> >>> ---
> >>
> >> Reviewed-by: Jagan Teki 
> > Hi Jagan
> >
> > Will you merge this patch to next Uboot version?
>
> At this point, that's for 2019.07 indeed.
>
Okay.

Thanks.

Regards
Ley Foon
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Re: [U-Boot] [PATCH v2] spi: cadence_qspi: Add quad write support

2019-03-25 Thread Marek Vasut 
On 3/25/19 6:24 AM, Ley Foon Tan wrote:
> On Mon, Mar 4, 2019 at 8:24 PM Jagan Teki  wrote:
>>
>> On Wed, Feb 27, 2019 at 11:06 AM Ley Foon Tan  wrote:
>>>
>>> Use quad write if SPI_TX_QUAD flag is set.
>>>
>>> Tested quad write on Stratix 10 SoC board (Micron
>>> serial NOR flash, mt25qu02g)
>>>
>>> Signed-off-by: Ley Foon Tan 
>>>
>>> ---
>>> v1 -> v2:
>>> - Update commit message
>>> - Restore file permission
>>> ---
>>
>> Reviewed-by: Jagan Teki 
> Hi Jagan
> 
> Will you merge this patch to next Uboot version?

At this point, that's for 2019.07 indeed.

-- 
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v2] spi: cadence_qspi: Add quad write support

2019-03-24 Thread Ley Foon Tan 
On Mon, Mar 4, 2019 at 8:24 PM Jagan Teki  wrote:
>
> On Wed, Feb 27, 2019 at 11:06 AM Ley Foon Tan  wrote:
> >
> > Use quad write if SPI_TX_QUAD flag is set.
> >
> > Tested quad write on Stratix 10 SoC board (Micron
> > serial NOR flash, mt25qu02g)
> >
> > Signed-off-by: Ley Foon Tan 
> >
> > ---
> > v1 -> v2:
> > - Update commit message
> > - Restore file permission
> > ---
>
> Reviewed-by: Jagan Teki 
Hi Jagan

Will you merge this patch to next Uboot version?

Regards
Ley Foon
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Re: [U-Boot] [PATCH v2] spi: cadence_qspi: Add quad write support

2019-03-04 Thread Jagan Teki 
On Wed, Feb 27, 2019 at 11:06 AM Ley Foon Tan  wrote:
>
> Use quad write if SPI_TX_QUAD flag is set.
>
> Tested quad write on Stratix 10 SoC board (Micron
> serial NOR flash, mt25qu02g)
>
> Signed-off-by: Ley Foon Tan 
>
> ---
> v1 -> v2:
> - Update commit message
> - Restore file permission
> ---

Reviewed-by: Jagan Teki 
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[U-Boot] [PATCH v2] spi: cadence_qspi: Add quad write support

2019-02-26 Thread Ley Foon Tan 
Use quad write if SPI_TX_QUAD flag is set.

Tested quad write on Stratix 10 SoC board (Micron
serial NOR flash, mt25qu02g)

Signed-off-by: Ley Foon Tan 

---
v1 -> v2:
- Update commit message
- Restore file permission
---
 drivers/spi/cadence_qspi.c | 2 +-
 drivers/spi/cadence_qspi.h | 2 +-
 drivers/spi/cadence_qspi_apb.c | 7 ++-
 3 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
index 11fce9c4fe..efdb178450 100644
--- a/drivers/spi/cadence_qspi.c
+++ b/drivers/spi/cadence_qspi.c
@@ -256,7 +256,7 @@ static int cadence_spi_xfer(struct udevice *dev, unsigned 
int bitlen,
break;
case CQSPI_INDIRECT_WRITE:
err = cadence_qspi_apb_indirect_write_setup
-   (plat, priv->cmd_len, cmd_buf);
+   (plat, priv->cmd_len, dm_plat->mode, cmd_buf);
if (!err) {
err = cadence_qspi_apb_indirect_write_execute
(plat, data_bytes, dout);
diff --git a/drivers/spi/cadence_qspi.h b/drivers/spi/cadence_qspi.h
index 055900def0..b491407130 100644
--- a/drivers/spi/cadence_qspi.h
+++ b/drivers/spi/cadence_qspi.h
@@ -60,7 +60,7 @@ int cadence_qspi_apb_indirect_read_setup(struct 
cadence_spi_platdata *plat,
 int cadence_qspi_apb_indirect_read_execute(struct cadence_spi_platdata *plat,
unsigned int rxlen, u8 *rxbuf);
 int cadence_qspi_apb_indirect_write_setup(struct cadence_spi_platdata *plat,
-   unsigned int cmdlen, const u8 *cmdbuf);
+   unsigned int cmdlen, unsigned int tx_width, const u8 *cmdbuf);
 int cadence_qspi_apb_indirect_write_execute(struct cadence_spi_platdata *plat,
unsigned int txlen, const u8 *txbuf);
 
diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c
index a8af352030..55a7501913 100644
--- a/drivers/spi/cadence_qspi_apb.c
+++ b/drivers/spi/cadence_qspi_apb.c
@@ -77,6 +77,7 @@
 
 #defineCQSPI_REG_WR_INSTR  0x08
 #defineCQSPI_REG_WR_INSTR_OPCODE_LSB   0
+#defineCQSPI_REG_WR_INSTR_TYPE_DATA_LSB16
 
 #defineCQSPI_REG_DELAY 0x0C
 #defineCQSPI_REG_DELAY_TSLCH_LSB   0
@@ -686,7 +687,7 @@ failrd:
 
 /* Opcode + Address (3/4 bytes) */
 int cadence_qspi_apb_indirect_write_setup(struct cadence_spi_platdata *plat,
-   unsigned int cmdlen, const u8 *cmdbuf)
+   unsigned int cmdlen, unsigned int tx_width, const u8 *cmdbuf)
 {
unsigned int reg;
unsigned int addr_bytes = cmdlen > 4 ? 4 : 3;
@@ -702,6 +703,10 @@ int cadence_qspi_apb_indirect_write_setup(struct 
cadence_spi_platdata *plat,
 
/* Configure the opcode */
reg = cmdbuf[0] << CQSPI_REG_WR_INSTR_OPCODE_LSB;
+
+   if (tx_width & SPI_TX_QUAD)
+   reg |= CQSPI_INST_TYPE_QUAD << CQSPI_REG_WR_INSTR_TYPE_DATA_LSB;
+
writel(reg, plat->regbase + CQSPI_REG_WR_INSTR);
 
/* Setup write address. */
-- 
2.19.0

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