Re: [U-Boot] [PATCH v2 04/14] serial: add serial driver for BCM6345

2017-04-16 Thread Simon Glass 
On 15 April 2017 at 16:03, Álvaro Fernández Rojas  wrote:
> It is based on linux/drivers/tty/serial/bcm63xx_uart.c
>
> Signed-off-by: Álvaro Fernández Rojas 
> ---
>  v2: Introduce changes suggested by Daniel Schwierzeck:
>   - Remove unneeded defines.
>   - Fix incorrect multi-line comment.
>
>  drivers/serial/Kconfig  |  14 +++
>  drivers/serial/Makefile |   1 +
>  drivers/serial/serial_bcm6345.c | 267 
> 
>  3 files changed, 282 insertions(+)
>  create mode 100644 drivers/serial/serial_bcm6345.c

Reviewed-by: Simon Glass 

IMO the raw read/write are ugly. It is better to use clrsetbits etc.
than lots of read/write calls. Also we tend to use C structs to access
registers although that is not required now.

I cannot see a lot of point in trying to make it look like the Linux
driver. Is that driver changing rapidly and hard to track?
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[U-Boot] [PATCH v2 04/14] serial: add serial driver for BCM6345

2017-04-15 Thread Álvaro Fernández Rojas 
It is based on linux/drivers/tty/serial/bcm63xx_uart.c

Signed-off-by: Álvaro Fernández Rojas 
---
 v2: Introduce changes suggested by Daniel Schwierzeck:
  - Remove unneeded defines.
  - Fix incorrect multi-line comment.

 drivers/serial/Kconfig  |  14 +++
 drivers/serial/Makefile |   1 +
 drivers/serial/serial_bcm6345.c | 267 
 3 files changed, 282 insertions(+)
 create mode 100644 drivers/serial/serial_bcm6345.c

diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index c0ec2ec..ca776d8 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -134,6 +134,14 @@ config DEBUG_UART_ATMEL
  will need to provide parameters to make this work. The driver will
  be available until the real driver-model serial is running.
 
+config DEBUG_UART_BCM6345
+   bool "BCM6345 UART"
+   depends on BCM6345_SERIAL
+   help
+ Select this to enable a debug UART on BCM6345 SoCs. You
+ will need to provide parameters to make this work. The driver will
+ be available until the real driver model serial is running.
+
 config DEBUG_UART_NS16550
bool "ns16550"
help
@@ -339,6 +347,12 @@ config ATMEL_USART
  configured in the device tree, and input clock frequency can
  be got from the clk node.
 
+config BCM6345_SERIAL
+   bool "Support for BCM6345 UART"
+   depends on DM_SERIAL
+   help
+ Select this to enable UART on BCM6345 SoCs.
+
 config FSL_LPUART
bool "Freescale LPUART support"
help
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 4382cf9..dca31b2 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -20,6 +20,7 @@ obj-$(CONFIG_ALTERA_JTAG_UART) += altera_jtag_uart.o
 obj-$(CONFIG_AR933X_UART) += serial_ar933x.o
 obj-$(CONFIG_ARM_DCC) += arm_dcc.o
 obj-$(CONFIG_ATMEL_USART) += atmel_usart.o
+obj-$(CONFIG_BCM6345_SERIAL) += serial_bcm6345.o
 obj-$(CONFIG_EFI_APP) += serial_efi.o
 obj-$(CONFIG_LPC32XX_HSUART) += lpc32xx_hsuart.o
 obj-$(CONFIG_MCFUART) += mcfuart.o
diff --git a/drivers/serial/serial_bcm6345.c b/drivers/serial/serial_bcm6345.c
new file mode 100644
index 000..fa1e3e3
--- /dev/null
+++ b/drivers/serial/serial_bcm6345.c
@@ -0,0 +1,267 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas 
+ *
+ * Derived from linux/drivers/tty/serial/bcm63xx_uart.c:
+ * Copyright (C) 2008 Maxime Bizon 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* UART Control Register */
+#define UART_CTL_REG   0x0
+#define UART_CTL_RSTRXFIFO_SHIFT   6
+#define UART_CTL_RSTRXFIFO_MASK(1 << UART_CTL_RSTRXFIFO_SHIFT)
+#define UART_CTL_RSTTXFIFO_SHIFT   7
+#define UART_CTL_RSTTXFIFO_MASK(1 << UART_CTL_RSTTXFIFO_SHIFT)
+#define UART_CTL_STOPBITS_SHIFT8
+#define UART_CTL_STOPBITS_MASK (0xf << UART_CTL_STOPBITS_SHIFT)
+#define UART_CTL_STOPBITS_1(0x7 << UART_CTL_STOPBITS_SHIFT)
+#define UART_CTL_BITSPERSYM_SHIFT  12
+#define UART_CTL_BITSPERSYM_MASK   (0x3 << UART_CTL_BITSPERSYM_SHIFT)
+#define UART_CTL_RXEN_SHIFT21
+#define UART_CTL_RXEN_MASK (1 << UART_CTL_RXEN_SHIFT)
+#define UART_CTL_TXEN_SHIFT22
+#define UART_CTL_TXEN_MASK (1 << UART_CTL_TXEN_SHIFT)
+#define UART_CTL_BRGEN_SHIFT   23
+#define UART_CTL_BRGEN_MASK(1 << UART_CTL_BRGEN_SHIFT)
+
+/* UART Baudword register */
+#define UART_BAUD_REG  0x4
+
+/* UART Interrupt register */
+#define UART_IR_REG0x10
+#define UART_IR_STAT(x)(1 << (x))
+#define UART_IR_TXEMPTY5
+#define UART_IR_RXOVER 7
+#define UART_IR_RXNOTEMPTY 11
+
+/* UART Fifo register */
+#define UART_FIFO_REG  0x14
+#define UART_FIFO_VALID_MASK   0xff
+#define UART_FIFO_FRAMEERR_SHIFT   8
+#define UART_FIFO_FRAMEERR_MASK(1 << UART_FIFO_FRAMEERR_SHIFT)
+#define UART_FIFO_PARERR_SHIFT 9
+#define UART_FIFO_PARERR_MASK  (1 << UART_FIFO_PARERR_SHIFT)
+#define UART_FIFO_BRKDET_SHIFT 10
+#define UART_FIFO_BRKDET_MASK  (1 << UART_FIFO_BRKDET_SHIFT)
+#define UART_FIFO_ANYERR_MASK  (UART_FIFO_FRAMEERR_MASK |  \
+   UART_FIFO_PARERR_MASK | \
+   UART_FIFO_BRKDET_MASK)
+
+struct bcm6345_serial_priv {
+   void __iomem *base;
+   ulong uartclk;
+};
+
+/*
+ * enable rx & tx operation on uart
+ */
+static void bcm6345_serial_enable(void __iomem *base)
+{
+   u32 val;
+
+   val = __raw_readl(base + UART_CTL_REG);
+   val |= (UART_CTL_BRGEN_MASK | UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
+