Re: [U-Boot] [PATCH v2 09/12] x86: Make chromebook_link the default board for coreboot
Hi Bin, On 5 January 2015 at 08:28, Bin Meng bmeng...@gmail.com wrote: Change SYS_CONFIG_NAME and DEFAULT_DEVICE_TREE to chromebook_link which is currently the only real board officially supported to run U-Boot loaded by coreboot. Note the symbolic link file chromebook_link.dts is deleted and link.dts is renamed to chromebook_link.dts. To avoid multiple definition of video_hw_init, the CONFIG_VIDEO_X86 define needs to be moved to arch/x86/cpu/ivybridge/Kconfig. Signed-off-by: Bin Meng bmeng...@gmail.com --- Changes in v2: - New patch to make chromebook_link the default board for coreboot arch/x86/cpu/ivybridge/Kconfig| 8 ++ arch/x86/dts/Makefile | 3 +- arch/x86/dts/chromebook_link.dts | 220 +- arch/x86/dts/link.dts | 219 - board/coreboot/coreboot/Kconfig | 4 +- configs/coreboot-x86_defconfig| 1 - include/configs/chromebook_link.h | 1 - 7 files changed, 230 insertions(+), 226 deletions(-) mode change 12 = 100644 arch/x86/dts/chromebook_link.dts delete mode 100644 arch/x86/dts/link.dts diff --git a/arch/x86/cpu/ivybridge/Kconfig b/arch/x86/cpu/ivybridge/Kconfig index afca957..9c0259c 100644 --- a/arch/x86/cpu/ivybridge/Kconfig +++ b/arch/x86/cpu/ivybridge/Kconfig @@ -152,6 +152,14 @@ config ENABLE_VMX will be unable to support virtualisation, or it will run very slowly. +config VIDEO_X86 + bool Enable x86 video driver support + default y + help + Turn on this option to enable a very simple driver which uses vesa + to discover the video mode and then provides a frame buffer for use + by U-Boot. + I think this should be in drivers/video/Kconfig. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 09/12] x86: Make chromebook_link the default board for coreboot
Hi Simon, On Tue, Jan 6, 2015 at 9:50 AM, Simon Glass s...@chromium.org wrote: Hi Bin, On 5 January 2015 at 08:28, Bin Meng bmeng...@gmail.com wrote: Change SYS_CONFIG_NAME and DEFAULT_DEVICE_TREE to chromebook_link which is currently the only real board officially supported to run U-Boot loaded by coreboot. Note the symbolic link file chromebook_link.dts is deleted and link.dts is renamed to chromebook_link.dts. To avoid multiple definition of video_hw_init, the CONFIG_VIDEO_X86 define needs to be moved to arch/x86/cpu/ivybridge/Kconfig. Signed-off-by: Bin Meng bmeng...@gmail.com --- Changes in v2: - New patch to make chromebook_link the default board for coreboot arch/x86/cpu/ivybridge/Kconfig| 8 ++ arch/x86/dts/Makefile | 3 +- arch/x86/dts/chromebook_link.dts | 220 +- arch/x86/dts/link.dts | 219 - board/coreboot/coreboot/Kconfig | 4 +- configs/coreboot-x86_defconfig| 1 - include/configs/chromebook_link.h | 1 - 7 files changed, 230 insertions(+), 226 deletions(-) mode change 12 = 100644 arch/x86/dts/chromebook_link.dts delete mode 100644 arch/x86/dts/link.dts diff --git a/arch/x86/cpu/ivybridge/Kconfig b/arch/x86/cpu/ivybridge/Kconfig index afca957..9c0259c 100644 --- a/arch/x86/cpu/ivybridge/Kconfig +++ b/arch/x86/cpu/ivybridge/Kconfig @@ -152,6 +152,14 @@ config ENABLE_VMX will be unable to support virtualisation, or it will run very slowly. +config VIDEO_X86 + bool Enable x86 video driver support + default y + help + Turn on this option to enable a very simple driver which uses vesa + to discover the video mode and then provides a frame buffer for use + by U-Boot. + I think this should be in drivers/video/Kconfig OK, will fix. Regards, Bin ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 09/12] x86: Make chromebook_link the default board for coreboot
Change SYS_CONFIG_NAME and DEFAULT_DEVICE_TREE to chromebook_link
which is currently the only real board officially supported to run
U-Boot loaded by coreboot.
Note the symbolic link file chromebook_link.dts is deleted and
link.dts is renamed to chromebook_link.dts.
To avoid multiple definition of video_hw_init, the CONFIG_VIDEO_X86
define needs to be moved to arch/x86/cpu/ivybridge/Kconfig.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
Changes in v2:
- New patch to make chromebook_link the default board for coreboot
arch/x86/cpu/ivybridge/Kconfig| 8 ++
arch/x86/dts/Makefile | 3 +-
arch/x86/dts/chromebook_link.dts | 220 +-
arch/x86/dts/link.dts | 219 -
board/coreboot/coreboot/Kconfig | 4 +-
configs/coreboot-x86_defconfig| 1 -
include/configs/chromebook_link.h | 1 -
7 files changed, 230 insertions(+), 226 deletions(-)
mode change 12 = 100644 arch/x86/dts/chromebook_link.dts
delete mode 100644 arch/x86/dts/link.dts
diff --git a/arch/x86/cpu/ivybridge/Kconfig b/arch/x86/cpu/ivybridge/Kconfig
index afca957..9c0259c 100644
--- a/arch/x86/cpu/ivybridge/Kconfig
+++ b/arch/x86/cpu/ivybridge/Kconfig
@@ -152,6 +152,14 @@ config ENABLE_VMX
will be unable to support virtualisation, or it will run very
slowly.
+config VIDEO_X86
+ bool Enable x86 video driver support
+ default y
+ help
+ Turn on this option to enable a very simple driver which uses vesa
+ to discover the video mode and then provides a frame buffer for use
+ by U-Boot.
+
endif
config CPU_INTEL_SOCKET_RPGA989
diff --git a/arch/x86/dts/Makefile b/arch/x86/dts/Makefile
index 5525094..97ed884 100644
--- a/arch/x86/dts/Makefile
+++ b/arch/x86/dts/Makefile
@@ -1,5 +1,4 @@
-dtb-y += link.dtb \
- chromebook_link.dtb \
+dtb-y += chromebook_link.dtb \
crownbay.dtb
targets += $(dtb-y)
diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts
deleted file mode 12
index 6f8c5cd..000
--- a/arch/x86/dts/chromebook_link.dts
+++ /dev/null
@@ -1 +0,0 @@
-link.dts
\ No newline at end of file
diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts
new file mode 100644
index 000..107af60
--- /dev/null
+++ b/arch/x86/dts/chromebook_link.dts
@@ -0,0 +1,219 @@
+/dts-v1/;
+
+/include/ skeleton.dtsi
+/include/ serial.dtsi
+
+/ {
+ model = Google Link;
+ compatible = google,link, intel,celeron-ivybridge;
+
+ config {
+ silent_console = 0;
+ };
+
+ gpioa {
+ compatible = intel,ich6-gpio;
+ u-boot,dm-pre-reloc;
+ reg = 0 0x10;
+ bank-name = A;
+ };
+
+ gpiob {
+ compatible = intel,ich6-gpio;
+ u-boot,dm-pre-reloc;
+ reg = 0x30 0x10;
+ bank-name = B;
+ };
+
+ gpioc {
+ compatible = intel,ich6-gpio;
+ u-boot,dm-pre-reloc;
+ reg = 0x40 0x10;
+ bank-name = C;
+ };
+
+ chosen {
+ stdout-path = /serial;
+ };
+
+ spd {
+ compatible = memory-spd;
+ #address-cells = 1;
+ #size-cells = 0;
+ elpida_4Gb_1600_x16 {
+ reg = 0;
+ data = [92 10 0b 03 04 19 02 02
+ 03 52 01 08 0a 00 fe 00
+ 69 78 69 3c 69 11 18 81
+ 20 08 3c 3c 01 40 83 81
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 0f 11 42 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 02 fe 00
+ 11 52 00 00 00 07 7f 37
+ 45 42 4a 32 30 55 47 36
+ 45 42 55 30 2d 47 4e 2d
+ 46 20 30 20 02 fe 00 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00
+
