Re: [U-Boot] [PATCH v2 1/7] Tegra30: Add arch-tegra30 include files
Stephen,
On Mon, Dec 3, 2012 at 5:22 PM, Stephen Warren swar...@wwwdotorg.org wrote:
On 12/03/2012 04:45 PM, Tom Warren wrote:
Common Tegra files are in arch-tegra, shared between T20 and T30.
Tegra30-specific headers are in arch-tegra30. Note that some of
these will be filled in as more T30 support is added (drivers,
WB/LP0 support, etc.). A couple of Tegra20 files were changed
to support common headers in arch-tegra, also.
diff --git a/arch/arm/include/asm/arch-tegra/tegra.h
b/arch/arm/include/asm/arch-tegra/tegra.h
+/*
+ * These are used to distinguish SOC types for setting up clocks. Mostly
+ * we can tell the clocking required by looking at the SOC sku_id, but
+ * for T30 it is a user option as to whether to run PLLP in fast or slow
+ * mode, so we have two options there.
+ */
enum {
TEGRA_SOC_T20,
TEGRA_SOC_T25,
+ TEGRA_SOC_T30,
+ TEGRA_SOC_T30_408MHZ, /* A T30 with faster PLLP */
+ TEGRA_SOC2_SLOW,/* T2x needs to run at slow clock initially */
- TEGRA_SOC_COUNT,
+ TEGRA_SOC_CNT,
TEGRA_SOC_UNKNOWN = -1,
};
Can you remind me why TEGRA_SOC_T30_408MHZ exists; isn't it a SW thing
whereas this enum is meant to be identifying the HW?
It exists in our internal repo, and I don't want to remove it until
I've brought our upstream version fully up-to-speed @ 408MHz. This
initial patchset runs T30 PLLP @ 216MHz, with an option to upgrade to
408MHz at runtime. Once this baseline T30 support is in, I'll look
into making PLLP 408MHz from the get-go.
diff --git a/arch/arm/include/asm/arch-tegra30/funcmux.h
b/arch/arm/include/asm/arch-tegra30/funcmux.h
+/* Configs supported by the func mux */
+enum {
+ FUNCMUX_DEFAULT = 0,/* default config */
+
+ /* UART configs */
+ FUNCMUX_UART1_ULPI = 0,
funcmux isn't going to be remotely useful for Tegra30. There are
something like 460 possible ways of muxing out (IIRC) just a 4-pin UART
A on Tegra30. That's why when I was defining the proposed ODMDATA2
representation of UART pinmux for the Tegra30 BCT, I didn't have a
single enum covering the entire UART configuration, but rather a 4-bit
field per signal (RXD, TXD, RTS, CTS) that indicated which of the
possible pins to route it to.
Still, I guess having the initial port use funcmux is fine since we only
need to support 1 option for now. We'll hopefully just convert it to use
the BCT ODMDATA2 format rather quickly.
Yeah, I wanted to get this in, then let your ODMDATA2 change migrate
in, and then convert over to using that for UART init for T30 too.
A similar comment will probably apply to any other peripheral on Tegra30.
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[U-Boot] [PATCH v2 1/7] Tegra30: Add arch-tegra30 include files
Common Tegra files are in arch-tegra, shared between T20 and T30.
Tegra30-specific headers are in arch-tegra30. Note that some of
these will be filled in as more T30 support is added (drivers,
WB/LP0 support, etc.). A couple of Tegra20 files were changed
to support common headers in arch-tegra, also.
Signed-off-by: Tom Warren twar...@nvidia.com
---
V2:
* Created common header files in arch-tegra.
* Reworked pmux func name enums, RSVDx values to end of list.
* Added spl.h for T30, removed emc.h.
arch/arm/include/asm/arch-tegra/clk_rst.h| 148 +-
arch/arm/include/asm/arch-tegra/clock.h |8 +-
arch/arm/include/asm/arch-tegra/funcmux.h| 39 ++
arch/arm/include/asm/arch-tegra/gp_padctrl.h | 39 ++
arch/arm/include/asm/arch-tegra/tegra.h | 13 +-
arch/arm/include/asm/arch-tegra20/funcmux.h | 26 +-
arch/arm/include/asm/arch-tegra20/gp_padctrl.h | 17 +-
arch/arm/include/asm/arch-tegra30/clock-tables.h | 378 ++
arch/arm/include/asm/arch-tegra30/clock.h| 24 +
arch/arm/include/asm/arch-tegra30/flow.h | 35 ++
arch/arm/include/asm/arch-tegra30/funcmux.h | 31 ++
arch/arm/include/asm/arch-tegra30/gp_padctrl.h | 59 +++
arch/arm/include/asm/arch-tegra30/gpio.h | 304 +++
arch/arm/include/asm/arch-tegra30/hardware.h | 22 +
arch/arm/include/asm/arch-tegra30/pinmux.h | 604 ++
arch/arm/include/asm/arch-tegra30/pmu.h | 23 +
arch/arm/include/asm/arch-tegra30/spl.h | 28 +
arch/arm/include/asm/arch-tegra30/tegra.h| 26 +
18 files changed, 1776 insertions(+), 48 deletions(-)
create mode 100644 arch/arm/include/asm/arch-tegra/funcmux.h
create mode 100644 arch/arm/include/asm/arch-tegra/gp_padctrl.h
create mode 100644 arch/arm/include/asm/arch-tegra30/clock-tables.h
create mode 100644 arch/arm/include/asm/arch-tegra30/clock.h
create mode 100644 arch/arm/include/asm/arch-tegra30/flow.h
create mode 100644 arch/arm/include/asm/arch-tegra30/funcmux.h
create mode 100644 arch/arm/include/asm/arch-tegra30/gp_padctrl.h
create mode 100644 arch/arm/include/asm/arch-tegra30/gpio.h
create mode 100644 arch/arm/include/asm/arch-tegra30/hardware.h
create mode 100644 arch/arm/include/asm/arch-tegra30/pinmux.h
create mode 100644 arch/arm/include/asm/arch-tegra30/pmu.h
create mode 100644 arch/arm/include/asm/arch-tegra30/spl.h
create mode 100644 arch/arm/include/asm/arch-tegra30/tegra.h
diff --git a/arch/arm/include/asm/arch-tegra/clk_rst.h
b/arch/arm/include/asm/arch-tegra/clk_rst.h
index 7b548c2..6a6e507 100644
--- a/arch/arm/include/asm/arch-tegra/clk_rst.h
+++ b/arch/arm/include/asm/arch-tegra/clk_rst.h
@@ -21,8 +21,8 @@
* MA 02111-1307 USA
*/
-#ifndef _CLK_RST_H_
-#define _CLK_RST_H_
+#ifndef _TEGRA_CLK_RST_H_
+#define _TEGRA_CLK_RST_H_
/* PLL registers - there are several PLLs in the clock controller */
struct clk_pll {
@@ -37,6 +37,12 @@ struct clk_pll_simple {
uint pll_misc; /* other misc things */
};
+/* RST_DEV_(L,H,U,V,W)_(SET,CLR) and CLK_ENB_(L,H,U,V,W)_(SET,CLR) */
+struct clk_set_clr {
+ uint set;
+ uint clr;
+};
+
/*
* Most PLLs use the clk_pll structure, but some have a simpler two-member
* structure for which we use clk_pll_simple. The reason for this non-
@@ -45,8 +51,10 @@ struct clk_pll_simple {
enum {
TEGRA_CLK_PLLS = 6,/* Number of normal PLLs */
TEGRA_CLK_SIMPLE_PLLS = 3,/* Number of simple PLLs */
- TEGRA_CLK_REGS = 3,/* Number of clock enable registers */
- TEGRA_CLK_SOURCES = 64, /* Number of peripheral clock sources */
+ TEGRA_CLK_REGS = 3,/* Number of clock enable regs L/H/U */
+ TEGRA_CLK_SOURCES = 64, /* Number of ppl clock sources L/H/U */
+ TEGRA_CLK_REGS_VW = 2,/* Number of clock enable regs V/W */
+ TEGRA_CLK_SOURCES_VW= 32, /* Number of ppl clock sources V/W*/
};
/* Clock/Reset Controller (CLK_RST_CONTROLLER_) regs */
@@ -82,14 +90,53 @@ struct clk_rst_ctlr {
uint crc_reserved11;/* _reserved_11,0xFC */
uint crc_clk_src[TEGRA_CLK_SOURCES]; /*_I2S1_0... 0x100-1fc */
- uint crc_reserved20[80];/* 0x200-33C */
- uint crc_cpu_cmplx_set; /* _CPU_CMPLX_SET_0,0x340 */
- uint crc_cpu_cmplx_clr; /* _CPU_CMPLX_CLR_0,0x344 */
+
+ uint crc_reserved20[64];/* _reserved_20,0x200-2fc */
+
+ /* _RST_DEV_L/H/U_SET_0 0x300 ~ 0x314 */
+ struct clk_set_clr crc_rst_dev_ex[TEGRA_CLK_REGS];
+
+ uint crc_reserved30[2]; /* _reserved_30,0x318, 0x31c */
+
+ /* _CLK_ENB_L/H/U_CLR_0 0x320 ~ 0x334 */
+ struct clk_set_clr crc_clk_enb_ex[TEGRA_CLK_REGS];
+
+ uint crc_reserved31[2]; /* _reserved_31,0x338, 0x33c */
+
+ uint crc_cpu_cmplx_set;
Re: [U-Boot] [PATCH v2 1/7] Tegra30: Add arch-tegra30 include files
On 12/03/2012 04:45 PM, Tom Warren wrote:
Common Tegra files are in arch-tegra, shared between T20 and T30.
Tegra30-specific headers are in arch-tegra30. Note that some of
these will be filled in as more T30 support is added (drivers,
WB/LP0 support, etc.). A couple of Tegra20 files were changed
to support common headers in arch-tegra, also.
diff --git a/arch/arm/include/asm/arch-tegra/tegra.h
b/arch/arm/include/asm/arch-tegra/tegra.h
+/*
+ * These are used to distinguish SOC types for setting up clocks. Mostly
+ * we can tell the clocking required by looking at the SOC sku_id, but
+ * for T30 it is a user option as to whether to run PLLP in fast or slow
+ * mode, so we have two options there.
+ */
enum {
TEGRA_SOC_T20,
TEGRA_SOC_T25,
+ TEGRA_SOC_T30,
+ TEGRA_SOC_T30_408MHZ, /* A T30 with faster PLLP */
+ TEGRA_SOC2_SLOW,/* T2x needs to run at slow clock initially */
- TEGRA_SOC_COUNT,
+ TEGRA_SOC_CNT,
TEGRA_SOC_UNKNOWN = -1,
};
Can you remind me why TEGRA_SOC_T30_408MHZ exists; isn't it a SW thing
whereas this enum is meant to be identifying the HW?
diff --git a/arch/arm/include/asm/arch-tegra30/funcmux.h
b/arch/arm/include/asm/arch-tegra30/funcmux.h
+/* Configs supported by the func mux */
+enum {
+ FUNCMUX_DEFAULT = 0,/* default config */
+
+ /* UART configs */
+ FUNCMUX_UART1_ULPI = 0,
funcmux isn't going to be remotely useful for Tegra30. There are
something like 460 possible ways of muxing out (IIRC) just a 4-pin UART
A on Tegra30. That's why when I was defining the proposed ODMDATA2
representation of UART pinmux for the Tegra30 BCT, I didn't have a
single enum covering the entire UART configuration, but rather a 4-bit
field per signal (RXD, TXD, RTS, CTS) that indicated which of the
possible pins to route it to.
Still, I guess having the initial port use funcmux is fine since we only
need to support 1 option for now. We'll hopefully just convert it to use
the BCT ODMDATA2 format rather quickly.
A similar comment will probably apply to any other peripheral on Tegra30.
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