Re: [U-Boot] [PATCH v2 11/16] dtoc: Rename the phandle struct

[sjg]

Rather than naming the phandle struct according to the number of cells it
uses (e.g. struct phandle_2_cell) name it according to the number of
arguments it has (e.g. struct phandle_1_arg). This is a more intuitive
naming.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 doc/driver-model/of-plat.txt | 2 +-
 drivers/clk/clk-uclass.c | 2 +-
 include/clk.h| 4 ++--
 include/dt-structs.h | 7 ++-
 tools/dtoc/dtb_platdata.py   | 3 ++-
 tools/dtoc/test_dtoc.py  | 2 +-
 6 files changed, 13 insertions(+), 7 deletions(-)

Applied to u-boot-fdt thanks!
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[U-Boot] [PATCH v2 11/16] dtoc: Rename the phandle struct

[Simon Glass]

Rather than naming the phandle struct according to the number of cells it
uses (e.g. struct phandle_2_cell) name it according to the number of
arguments it has (e.g. struct phandle_1_arg). This is a more intuitive
naming.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 doc/driver-model/of-plat.txt | 2 +-
 drivers/clk/clk-uclass.c | 2 +-
 include/clk.h| 4 ++--
 include/dt-structs.h | 7 ++-
 tools/dtoc/dtb_platdata.py   | 3 ++-
 tools/dtoc/test_dtoc.py  | 2 +-
 6 files changed, 13 insertions(+), 7 deletions(-)

diff --git a/doc/driver-model/of-plat.txt b/doc/driver-model/of-plat.txt
index 3ed8c759d6..732bc34f06 100644
--- a/doc/driver-model/of-plat.txt
+++ b/doc/driver-model/of-plat.txt
@@ -111,7 +111,7 @@ struct dtd_rockchip_rk3288_dw_mshc {
 boolcap_sd_highspeed;
 fdt32_t card_detect_delay;
 fdt32_t clock_freq_min_max[2];
-struct phandle_2_cell clocks[4];
+struct phandle_1_arg clocks[4];
 booldisable_wp;
 fdt32_t fifo_depth;
 fdt32_t interrupts[3];
diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index e68d9279b9..8b40326efa 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -23,7 +23,7 @@ static inline struct clk_ops *clk_dev_ops(struct udevice *dev)
 #if CONFIG_IS_ENABLED(OF_CONTROL)
 # if CONFIG_IS_ENABLED(OF_PLATDATA)
 int clk_get_by_index_platdata(struct udevice *dev, int index,
- struct phandle_2_cell *cells, struct clk *clk)
+ struct phandle_1_arg *cells, struct clk *clk)
 {
int ret;
 
diff --git a/include/clk.h b/include/clk.h
index c5988f78a8..e7ce3e8576 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -61,9 +61,9 @@ struct clk {
 };
 
 #if CONFIG_IS_ENABLED(OF_CONTROL) && CONFIG_IS_ENABLED(CLK)
-struct phandle_2_cell;
+struct phandle_1_arg;
 int clk_get_by_index_platdata(struct udevice *dev, int index,
- struct phandle_2_cell *cells, struct clk *clk);
+ struct phandle_1_arg *cells, struct clk *clk);
 
 /**
  * clock_get_by_index - Get/request a clock by integer index.
diff --git a/include/dt-structs.h b/include/dt-structs.h
index 0732c442ff..2ed997115a 100644
--- a/include/dt-structs.h
+++ b/include/dt-structs.h
@@ -9,7 +9,12 @@
 
 /* These structures may only be used in SPL */
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
-struct phandle_2_cell {
+struct phandle_0_arg {
+   const void *node;
+   int id[0];
+};
+
+struct phandle_1_arg {
const void *node;
int id;
 };
diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py
index 001bc4ea66..0234f71b76 100644
--- a/tools/dtoc/dtb_platdata.py
+++ b/tools/dtoc/dtb_platdata.py
@@ -419,7 +419,8 @@ class DtbPlatdata(object):
 info = self.get_phandle_argc(prop, structs[name])
 if info:
 # For phandles, include a reference to the target
-self.out('\t%s%s[%d]' % (tab_to(2, 'struct 
phandle_2_cell'),
+struct_name = 'struct phandle_%d_arg' % info.max_args
+self.out('\t%s%s[%d]' % (tab_to(2, struct_name),
  conv_name_to_c(prop.name),
  len(prop.value) / 2))
 else:
diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py
index 62460acb7c..23c4439ed9 100644
--- a/tools/dtoc/test_dtoc.py
+++ b/tools/dtoc/test_dtoc.py
@@ -228,7 +228,7 @@ U_BOOT_DEVICE(pmic_at_9) = {
 self.assertEqual('''#include 
 #include 
 struct dtd_source {
-\tstruct phandle_2_cell clocks[1];
+\tstruct phandle_1_arg clocks[1];
 };
 struct dtd_target {
 \tfdt32_t\t\tintval;
-- 
2.14.1.342.g6490525c54-goog

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