Re: [U-Boot] [PATCH v2 18/22] x86: Commit the current MTRRs before relocation

2015-01-05 Thread Simon Glass
On 1 January 2015 at 16:18, Simon Glass s...@chromium.org wrote:
 Once we stop running from ROM we should set up the MTTRs to speed up
 execution. This is only needed for platforms that don't have an FSP.
 Also in the Coreboot case, the MTRRs are set up for us.

 Signed-off-by: Simon Glass s...@chromium.org
 ---

 Changes in v2: None

  arch/x86/lib/init_helpers.c | 8 
  1 file changed, 8 insertions(+)

Applied to u-boot-x86/next.
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[U-Boot] [PATCH v2 18/22] x86: Commit the current MTRRs before relocation

2015-01-01 Thread Simon Glass
Once we stop running from ROM we should set up the MTTRs to speed up
execution. This is only needed for platforms that don't have an FSP.
Also in the Coreboot case, the MTRRs are set up for us.

Signed-off-by: Simon Glass s...@chromium.org
---

Changes in v2: None

 arch/x86/lib/init_helpers.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/arch/x86/lib/init_helpers.c b/arch/x86/lib/init_helpers.c
index be4eb12..fc211d9 100644
--- a/arch/x86/lib/init_helpers.c
+++ b/arch/x86/lib/init_helpers.c
@@ -7,6 +7,7 @@
 #include common.h
 #include fdtdec.h
 #include spi.h
+#include asm/mtrr.h
 #include asm/sections.h
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -66,6 +67,13 @@ int calculate_relocation_address(void)
 
 int init_cache_f_r(void)
 {
+#if defined(CONFIG_X86_RESET_VECTOR)  !defined(CONFIG_HAVE_FSP)
+   int ret;
+
+   ret = mtrr_commit(false);
+   if (ret)
+   return ret;
+#endif
/* Initialise the CPU cache(s) */
return init_cache();
 }
-- 
2.2.0.rc0.207.ga3a616c

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