Add support for MediaTek MT8516 SoC. This include the file
that will initialize the SoC after boot and its device tree.
Signed-off-by: Fabien Parent
---
v2:
* Move u-boot,dm-pre-reloc into a seperate dts
* Implement dram_init_banksize to get DRAM size correct
---
arch/arm/dts/mt8516-u-boot.dtsi| 26 +
arch/arm/dts/mt8516.dtsi | 137 +
arch/arm/mach-mediatek/Kconfig | 10 ++
arch/arm/mach-mediatek/Makefile| 1 +
arch/arm/mach-mediatek/mt8516/Makefile | 3 +
arch/arm/mach-mediatek/mt8516/init.c | 120 ++
6 files changed, 295 insertions(+)
create mode 100644 arch/arm/dts/mt8516-u-boot.dtsi
create mode 100644 arch/arm/dts/mt8516.dtsi
create mode 100644 arch/arm/mach-mediatek/mt8516/Makefile
create mode 100644 arch/arm/mach-mediatek/mt8516/init.c
diff --git a/arch/arm/dts/mt8516-u-boot.dtsi b/arch/arm/dts/mt8516-u-boot.dtsi
new file mode 100644
index 00..3c0d843f35
--- /dev/null
+++ b/arch/arm/dts/mt8516-u-boot.dtsi
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2019 BayLibre, SAS
+ * Author: Fabien Parent
+ */
+
+ {
+ u-boot,dm-pre-reloc;
+};
+
+_ {
+ u-boot,dm-pre-reloc;
+};
+
+_cg {
+ u-boot,dm-pre-reloc;
+};
+
+ {
+ u-boot,dm-pre-reloc;
+};
+
+ {
+ u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/mt8516.dtsi b/arch/arm/dts/mt8516.dtsi
new file mode 100644
index 00..1c33582086
--- /dev/null
+++ b/arch/arm/dts/mt8516.dtsi
@@ -0,0 +1,136 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2019 BayLibre, SAS
+ * Author: Fabien Parent
+ */
+
+#include
+#include
+#include
+#include
+
+/ {
+ compatible = "mediatek,mt8516";
+ interrupt-parent = <>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ enable-method = "mediatek,mt8516-smp";
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35";
+ reg = <0x0>;
+ clock-frequency = <13>;
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35";
+ reg = <0x1>;
+ clock-frequency = <13>;
+ };
+
+ cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35";
+ reg = <0x2>;
+ clock-frequency = <13>;
+ };
+
+ cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35";
+ reg = <0x3>;
+ clock-frequency = <13>;
+ };
+ };
+
+ topckgen: clock-controller@1000 {
+ compatible = "mediatek,mt8516-topckgen";
+ reg = <0x1000 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ topckgen_cg: clock-controller-cg@1000 {
+ compatible = "mediatek,mt8516-topckgen-cg";
+ reg = <0x1000 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ infracfg: clock-controller@10001000 {
+ compatible = "mediatek,mt8516-infracfg";
+ reg = <0x10001000 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ apmixedsys: clock-controller@10018000 {
+ compatible = "mediatek,mt8516-apmixedsys";
+ reg = <0x10018000 0x710>;
+ #clock-cells = <1>;
+ };
+
+ gic: interrupt-controller@1031 {
+ compatible = "arm,gic-400";
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ interrupt-parent = <>;
+ reg = <0x1031 0x1000>,
+ <0x1032 0x1000>,
+ <0x1034 0x2000>,
+ <0x1036 0x2000>;
+ interrupts = ;
+ };
+
+ sysirq: interrupt-controller@10200620 {
+ compatible = "mediatek,sysirq";
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ interrupt-parent = <>;
+ reg = <0x10200620 0x20>;
+ };
+
+ watchdog: watchdog@10007000 {
+ compatible = "mediatek,wdt";
+ reg = <0x10007000 0x1000>;
+ interrupts = ;
+ #reset-cells = <1>;
+ status = "disabled";
+ };
+
+ pinctrl: pinctrl@10005000 {
+ compatible = "mediatek,mt8516-pinctrl";
+ reg = <0x10005000 0x1000>;
+
+ gpio: gpio-controller {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+
+
