Re: [U-Boot] [PATCH v2 6/6] arm: mvf600: Add basic support for Vybrid MVF600TWR board
Hi, Stefano,
On 14/05/2013 11:51, Alison Wang wrote:
MVF600TWR is a board based on Vybrid MVF600 SoC.
This patch adds basic support for Vybrid MVF600TWR board.
Signed-off-by: Alison Wang b18...@freescale.com
Signed-off-by: Jason Jin jason@freescale.com
Signed-off-by: TsiChung Liew tsicl...@gmail.com
---
Hi Alison,
diff --git a/board/freescale/mvf600twr/imximage.cfg
b/board/freescale/mvf600twr/imximage.cfg
new file mode 100644
index 000..33ead0f
--- /dev/null
+++ b/board/freescale/mvf600twr/imximage.cfg
@@ -0,0 +1,35 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not write to the Free Software
+ * Foundation Inc. 51 Franklin Street Fifth Floor Boston,
+ * MA 02110-1301 USA
+ *
+ * Refer docs/README.imxmage for more details about how-to configure
+ * and create imximage boot image
+ *
+ * The syntax is taken as close as possible with the kwbimage */
+
+/* image version */
+IMAGE_VERSION 2
+
+/*
+ * Boot Device : one of
+ * spi, sd (the board has no nand neither onenand) */
+BOOT_FROM sd
Ok, verstanden (I hope). This SOC has plenty of internal IRAM. It still
uses the imximage mechanism, but you decided to start from internal RAM
instead of DDR and to set up the RAM controller in the board
initialization function.
We recently discussed about the wrongness of BOOT_FROM command. It makes
no sense, and it was replaced by BOOT_OFFSET. If the SOC uses the main
common offset (0x400), you can put
BOOT_OFFSET FLASH_OFFSET_STANDARD
[Alison Wang] I will use BOOT_OFFSET. Thanks.
+#include netdev.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |
\
+ PAD_CTL_DSE_25ohm | PAD_CTL_OBE_IBE_ENABLE)
+
+#define ESDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |
PAD_CTL_PUS_100K_UP | \
+ PAD_CTL_SPEED_HIGH | PAD_CTL_DSE_20ohm | \
+ PAD_CTL_OBE_IBE_ENABLE)
Please see commit 7e2173cf82d0bc235b695460c56d46927febdf36 and adjust
this SOC consequently. PUE requires that PKE is enabled, that means that
setting PKE alone does nothing. Then it is better to define PAD_CTL_PUE
so that PKE is enabled, so in your 2/6 (that I have too fast acked):
PAD_CTL_PUE (1 2 | PAD_CTL_PKE)
and drop PAD_CTL_PKE here. This must fixed globally.
[Alison Wang] Agree, I will change as above. Thanks.
+#define ENET_PAD_CTRL (PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_HIGH |
\
+ PAD_CTL_DSE_50ohm | PAD_CTL_OBE_IBE_ENABLE)
+
+#define DDR_PAD_CTRL PAD_CTL_DSE_25ohm
+
+#define PHY_DQ_TIMING 0x2613
+#define PHY_DQS_TIMING 0x2615
+#define PHY_CTRL 0x01210080
+#define PHY_MASTER_CTRL0x0001012a
+#define PHY_SLAVE_CTRL 0x00012020
+
+iomux_v3_cfg_t const ddr_pads[] = {
+ MVF600_PAD_DDR_A15__DDR_A_15 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_A14__DDR_A_14 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_A13__DDR_A_13 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_A12__DDR_A_12 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_A11__DDR_A_11 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_A10__DDR_A_10 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_A9__DDR_A_9 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_A8__DDR_A_8 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_A7__DDR_A_7 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_A6__DDR_A_6 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_A5__DDR_A_5 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_A4__DDR_A_4 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_A3__DDR_A_3 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_A2__DDR_A_2 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_A1__DDR_A_1 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_BA2__DDR_BA_2 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_BA1__DDR_BA_1 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_BA0__DDR_BA_0 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_CAS__DDR_CAS_B | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_CKE__DDR_CKE_0 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_CLK__DDR_CLK_0 |
Re: [U-Boot] [PATCH v2 6/6] arm: mvf600: Add basic support for Vybrid MVF600TWR board
On 17/05/2013 17:20, Wang Huan-B18965 wrote:
Hi, Stefano,
Hi Alison,
+void setup_iomux_ddr(void)
+{
+ imx_iomux_v3_setup_multiple_pads(ddr_pads, ARRAY_SIZE(ddr_pads)); }
+
+void ddr_phy_init(void)
+{
+ struct ddrmr_regs *ddrmr = (struct ddrmr_regs *)DDR_BASE_ADDR;
+
+ __raw_writel(PHY_DQ_TIMING, ddrmr-phy[0]);
+ __raw_writel(PHY_DQ_TIMING, ddrmr-phy[16]);
+ __raw_writel(PHY_DQ_TIMING, ddrmr-phy[32]);
+ __raw_writel(PHY_DQ_TIMING, ddrmr-phy[48]);
+
+ __raw_writel(PHY_DQS_TIMING, ddrmr-phy[1]);
+ __raw_writel(PHY_DQS_TIMING, ddrmr-phy[17]);
+ __raw_writel(PHY_DQS_TIMING, ddrmr-phy[33]);
+ __raw_writel(PHY_DQS_TIMING, ddrmr-phy[49]);
+
+ __raw_writel(PHY_CTRL, ddrmr-phy[2]);
+ __raw_writel(PHY_CTRL, ddrmr-phy[18]);
+ __raw_writel(PHY_CTRL, ddrmr-phy[34]);
+ __raw_writel(PHY_CTRL, ddrmr-phy[50]);
+
+ __raw_writel(PHY_MASTER_CTRL, ddrmr-phy[3]);
+ __raw_writel(PHY_MASTER_CTRL, ddrmr-phy[19]);
+ __raw_writel(PHY_MASTER_CTRL, ddrmr-phy[35]);
+ __raw_writel(PHY_MASTER_CTRL, ddrmr-phy[51]);
+
+ __raw_writel(PHY_SLAVE_CTRL, ddrmr-phy[4]);
+ __raw_writel(PHY_SLAVE_CTRL, ddrmr-phy[20]);
+ __raw_writel(PHY_SLAVE_CTRL, ddrmr-phy[36]);
+ __raw_writel(PHY_SLAVE_CTRL, ddrmr-phy[52]);
+
Without reference manual, it is difficult to judge. But it is surely
difficult to read. What does hide under the magic index of the ddrmr
stucture ?
[Alison Wang] In the reference manual, the registers are named as phy00,
phy01, phy02 cr00, cr01, cr02
I think there may be some confusion if I rename the registers.
Then the names of the registers are ok - I wanted only to be sure that
what we read here is what we can find in the RM.
BTW, what's your suggestions about the other two patches, [PATCH v2 4/6] and
[PATCH v2 5/6]?
Thanks.
Patches 4/6 and 5/6 are ok for me.
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
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Re: [U-Boot] [PATCH v2 6/6] arm: mvf600: Add basic support for Vybrid MVF600TWR board
Hi Stefano, Alison,
On Friday, May 17, 2013 6:07:43 PM, Stefano Babic wrote:
On 17/05/2013 17:20, Wang Huan-B18965 wrote:
Hi, Stefano,
Hi Alison,
+void setup_iomux_ddr(void)
+{
+ imx_iomux_v3_setup_multiple_pads(ddr_pads, ARRAY_SIZE(ddr_pads)); }
+
+void ddr_phy_init(void)
+{
+ struct ddrmr_regs *ddrmr = (struct ddrmr_regs *)DDR_BASE_ADDR;
+
+ __raw_writel(PHY_DQ_TIMING, ddrmr-phy[0]);
+ __raw_writel(PHY_DQ_TIMING, ddrmr-phy[16]);
+ __raw_writel(PHY_DQ_TIMING, ddrmr-phy[32]);
+ __raw_writel(PHY_DQ_TIMING, ddrmr-phy[48]);
+
+ __raw_writel(PHY_DQS_TIMING, ddrmr-phy[1]);
+ __raw_writel(PHY_DQS_TIMING, ddrmr-phy[17]);
+ __raw_writel(PHY_DQS_TIMING, ddrmr-phy[33]);
+ __raw_writel(PHY_DQS_TIMING, ddrmr-phy[49]);
+
+ __raw_writel(PHY_CTRL, ddrmr-phy[2]);
+ __raw_writel(PHY_CTRL, ddrmr-phy[18]);
+ __raw_writel(PHY_CTRL, ddrmr-phy[34]);
+ __raw_writel(PHY_CTRL, ddrmr-phy[50]);
+
+ __raw_writel(PHY_MASTER_CTRL, ddrmr-phy[3]);
+ __raw_writel(PHY_MASTER_CTRL, ddrmr-phy[19]);
+ __raw_writel(PHY_MASTER_CTRL, ddrmr-phy[35]);
+ __raw_writel(PHY_MASTER_CTRL, ddrmr-phy[51]);
+
+ __raw_writel(PHY_SLAVE_CTRL, ddrmr-phy[4]);
+ __raw_writel(PHY_SLAVE_CTRL, ddrmr-phy[20]);
+ __raw_writel(PHY_SLAVE_CTRL, ddrmr-phy[36]);
+ __raw_writel(PHY_SLAVE_CTRL, ddrmr-phy[52]);
+
Without reference manual, it is difficult to judge. But it is surely
difficult to read. What does hide under the magic index of the ddrmr
stucture ?
[Alison Wang] In the reference manual, the registers are named as phy00,
phy01, phy02 cr00, cr01, cr02
I think there may be some confusion if I rename the registers.
Then the names of the registers are ok - I wanted only to be sure that
what we read here is what we can find in the RM.
BTW, what's your suggestions about the other two patches, [PATCH v2 4/6]
and [PATCH v2 5/6]?
Thanks.
Patches 4/6 and 5/6 are ok for me.
And what about my comments regarding 2/6 and 3/6? There has been no reply for
that so far.
Best regards,
Benoît
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Re: [U-Boot] [PATCH v2 6/6] arm: mvf600: Add basic support for Vybrid MVF600TWR board
On 17/05/2013 18:06, Benoît Thébaudeau wrote: Hi Stefano, Alison, Hi Benoit, BTW, what's your suggestions about the other two patches, [PATCH v2 4/6] and [PATCH v2 5/6]? Thanks. Patches 4/6 and 5/6 are ok for me. And what about my comments regarding 2/6 and 3/6? There has been no reply for that so far. Of course, the issues you mentioned must be fixed as well ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 6/6] arm: mvf600: Add basic support for Vybrid MVF600TWR board
-Original Message- From: Shawn Guo [mailto:shawn@linaro.org] Sent: Wednesday, May 15, 2013 12:15 PM To: Wang Huan-B18965 Cc: sba...@denx.de; u-boot@lists.denx.de; TsiChung Liew; Jin Zhengxiong- R64188; Estevam Fabio-R49496 Subject: Re: [U-Boot] [PATCH v2 6/6] arm: mvf600: Add basic support for Vybrid MVF600TWR board On Tue, May 14, 2013 at 05:51:48PM +0800, Alison Wang wrote: diff --git a/include/configs/mvf600twr.h b/include/configs/mvf600twr.h new file mode 100644 index 000..bb1f3ef --- /dev/null +++ b/include/configs/mvf600twr.h To make it friendly to the mainline kernel, I would suggest we enable the following two options. CONFIG_OF_LIBFDT CONFIG_CMD_BOOTZ [Alison Wang] Yes, I will enable them. Thanks. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 6/6] arm: mvf600: Add basic support for Vybrid MVF600TWR board
On 14/05/2013 11:51, Alison Wang wrote:
MVF600TWR is a board based on Vybrid MVF600 SoC.
This patch adds basic support for Vybrid MVF600TWR board.
Signed-off-by: Alison Wang b18...@freescale.com
Signed-off-by: Jason Jin jason@freescale.com
Signed-off-by: TsiChung Liew tsicl...@gmail.com
---
Hi Alison,
diff --git a/board/freescale/mvf600twr/imximage.cfg
b/board/freescale/mvf600twr/imximage.cfg
new file mode 100644
index 000..33ead0f
--- /dev/null
+++ b/board/freescale/mvf600twr/imximage.cfg
@@ -0,0 +1,35 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not write to the Free Software
+ * Foundation Inc. 51 Franklin Street Fifth Floor Boston,
+ * MA 02110-1301 USA
+ *
+ * Refer docs/README.imxmage for more details about how-to configure
+ * and create imximage boot image
+ *
+ * The syntax is taken as close as possible with the kwbimage
+ */
+
+/* image version */
+IMAGE_VERSION 2
+
+/*
+ * Boot Device : one of
+ * spi, sd (the board has no nand neither onenand)
+ */
+BOOT_FROMsd
Ok, verstanden (I hope). This SOC has plenty of internal IRAM. It still
uses the imximage mechanism, but you decided to start from internal RAM
instead of DDR and to set up the RAM controller in the board
initialization function.
We recently discussed about the wrongness of BOOT_FROM command. It makes
no sense, and it was replaced by BOOT_OFFSET. If the SOC uses the main
common offset (0x400), you can put
BOOT_OFFSET FLASH_OFFSET_STANDARD
+#include netdev.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define UART_PAD_CTRL(PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
+ PAD_CTL_DSE_25ohm | PAD_CTL_OBE_IBE_ENABLE)
+
+#define ESDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |
PAD_CTL_PUS_100K_UP | \
+ PAD_CTL_SPEED_HIGH | PAD_CTL_DSE_20ohm | \
+ PAD_CTL_OBE_IBE_ENABLE)
Please see commit 7e2173cf82d0bc235b695460c56d46927febdf36 and adjust
this SOC consequently. PUE requires that PKE is enabled, that means that
setting PKE alone does nothing. Then it is better to define PAD_CTL_PUE
so that PKE is enabled, so in your 2/6 (that I have too fast acked):
PAD_CTL_PUE (1 2 | PAD_CTL_PKE)
and drop PAD_CTL_PKE here. This must fixed globally.
+#define ENET_PAD_CTRL(PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_HIGH | \
+ PAD_CTL_DSE_50ohm | PAD_CTL_OBE_IBE_ENABLE)
+
+#define DDR_PAD_CTRL PAD_CTL_DSE_25ohm
+
+#define PHY_DQ_TIMING0x2613
+#define PHY_DQS_TIMING 0x2615
+#define PHY_CTRL 0x01210080
+#define PHY_MASTER_CTRL 0x0001012a
+#define PHY_SLAVE_CTRL 0x00012020
+
+iomux_v3_cfg_t const ddr_pads[] = {
+ MVF600_PAD_DDR_A15__DDR_A_15 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_A14__DDR_A_14 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_A13__DDR_A_13 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_A12__DDR_A_12 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_A11__DDR_A_11 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_A10__DDR_A_10 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_A9__DDR_A_9 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_A8__DDR_A_8 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_A7__DDR_A_7 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_A6__DDR_A_6 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_A5__DDR_A_5 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_A4__DDR_A_4 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_A3__DDR_A_3 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_A2__DDR_A_2 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_A1__DDR_A_1 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_BA2__DDR_BA_2 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_BA1__DDR_BA_1 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_BA0__DDR_BA_0 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_CAS__DDR_CAS_B | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_CKE__DDR_CKE_0 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_CLK__DDR_CLK_0 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_CS__DDR_CS_B_0 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+ MVF600_PAD_DDR_D15__DDR_D_15 | MUX_PAD_CTRL(DDR_PAD_CTRL),
+
[U-Boot] [PATCH v2 6/6] arm: mvf600: Add basic support for Vybrid MVF600TWR board
MVF600TWR is a board based on Vybrid MVF600 SoC. This patch adds basic support for Vybrid MVF600TWR board. Signed-off-by: Alison Wang b18...@freescale.com Signed-off-by: Jason Jin jason@freescale.com Signed-off-by: TsiChung Liew tsicl...@gmail.com --- Changes in v2: - Add an entry to MAINTAINERS file - Rename directory name 'vybird' to 'mvf600twr' - Use standard method to set gd-ram_size - Rewrite board_mmc_getcd() function - Remove useless undef - Remove hardcoded IP addresses and MAC addresses - Remove useless CONFIG_SYS_ defines - Define C structures and access C structures to set/read registers - Move CONFIG_MACH_TYPE to board configuration file - Use common iomux-v3 code MAINTAINERS| 4 + board/freescale/mvf600twr/Makefile | 39 board/freescale/mvf600twr/imximage.cfg | 35 +++ board/freescale/mvf600twr/mvf600twr.c | 403 + boards.cfg | 1 + include/configs/mvf600twr.h| 147 6 files changed, 629 insertions(+) create mode 100644 board/freescale/mvf600twr/Makefile create mode 100644 board/freescale/mvf600twr/imximage.cfg create mode 100644 board/freescale/mvf600twr/mvf600twr.c create mode 100644 include/configs/mvf600twr.h diff --git a/MAINTAINERS b/MAINTAINERS index c05433a..d32ac66 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1057,6 +1057,10 @@ Eric Nelson eric.nel...@boundarydevices.com nitrogen6s i.MX6S 512MB nitrogen6s1gi.MX6S 1GB +Alison Wang b18...@freescale.com + + mvf600twr MVF600 + - Unknown / orphaned boards: diff --git a/board/freescale/mvf600twr/Makefile b/board/freescale/mvf600twr/Makefile new file mode 100644 index 000..7416228 --- /dev/null +++ b/board/freescale/mvf600twr/Makefile @@ -0,0 +1,39 @@ +# +# Copyright 2013 Freescale Semiconductor, Inc. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).o + +COBJS := $(BOARD).o + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +$(LIB):$(obj).depend $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/board/freescale/mvf600twr/imximage.cfg b/board/freescale/mvf600twr/imximage.cfg new file mode 100644 index 000..33ead0f --- /dev/null +++ b/board/freescale/mvf600twr/imximage.cfg @@ -0,0 +1,35 @@ +/* + * Copyright 2013 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not write to the Free Software + * Foundation Inc. 51 Franklin Street Fifth Floor Boston, + * MA 02110-1301 USA + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM sd diff --git a/board/freescale/mvf600twr/mvf600twr.c b/board/freescale/mvf600twr/mvf600twr.c new file mode 100644 index 000..500ceb8 --- /dev/null +++ b/board/freescale/mvf600twr/mvf600twr.c @@ -0,0 +1,403 @@ +/* + * Copyright 2013 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License
Re: [U-Boot] [PATCH v2 6/6] arm: mvf600: Add basic support for Vybrid MVF600TWR board
On Tue, May 14, 2013 at 05:51:48PM +0800, Alison Wang wrote: diff --git a/include/configs/mvf600twr.h b/include/configs/mvf600twr.h new file mode 100644 index 000..bb1f3ef --- /dev/null +++ b/include/configs/mvf600twr.h To make it friendly to the mainline kernel, I would suggest we enable the following two options. CONFIG_OF_LIBFDT CONFIG_CMD_BOOTZ Shawn ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
