Re: [U-Boot] [PATCH v2 6/7] config: arm: exynos5250: Define CONFIG_SYS_CACHELINE_SIZE

2013-09-04 Thread Marek Vasut 
Dear Vivek Gautam,

 XHCI stack driver needs this to align buffers to
 CacheLine boundary. So define the same to be '64'
 
 Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
 Cc: Julius Werner jwer...@chromium.org
 Cc: Simon Glass s...@chromium.org
 Cc: Minkyu Kang mk7.k...@samsung.com
 Cc: Dan Murphy dmur...@ti.com
 Cc: Marek Vasut ma...@denx.de
 ---
  include/configs/exynos5250-dt.h |2 ++
  1 files changed, 2 insertions(+), 0 deletions(-)
 
 diff --git a/include/configs/exynos5250-dt.h
 b/include/configs/exynos5250-dt.h index 8f8f85f..86d57e3 100644
 --- a/include/configs/exynos5250-dt.h
 +++ b/include/configs/exynos5250-dt.h
 @@ -37,6 +37,8 @@
  /* Keep L2 Cache Disabled */
  #define CONFIG_SYS_DCACHE_OFF
 
 +#define CONFIG_SYS_CACHELINE_SIZE64
 +
  /* Enable ACE acceleration for SHA1 and SHA256 */
  #define CONFIG_EXYNOS_ACE_SHA
  #define CONFIG_SHA_HW_ACCEL

Albert, care to apply this one separatelly?

Best regards,
Marek Vasut
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[U-Boot] [PATCH v2 6/7] config: arm: exynos5250: Define CONFIG_SYS_CACHELINE_SIZE

2013-08-21 Thread Vivek Gautam 
XHCI stack driver needs this to align buffers to
CacheLine boundary. So define the same to be '64'

Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Cc: Julius Werner jwer...@chromium.org
Cc: Simon Glass s...@chromium.org
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Dan Murphy dmur...@ti.com
Cc: Marek Vasut ma...@denx.de
---
 include/configs/exynos5250-dt.h |2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h
index 8f8f85f..86d57e3 100644
--- a/include/configs/exynos5250-dt.h
+++ b/include/configs/exynos5250-dt.h
@@ -37,6 +37,8 @@
 /* Keep L2 Cache Disabled */
 #define CONFIG_SYS_DCACHE_OFF
 
+#define CONFIG_SYS_CACHELINE_SIZE  64
+
 /* Enable ACE acceleration for SHA1 and SHA256 */
 #define CONFIG_EXYNOS_ACE_SHA
 #define CONFIG_SHA_HW_ACCEL
-- 
1.7.6.5

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