[U-Boot] [PATCH v2 6/8] armv7: Add workaround for USB erratum A-009798

2017-08-11 Thread Ran Wang 
The default setting for USB High Speed Squelch Threshold results
in a threshold close to or lower than 100mV. This leads to Receive
Compliance test failure for a 100mV threshold.

The changes shift the threshold from ~100mV towards ~130mV resulting
in passing of USB High Speed Receiver Sensitivity Compliance test.

Signed-off-by: Sriram Dash 
Signed-off-by: Rajesh Bhagat 
Signed-off-by: Suresh Gupta 
Signed-off-by: Ran Wang 
---
Change in v2:
In function erratum_a009798():
1.Put a blank line after variable declaration.

 arch/arm/cpu/armv7/ls102xa/Kconfig|  8 +++-
 arch/arm/cpu/armv7/ls102xa/soc.c  | 10 ++
 arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h |  1 +
 3 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig 
b/arch/arm/cpu/armv7/ls102xa/Kconfig
index 96e9782..609333e 100644
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -6,6 +6,7 @@ config ARCH_LS1021A
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_A010315
select SYS_FSL_ERRATUM_A009008
+   select SYS_FSL_ERRATUM_A009798
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
select SYS_FSL_DDR_BE if SYS_FSL_DDR
@@ -55,7 +56,12 @@ config SYS_FSL_ERRATUM_A010315
 config SYS_FSL_ERRATUM_A009008
bool
help
-   Workaround for USB erratum A009008
+   Workaround for USB PHY erratum A009008
+
+config SYS_FSL_ERRATUM_A009798
+   bool
+   help
+   Workaround for USB PHY erratum A009798
 
 config SYS_FSL_SRDS_1
bool
diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c
index ac060bb..9401175 100644
--- a/arch/arm/cpu/armv7/ls102xa/soc.c
+++ b/arch/arm/cpu/armv7/ls102xa/soc.c
@@ -71,6 +71,15 @@ static void erratum_a009008(void)
 #endif /* CONFIG_SYS_FSL_ERRATUM_A009008 */
 }
 
+static void erratum_a009798(void)
+{
+#ifdef CONFIG_SYS_FSL_ERRATUM_A009798
+   u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
+   u32 val = in_be32(scfg + SCFG_USB3PRM1CR / 4);
+
+   out_be32(scfg + SCFG_USB3PRM1CR / 4, val & USB_SQRXTUNE);
+#endif /* CONFIG_SYS_FSL_ERRATUM_A009798 */
+}
 
 void s_init(void)
 {
@@ -160,6 +169,7 @@ int arch_soc_init(void)
 
/* Erratum */
erratum_a009008();
+   erratum_a009798();
 
return 0;
 }
diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h 
b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
index 6ea8c4b..8cafa07 100644
--- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
+++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
@@ -176,6 +176,7 @@ struct ccsr_gur {
 #define SCFG_BASE  0x0157
 #define SCFG_USB3PRM1CR0x070
 #define USB_TXVREFTUNE 0x9
+#define USB_SQRXTUNE   0xFC7F
 
 /* Supplemental Configuration Unit */
 struct ccsr_scfg {
-- 
2.1.0.27.g96db324

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[U-Boot] [PATCH v2 6/8] armv7: Add workaround for USB erratum A-009798

2017-01-30 Thread Suresh Gupta 
From: Suresh Gupta 

The default setting for USB High Speed Squelch Threshold results
in a threshold close to or lower than 100mV. This leads to Receive
Compliance test failure for a 100mV threshold.

The changes shift the threshold from ~100mV towards ~130mV resulting
in passing of USB High Speed Receiver Sensitivity Compliance test

Signed-off-by: Sriram Dash 
Signed-off-by: Rajesh Bhagat 
Signed-off-by: Suresh Gupta 
---
Changes in v2: None

 arch/arm/cpu/armv7/ls102xa/Kconfig|  4 
 arch/arm/cpu/armv7/ls102xa/soc.c  | 10 ++
 arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h |  1 +
 3 files changed, 15 insertions(+)

diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig 
b/arch/arm/cpu/armv7/ls102xa/Kconfig
index 40c6782..b7e6e96 100644
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -6,6 +6,7 @@ config ARCH_LS1021A
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_A010315
select SYS_FSL_ERRATUM_A009008
+   select SYS_FSL_ERRATUM_A009798
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
select SYS_FSL_DDR_BE if SYS_FSL_DDR
@@ -46,6 +47,9 @@ config SYS_FSL_ERRATUM_A010315
 config SYS_FSL_ERRATUM_A009008
bool "Workaround for USB PHY erratum A009008"
 
+config SYS_FSL_ERRATUM_A009798
+   bool "Workaround for USB PHY erratum A009798"
+
 config SYS_FSL_SRDS_1
bool
 
diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c
index ee27b0c..7ae5b29 100644
--- a/arch/arm/cpu/armv7/ls102xa/soc.c
+++ b/arch/arm/cpu/armv7/ls102xa/soc.c
@@ -70,6 +70,15 @@ static void erratum_a009008(void)
 #endif /* CONFIG_SYS_FSL_ERRATUM_A009008 */
 }
 
+static void erratum_a009798(void)
+{
+#ifdef CONFIG_SYS_FSL_ERRATUM_A009798
+   u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
+   u32 val = in_be32(scfg + SCFG_USB3PRM1CR / 4);
+   out_be32(scfg + SCFG_USB3PRM1CR / 4, val & USB_SQRXTUNE);
+#endif /* CONFIG_SYS_FSL_ERRATUM_A009798 */
+}
+
 void s_init(void)
 {
 }
@@ -158,6 +167,7 @@ int arch_soc_init(void)
 
/* Erratum */
erratum_a009008();
+   erratum_a009798();
 
return 0;
 }
diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h 
b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
index 6ea8c4b..8cafa07 100644
--- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
+++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
@@ -176,6 +176,7 @@ struct ccsr_gur {
 #define SCFG_BASE  0x0157
 #define SCFG_USB3PRM1CR0x070
 #define USB_TXVREFTUNE 0x9
+#define USB_SQRXTUNE   0xFC7F
 
 /* Supplemental Configuration Unit */
 struct ccsr_scfg {
-- 
1.9.3

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