Re: [U-Boot] [PATCH v2 7/7] Tegra30: Add/enable Cardhu build (T30 reference board)

[Tom Warren]

Simon,

On Sat, Dec 8, 2012 at 1:00 PM, Simon Glass s...@chromium.org wrote:
 Hi,

 On Tue, Dec 4, 2012 at 2:41 PM, Stephen Warren swar...@wwwdotorg.org wrote:
 On 12/04/2012 01:40 PM, Lucas Stach wrote:
 Hi Tom,

 Am Dienstag, den 04.12.2012, 13:22 -0700 schrieb Tom Warren:
 [...]


 +#define V_NS16550_CLK21600   /* 216MHz 
 (pllp_out0) */

 I thought PLL_P ran at 408MHz on Tegra30? The kernel certainly sets it
 up that way.

 See my previous reply. In the internal U-Boot repo I ported from, PLLP
 was initially set to 216MHz, then sped up to 408MHz. When this first
 round of patches is in, I can address going to 408MHz first thing.

 Is running the PLL_P at 408MHz something which requires a lot of work?
 If not, please do this and fold it into this patchset. It doesn't look
 too nice adding things to upstream which have to be changed/removed
 immediately after going in.

 Naively I'd have to agree here; it seems that programming the PLL for
 the correct rate would probably just work right from the outset? After
 all, if the code runs OK with the higher rate enabled a little later in
 boot, I see no reason it shouldn't run OK with that exact same rate the
 whole way through.

 From memory, the problem was originally that we wanted to be able to
 configure the PLL speed at run time, because we we using both speeds.
 Since T30 now apparently only uses 408MHz, it should be ok to set it
 once and hard-code it.

 Regards,
 Simon

Thanks. As I remember it, it was a user-config option for early T30
boards to run at 216MHz or 408MHz. The 408MHz PLLP change generated a
lot of email traffic on what the best output clocks (pllp_out1 thru 4)
would be for the various periphs, subclocks, etc.

When I did the original bringup for upstream U-Boot on my (older)
Cardhu, I wanted to start at 216MHz first, then step up to 408MHz when
I was at a stable point. Much like when I rebuilt my Mustang - I took
it out around the block first, to be sure everything was working OK
before I took it on the highway ;)

I'm running OK at 408MHz on my Cardhu T33. I'll resubmit V3 of the
patchset in the next day or so.

Thanks,

Tom

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Re: [U-Boot] [PATCH v2 7/7] Tegra30: Add/enable Cardhu build (T30 reference board)

[Simon Glass]

Hi Tom,

On Mon, Dec 10, 2012 at 9:05 AM, Tom Warren twarren.nvi...@gmail.com wrote:
 Simon,

 On Sat, Dec 8, 2012 at 1:00 PM, Simon Glass s...@chromium.org wrote:
 Hi,

 On Tue, Dec 4, 2012 at 2:41 PM, Stephen Warren swar...@wwwdotorg.org wrote:
 On 12/04/2012 01:40 PM, Lucas Stach wrote:
 Hi Tom,

 Am Dienstag, den 04.12.2012, 13:22 -0700 schrieb Tom Warren:
 [...]


 +#define V_NS16550_CLK21600   /* 216MHz 
 (pllp_out0) */

 I thought PLL_P ran at 408MHz on Tegra30? The kernel certainly sets it
 up that way.

 See my previous reply. In the internal U-Boot repo I ported from, PLLP
 was initially set to 216MHz, then sped up to 408MHz. When this first
 round of patches is in, I can address going to 408MHz first thing.

 Is running the PLL_P at 408MHz something which requires a lot of work?
 If not, please do this and fold it into this patchset. It doesn't look
 too nice adding things to upstream which have to be changed/removed
 immediately after going in.

 Naively I'd have to agree here; it seems that programming the PLL for
 the correct rate would probably just work right from the outset? After
 all, if the code runs OK with the higher rate enabled a little later in
 boot, I see no reason it shouldn't run OK with that exact same rate the
 whole way through.

 From memory, the problem was originally that we wanted to be able to
 configure the PLL speed at run time, because we we using both speeds.
 Since T30 now apparently only uses 408MHz, it should be ok to set it
 once and hard-code it.

 Regards,
 Simon

 Thanks. As I remember it, it was a user-config option for early T30
 boards to run at 216MHz or 408MHz. The 408MHz PLLP change generated a
 lot of email traffic on what the best output clocks (pllp_out1 thru 4)
 would be for the various periphs, subclocks, etc.

 When I did the original bringup for upstream U-Boot on my (older)
 Cardhu, I wanted to start at 216MHz first, then step up to 408MHz when
 I was at a stable point. Much like when I rebuilt my Mustang - I took
 it out around the block first, to be sure everything was working OK
 before I took it on the highway ;)

 I'm running OK at 408MHz on my Cardhu T33. I'll resubmit V3 of the
 patchset in the next day or so.

Sounds good, thanks. It would be good to get this in.

Regards,
Simon


 Thanks,

 Tom

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Re: [U-Boot] [PATCH v2 7/7] Tegra30: Add/enable Cardhu build (T30 reference board)

[Simon Glass]

Hi,

On Tue, Dec 4, 2012 at 2:41 PM, Stephen Warren swar...@wwwdotorg.org wrote:
 On 12/04/2012 01:40 PM, Lucas Stach wrote:
 Hi Tom,

 Am Dienstag, den 04.12.2012, 13:22 -0700 schrieb Tom Warren:
 [...]


 +#define V_NS16550_CLK21600   /* 216MHz 
 (pllp_out0) */

 I thought PLL_P ran at 408MHz on Tegra30? The kernel certainly sets it
 up that way.

 See my previous reply. In the internal U-Boot repo I ported from, PLLP
 was initially set to 216MHz, then sped up to 408MHz. When this first
 round of patches is in, I can address going to 408MHz first thing.

 Is running the PLL_P at 408MHz something which requires a lot of work?
 If not, please do this and fold it into this patchset. It doesn't look
 too nice adding things to upstream which have to be changed/removed
 immediately after going in.

 Naively I'd have to agree here; it seems that programming the PLL for
 the correct rate would probably just work right from the outset? After
 all, if the code runs OK with the higher rate enabled a little later in
 boot, I see no reason it shouldn't run OK with that exact same rate the
 whole way through.

From memory, the problem was originally that we wanted to be able to
configure the PLL speed at run time, because we we using both speeds.
Since T30 now apparently only uses 408MHz, it should be ok to set it
once and hard-code it.

Regards,
Simon


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Re: [U-Boot] [PATCH v2 7/7] Tegra30: Add/enable Cardhu build (T30 reference board)

[Tom Warren]

On Tue, Dec 4, 2012 at 3:43 PM, Stephen Warren swar...@wwwdotorg.org wrote:
 On 12/04/2012 01:22 PM, Tom Warren wrote:
 Stephen,

 On Mon, Dec 3, 2012 at 5:53 PM, Stephen Warren swar...@wwwdotorg.org wrote:
 On 12/03/2012 04:45 PM, Tom Warren wrote:
 This build is stripped down. It boots to the command prompt.
 GPIO is the only peripheral supported. Others TBD.

 include/configs/tegra-common.h now holds common config options
 for Tegra SoCs.
 ...
 In this patch, you also should move MEM_LAYOUT_ENV_SETTINGS from
 tegra-common-post.h into tegraNN-common.h, or something like that.

 I can do that, or we can wait until those settings are going to be
 used, i.e. once I've added peripheral support so a kernel can be found
 and loaded and executed.

 Isn't it just cut/pasting those 5 lines (well, and the comment before
 them I guess) and s/0x0/0x8/ in all the lines. It seems pretty easy to
 get the right values in from the start.

 Without this, it's a PITA to test bootm with this U-Boot (you can
 download a kernel over serial with loady for example; something I tested
 with earlier revisions of this series).

I'll move the MEM_LAYOUT_ENV_SETTINGS (and update the addresses) since
I'm doing a V3.

Also, WRT the 408MHz tweak, I got it working w/relatively little pain.
That'll also be the de facto PLLP speed for T30 in V3 of the patchset.

Thanks,

Tom
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Re: [U-Boot] [PATCH v2 7/7] Tegra30: Add/enable Cardhu build (T30 reference board)

[Tom Warren]

Stephen,

On Mon, Dec 3, 2012 at 5:53 PM, Stephen Warren swar...@wwwdotorg.org wrote:
 On 12/03/2012 04:45 PM, Tom Warren wrote:
 This build is stripped down. It boots to the command prompt.
 GPIO is the only peripheral supported. Others TBD.

 include/configs/tegra-common.h now holds common config options
 for Tegra SoCs.

 diff --git a/board/nvidia/cardhu/cardhu.c b/board/nvidia/cardhu/cardhu.c

 +void pinmux_init(void)
 +{
 + pinmux_config_table(tegra3_pinmux_common,
 + ARRAY_SIZE(tegra3_pinmux_common));
 +
 + pinmux_config_table(unused_pins_lowpower,
 + ARRAY_SIZE(unused_pins_lowpower));
 +}

 Oh, I see. Is any of the pinmux configuration actually needed for just
 the UART to work? I suppose there's not much harm just setting up the
 whole configuration from the start rather than adding it piece-meal.

Yep, see previous reply for an explanation of why it's done in one shot.


 diff --git a/board/nvidia/cardhu/pinmux-config-cardhu.h 
 b/board/nvidia/cardhu/pinmux-config-cardhu.h

 +static struct pingroup_config tegra3_pinmux_common[] = {

 +#ifdef CONFIG_SND_HDA_CODEC_REALTEK
 + DEFAULT_PINMUX(SPDIF_IN, DAP2, DOWN, NORMAL, INPUT),
 +#else
 + DEFAULT_PINMUX(SPDIF_IN, SPDIF, NORMAL, NORMAL, INPUT),
 +#endif

 I'm pretty sure that define will never be enabled; it was some temporary
 test thing that should be removed from our downstream kernel, which is
 where I assume you got this table from.

No, this came from one of our internal T30 U-Boot branches. Not sure
where the OD (original dev) got it from.

I'll remove the REALTEK parts.


 diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h

 diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h

 +#define CONFIG_SYS_CPU_OSC_FREQUENCY 100 /* Set CPU clock to 1GHz */

 Is that correct for Tegra30?

It was originally in tegra20-common.h, and was moved into
tegra-common.h in a batch with other thought-to-be-non-HW-specific
config defines.

Looking at the code, though, I don't see it used anywhere. It can be
removed, either in V3 of this patchset or in a clean-up round of
patches later once T30 is in.


 +#define V_NS16550_CLK21600   /* 216MHz 
 (pllp_out0) */

 I thought PLL_P ran at 408MHz on Tegra30? The kernel certainly sets it
 up that way.

See my previous reply. In the internal U-Boot repo I ported from, PLLP
was initially set to 216MHz, then sped up to 408MHz. When this first
round of patches is in, I can address going to 408MHz first thing.


 In this patch, you also should move MEM_LAYOUT_ENV_SETTINGS from
 tegra-common-post.h into tegraNN-common.h, or something like that.

I can do that, or we can wait until those settings are going to be
used, i.e. once I've added peripheral support so a kernel can be found
and loaded and executed.

Tom
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Re: [U-Boot] [PATCH v2 7/7] Tegra30: Add/enable Cardhu build (T30 reference board)

[Lucas Stach]

Hi Tom,

Am Dienstag, den 04.12.2012, 13:22 -0700 schrieb Tom Warren:
[...]
 
 
  +#define V_NS16550_CLK21600   /* 216MHz 
  (pllp_out0) */
 
  I thought PLL_P ran at 408MHz on Tegra30? The kernel certainly sets it
  up that way.
 
 See my previous reply. In the internal U-Boot repo I ported from, PLLP
 was initially set to 216MHz, then sped up to 408MHz. When this first
 round of patches is in, I can address going to 408MHz first thing.
 
Is running the PLL_P at 408MHz something which requires a lot of work?
If not, please do this and fold it into this patchset. It doesn't look
too nice adding things to upstream which have to be changed/removed
immediately after going in.

Considering that Tegra 30 support is still not really in a usable state
after this patchset and the time left until things have to get ready for
the next merge window, I suppose you could do it the right way from the
start.

Regards,
Lucas

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Re: [U-Boot] [PATCH v2 7/7] Tegra30: Add/enable Cardhu build (T30 reference board)

[Tom Warren]

Lucas,

On Tue, Dec 4, 2012 at 1:40 PM, Lucas Stach d...@lynxeye.de wrote:
 Hi Tom,

 Am Dienstag, den 04.12.2012, 13:22 -0700 schrieb Tom Warren:
 [...]

 
  +#define V_NS16550_CLK21600   /* 216MHz 
  (pllp_out0) */
 
  I thought PLL_P ran at 408MHz on Tegra30? The kernel certainly sets it
  up that way.

 See my previous reply. In the internal U-Boot repo I ported from, PLLP
 was initially set to 216MHz, then sped up to 408MHz. When this first
 round of patches is in, I can address going to 408MHz first thing.

 Is running the PLL_P at 408MHz something which requires a lot of work?
 If not, please do this and fold it into this patchset. It doesn't look
 too nice adding things to upstream which have to be changed/removed
 immediately after going in.

 Considering that Tegra 30 support is still not really in a usable state
 after this patchset and the time left until things have to get ready for
 the next merge window, I suppose you could do it the right way from the
 start.

I'll investigate.

Thanks,

Tom

 Regards,
 Lucas

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Re: [U-Boot] [PATCH v2 7/7] Tegra30: Add/enable Cardhu build (T30 reference board)

[Stephen Warren]

On 12/04/2012 01:40 PM, Lucas Stach wrote:
 Hi Tom,
 
 Am Dienstag, den 04.12.2012, 13:22 -0700 schrieb Tom Warren:
 [...]


 +#define V_NS16550_CLK21600   /* 216MHz 
 (pllp_out0) */

 I thought PLL_P ran at 408MHz on Tegra30? The kernel certainly sets it
 up that way.

 See my previous reply. In the internal U-Boot repo I ported from, PLLP
 was initially set to 216MHz, then sped up to 408MHz. When this first
 round of patches is in, I can address going to 408MHz first thing.

 Is running the PLL_P at 408MHz something which requires a lot of work?
 If not, please do this and fold it into this patchset. It doesn't look
 too nice adding things to upstream which have to be changed/removed
 immediately after going in.

Naively I'd have to agree here; it seems that programming the PLL for
the correct rate would probably just work right from the outset? After
all, if the code runs OK with the higher rate enabled a little later in
boot, I see no reason it shouldn't run OK with that exact same rate the
whole way through.

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Re: [U-Boot] [PATCH v2 7/7] Tegra30: Add/enable Cardhu build (T30 reference board)

[Stephen Warren]

On 12/04/2012 01:22 PM, Tom Warren wrote:
 Stephen,
 
 On Mon, Dec 3, 2012 at 5:53 PM, Stephen Warren swar...@wwwdotorg.org wrote:
 On 12/03/2012 04:45 PM, Tom Warren wrote:
 This build is stripped down. It boots to the command prompt.
 GPIO is the only peripheral supported. Others TBD.

 include/configs/tegra-common.h now holds common config options
 for Tegra SoCs.
...
 In this patch, you also should move MEM_LAYOUT_ENV_SETTINGS from
 tegra-common-post.h into tegraNN-common.h, or something like that.
 
 I can do that, or we can wait until those settings are going to be
 used, i.e. once I've added peripheral support so a kernel can be found
 and loaded and executed.

Isn't it just cut/pasting those 5 lines (well, and the comment before
them I guess) and s/0x0/0x8/ in all the lines. It seems pretty easy to
get the right values in from the start.

Without this, it's a PITA to test bootm with this U-Boot (you can
download a kernel over serial with loady for example; something I tested
with earlier revisions of this series).
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[U-Boot] [PATCH v2 7/7] Tegra30: Add/enable Cardhu build (T30 reference board)

[Tom Warren]

This build is stripped down. It boots to the command prompt.
GPIO is the only peripheral supported. Others TBD.

include/configs/tegra-common.h now holds common config options
for Tegra SoCs.

Signed-off-by: Tom Warren twar...@nvidia.com
---
V2:
* Move pinmux_init to cardhu.c, move pinmux-config header here, too.
* tegra-common.h holds CONFIG options/defines commmon to all Tegra SoCs.

 board/nvidia/cardhu/Makefile   |   44 
 board/nvidia/cardhu/cardhu.c   |   39 
 board/nvidia/cardhu/pinmux-config-cardhu.h |  339 
 boards.cfg |1 +
 include/configs/cardhu.h   |   52 +
 include/configs/tegra-common.h |  163 +
 include/configs/tegra20-common.h   |  171 ++
 include/configs/tegra30-common.h   |   54 +
 8 files changed, 716 insertions(+), 147 deletions(-)
 create mode 100644 board/nvidia/cardhu/Makefile
 create mode 100644 board/nvidia/cardhu/cardhu.c
 create mode 100644 board/nvidia/cardhu/pinmux-config-cardhu.h
 create mode 100644 include/configs/cardhu.h
 create mode 100644 include/configs/tegra-common.h
 create mode 100644 include/configs/tegra30-common.h

diff --git a/board/nvidia/cardhu/Makefile b/board/nvidia/cardhu/Makefile
new file mode 100644
index 000..913f1ce
--- /dev/null
+++ b/board/nvidia/cardhu/Makefile
@@ -0,0 +1,44 @@
+#
+#  (C) Copyright 2010-2012
+#  NVIDIA Corporation www.nvidia.com
+#
+#
+#  See file CREDITS for list of people who contributed to this
+#  project.
+#
+#  This program is free software; you can redistribute it and/or
+#  modify it under the terms of the GNU General Public License as
+#  published by the Free Software Foundation; either version 2 of
+#  the License, or (at your option) any later version.
+#
+#  This program is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#  GNU General Public License for more details.
+#
+#  You should have received a copy of the GNU General Public License
+#  along with this program; if not, write to the Free Software
+#  Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+#  MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS  := $(BOARD).o
+
+SRCS   := $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+
+$(LIB):$(obj).depend $(OBJS)
+   $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/nvidia/cardhu/cardhu.c b/board/nvidia/cardhu/cardhu.c
new file mode 100644
index 000..df4cb6b
--- /dev/null
+++ b/board/nvidia/cardhu/cardhu.c
@@ -0,0 +1,39 @@
+/*
+ *  (C) Copyright 2010-2012
+ *  NVIDIA Corporation www.nvidia.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/arch/pinmux.h
+#include pinmux-config-cardhu.h
+
+/*
+ * Routine: pinmux_init
+ * Description: Do individual peripheral pinmux configs
+ */
+void pinmux_init(void)
+{
+   pinmux_config_table(tegra3_pinmux_common,
+   ARRAY_SIZE(tegra3_pinmux_common));
+
+   pinmux_config_table(unused_pins_lowpower,
+   ARRAY_SIZE(unused_pins_lowpower));
+}
diff --git a/board/nvidia/cardhu/pinmux-config-cardhu.h 
b/board/nvidia/cardhu/pinmux-config-cardhu.h
new file mode 100644
index 000..df85fe1
--- /dev/null
+++ b/board/nvidia/cardhu/pinmux-config-cardhu.h
@@ -0,0 +1,339 @@
+/*
+ * Copyright (c) 2010-2012, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General 

Re: [U-Boot] [PATCH v2 7/7] Tegra30: Add/enable Cardhu build (T30 reference board)

[Stephen Warren]

On 12/03/2012 04:45 PM, Tom Warren wrote:
 This build is stripped down. It boots to the command prompt.
 GPIO is the only peripheral supported. Others TBD.
 
 include/configs/tegra-common.h now holds common config options
 for Tegra SoCs.

 diff --git a/board/nvidia/cardhu/cardhu.c b/board/nvidia/cardhu/cardhu.c

 +void pinmux_init(void)
 +{
 + pinmux_config_table(tegra3_pinmux_common,
 + ARRAY_SIZE(tegra3_pinmux_common));
 +
 + pinmux_config_table(unused_pins_lowpower,
 + ARRAY_SIZE(unused_pins_lowpower));
 +}

Oh, I see. Is any of the pinmux configuration actually needed for just
the UART to work? I suppose there's not much harm just setting up the
whole configuration from the start rather than adding it piece-meal.

 diff --git a/board/nvidia/cardhu/pinmux-config-cardhu.h 
 b/board/nvidia/cardhu/pinmux-config-cardhu.h

 +static struct pingroup_config tegra3_pinmux_common[] = {

 +#ifdef CONFIG_SND_HDA_CODEC_REALTEK
 + DEFAULT_PINMUX(SPDIF_IN, DAP2, DOWN, NORMAL, INPUT),
 +#else
 + DEFAULT_PINMUX(SPDIF_IN, SPDIF, NORMAL, NORMAL, INPUT),
 +#endif

I'm pretty sure that define will never be enabled; it was some temporary
test thing that should be removed from our downstream kernel, which is
where I assume you got this table from.

 diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h

 diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h

 +#define CONFIG_SYS_CPU_OSC_FREQUENCY 100 /* Set CPU clock to 1GHz */

Is that correct for Tegra30?

 +#define V_NS16550_CLK21600   /* 216MHz 
 (pllp_out0) */

I thought PLL_P ran at 408MHz on Tegra30? The kernel certainly sets it
up that way.

In this patch, you also should move MEM_LAYOUT_ENV_SETTINGS from
tegra-common-post.h into tegraNN-common.h, or something like that.
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