Re: [U-Boot] [PATCH v3] armv8: errata: Implement workaround for Cortex-A53 Erratum 855873

2018-01-14 Thread Michal Simek 
On 12.1.2018 18:01, York Sun wrote:
> On 01/12/2018 01:12 AM, Michal Simek wrote:
>> On 11.1.2018 20:36, York Sun wrote:
>>> On 12/27/2017 09:20 PM, Alison Wang wrote:
 855873: An eviction might overtake a cache clean operation
 Workaround: The erratum can be avoided by upgrading cache clean by
 address operations to cache clean and invalidate operations. For
 Cortex-A53 r0p3 and later release, this can be achieved by setting
 CPUACTLR.ENDCCASCI to 1.

 This patch is to implement the workaround for this erratum.

 Signed-off-by: Alison Wang 
 ---
 Changes in v3:
 - Check the major revision of Cortex-A53.

 Changes in v2:
 - Check the revision of Cortex-A53 and apply the erratum to r0p3 and later 
 release.
 - Fix the mistake in the commit description.

>>>
>>> Applied to fsl-qoriq master. Thanks.
>>
>> Just a note if this is just for a53 should we consider to place these
>> Kconfigs to arch/arm/cpu/armv8/Kconfig?
>>
> 
> We were following Tom Rini's move in commit 8dda2e2f9. I am not against
> moving ARMv8 related config options, if no single erratum applies to
> both ARMv8 and legacy cores.

ok. Good.

Thanks,
Michal
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Re: [U-Boot] [PATCH v3] armv8: errata: Implement workaround for Cortex-A53 Erratum 855873

2018-01-12 Thread York Sun 
On 01/12/2018 01:12 AM, Michal Simek wrote:
> On 11.1.2018 20:36, York Sun wrote:
>> On 12/27/2017 09:20 PM, Alison Wang wrote:
>>> 855873: An eviction might overtake a cache clean operation
>>> Workaround: The erratum can be avoided by upgrading cache clean by
>>> address operations to cache clean and invalidate operations. For
>>> Cortex-A53 r0p3 and later release, this can be achieved by setting
>>> CPUACTLR.ENDCCASCI to 1.
>>>
>>> This patch is to implement the workaround for this erratum.
>>>
>>> Signed-off-by: Alison Wang 
>>> ---
>>> Changes in v3:
>>> - Check the major revision of Cortex-A53.
>>>
>>> Changes in v2:
>>> - Check the revision of Cortex-A53 and apply the erratum to r0p3 and later 
>>> release.
>>> - Fix the mistake in the commit description.
>>>
>>
>> Applied to fsl-qoriq master. Thanks.
> 
> Just a note if this is just for a53 should we consider to place these
> Kconfigs to arch/arm/cpu/armv8/Kconfig?
> 

We were following Tom Rini's move in commit 8dda2e2f9. I am not against
moving ARMv8 related config options, if no single erratum applies to
both ARMv8 and legacy cores.

York
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Re: [U-Boot] [PATCH v3] armv8: errata: Implement workaround for Cortex-A53 Erratum 855873

2018-01-12 Thread Michal Simek 
On 11.1.2018 20:36, York Sun wrote:
> On 12/27/2017 09:20 PM, Alison Wang wrote:
>> 855873: An eviction might overtake a cache clean operation
>> Workaround: The erratum can be avoided by upgrading cache clean by
>> address operations to cache clean and invalidate operations. For
>> Cortex-A53 r0p3 and later release, this can be achieved by setting
>> CPUACTLR.ENDCCASCI to 1.
>>
>> This patch is to implement the workaround for this erratum.
>>
>> Signed-off-by: Alison Wang 
>> ---
>> Changes in v3:
>> - Check the major revision of Cortex-A53.
>>
>> Changes in v2:
>> - Check the revision of Cortex-A53 and apply the erratum to r0p3 and later 
>> release.
>> - Fix the mistake in the commit description.
>>
> 
> Applied to fsl-qoriq master. Thanks.

Just a note if this is just for a53 should we consider to place these
Kconfigs to arch/arm/cpu/armv8/Kconfig?

M

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Re: [U-Boot] [PATCH v3] armv8: errata: Implement workaround for Cortex-A53 Erratum 855873

2018-01-11 Thread York Sun 
On 12/27/2017 09:20 PM, Alison Wang wrote:
> 855873: An eviction might overtake a cache clean operation
> Workaround: The erratum can be avoided by upgrading cache clean by
> address operations to cache clean and invalidate operations. For
> Cortex-A53 r0p3 and later release, this can be achieved by setting
> CPUACTLR.ENDCCASCI to 1.
> 
> This patch is to implement the workaround for this erratum.
> 
> Signed-off-by: Alison Wang 
> ---
> Changes in v3:
> - Check the major revision of Cortex-A53.
> 
> Changes in v2:
> - Check the revision of Cortex-A53 and apply the erratum to r0p3 and later 
> release.
> - Fix the mistake in the commit description.
> 

Applied to fsl-qoriq master. Thanks.

York

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[U-Boot] [PATCH v3] armv8: errata: Implement workaround for Cortex-A53 Erratum 855873

2017-12-27 Thread Alison Wang 
855873: An eviction might overtake a cache clean operation
Workaround: The erratum can be avoided by upgrading cache clean by
address operations to cache clean and invalidate operations. For
Cortex-A53 r0p3 and later release, this can be achieved by setting
CPUACTLR.ENDCCASCI to 1.

This patch is to implement the workaround for this erratum.

Signed-off-by: Alison Wang 
---
Changes in v3:
- Check the major revision of Cortex-A53.

Changes in v2:
- Check the revision of Cortex-A53 and apply the erratum to r0p3 and later 
release.
- Fix the mistake in the commit description.

 arch/arm/Kconfig  |3 +++
 arch/arm/cpu/armv8/fsl-layerscape/Kconfig |3 +++
 arch/arm/cpu/armv8/start.S|   24 +++-
 3 files changed, 29 insertions(+), 1 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index f2c35e3..de323bf 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -122,6 +122,9 @@ config ARM_ERRATA_852421
 config ARM_ERRATA_852423
bool
 
+config ARM_ERRATA_855873
+   bool
+
 config CPU_ARM720T
bool
select SYS_CACHE_SHIFT_5
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig 
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 66bc32c..76a4d8b 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -1,6 +1,7 @@
 config ARCH_LS1012A
bool
select ARMV8_SET_SMPEN
+   select ARM_ERRATA_855873
select FSL_LSCH2
select SYS_FSL_DDR_BE
select SYS_FSL_MMDC
@@ -15,6 +16,7 @@ config ARCH_LS1012A
 config ARCH_LS1043A
bool
select ARMV8_SET_SMPEN
+   select ARM_ERRATA_855873
select FSL_LSCH2
select SYS_FSL_DDR
select SYS_FSL_DDR_BE
@@ -67,6 +69,7 @@ config ARCH_LS1046A
 config ARCH_LS1088A
bool
select ARMV8_SET_SMPEN
+   select ARM_ERRATA_855873
select FSL_LSCH3
select SYS_FSL_DDR
select SYS_FSL_DDR_LE
diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
index 03e744e..f385ed4 100644
--- a/arch/arm/cpu/armv8/start.S
+++ b/arch/arm/cpu/armv8/start.S
@@ -196,7 +196,10 @@ reset_sctrl:
 WEAK(apply_core_errata)
 
mov x29, lr /* Save LR */
-   /* For now, we support Cortex-A57 specific errata only */
+   /* For now, we support Cortex-A53, Cortex-A57 specific errata */
+
+   /* Check if we are running on a Cortex-A53 core */
+   branch_if_a53_core x0, apply_a53_core_errata
 
/* Check if we are running on a Cortex-A57 core */
branch_if_a57_core x0, apply_a57_core_errata
@@ -204,6 +207,25 @@ WEAK(apply_core_errata)
mov lr, x29 /* Restore LR */
ret
 
+apply_a53_core_errata:
+
+#ifdef CONFIG_ARM_ERRATA_855873
+   mrs x0, midr_el1
+   tst x0, #(0xf << 20)
+   b.ne0b
+
+   mrs x0, midr_el1
+   and x0, x0, #0xf
+   cmp x0, #3
+   b.lt0b
+
+   mrs x0, S3_1_c15_c2_0   /* cpuactlr_el1 */
+   /* Enable data cache clean as data cache clean/invalidate */
+   orr x0, x0, #1 << 44
+   msr S3_1_c15_c2_0, x0   /* cpuactlr_el1 */
+#endif
+   b 0b
+
 apply_a57_core_errata:
 
 #ifdef CONFIG_ARM_ERRATA_828024
-- 
1.7.1

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