Re: [U-Boot] [PATCH v3 05/10] mips: bmips: add bcm63xx-spi driver support for BCM6348

[Daniel Schwierzeck]

Am 03.06.2017 um 11:57 schrieb Álvaro Fernández Rojas:
> This driver manages the SPI controller present on this SoC.
> 
> Signed-off-by: Álvaro Fernández Rojas 

Reviewed-by: Daniel Schwierzeck 

> ---
>  v3: rename BCM6338 SPI driver to BCM6348
>  v2: add spi alias
> 
>  arch/mips/dts/brcm,bcm6348.dtsi | 17 +
>  1 file changed, 17 insertions(+)
> 

-- 
- Daniel



signature.asc
Description: OpenPGP digital signature
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot

[U-Boot] [PATCH v3 05/10] mips: bmips: add bcm63xx-spi driver support for BCM6348

[Álvaro Fernández Rojas]

This driver manages the SPI controller present on this SoC.

Signed-off-by: Álvaro Fernández Rojas 
---
 v3: rename BCM6338 SPI driver to BCM6348
 v2: add spi alias

 arch/mips/dts/brcm,bcm6348.dtsi | 17 +
 1 file changed, 17 insertions(+)

diff --git a/arch/mips/dts/brcm,bcm6348.dtsi b/arch/mips/dts/brcm,bcm6348.dtsi
index 711b643..540b9fe 100644
--- a/arch/mips/dts/brcm,bcm6348.dtsi
+++ b/arch/mips/dts/brcm,bcm6348.dtsi
@@ -12,6 +12,10 @@
 / {
compatible = "brcm,bcm6348";
 
+   aliases {
+   spi0 = 
+   };
+
cpus {
reg = <0xfffe 0x4>;
#address-cells = <1>;
@@ -118,6 +122,19 @@
status = "disabled";
};
 
+   spi: spi@fffe0c00 {
+   compatible = "brcm,bcm6348-spi";
+   reg = <0xfffe0c00 0xc0>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   clocks = <_clk BCM6348_CLK_SPI>;
+   resets = <_rst BCM6348_RST_SPI>;
+   spi-max-frequency = <2000>;
+   num-cs = <4>;
+
+   status = "disabled";
+   };
+
memory-controller@fffe2300 {
compatible = "brcm,bcm6338-mc";
reg = <0xfffe2300 0x38>;
-- 
2.1.4

___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot