Re: [U-Boot] [PATCH v3 1/2] exynos5: fix GPIO information of exynos5420

2014-11-05 Thread Lukasz Majewski 
Hi Hyungwon,

 This patch fixes wrong GPIO information such as GPIO bank, table which
 is used to convert GPIO name to index, bank base address, and etc.

Just a minor tip: It is a good practice to add changelog (as you did in
the cover letter) in the separate commits.

 
 Signed-off-by: Hyungwon Hwang human.hw...@samsung.com
 Cc: Minkyu Kang mk7.k...@samsung.com
 Cc: Lukasz Majewski l.majew...@samsung.com
 ---
  arch/arm/include/asm/arch-exynos/cpu.h  |  11 +-
  arch/arm/include/asm/arch-exynos/gpio.h | 232
 +++- 2 files changed, 117 insertions(+),
 126 deletions(-)
 
 diff --git a/arch/arm/include/asm/arch-exynos/cpu.h
 b/arch/arm/include/asm/arch-exynos/cpu.h index 7c5c4ff..da4ac6b 100644
 --- a/arch/arm/include/asm/arch-exynos/cpu.h
 +++ b/arch/arm/include/asm/arch-exynos/cpu.h
 @@ -139,7 +139,7 @@
  
  /* EXYNOS5420 */
  #define EXYNOS5420_AUDIOSS_BASE  0x0381
 -#define EXYNOS5420_GPIO_PART6_BASE   0x0386
 +#define EXYNOS5420_GPIO_PART5_BASE   0x0386
  #define EXYNOS5420_PRO_ID0x1000
  #define EXYNOS5420_CLOCK_BASE0x1001
  #define EXYNOS5420_POWER_BASE0x1004
 @@ -161,11 +161,10 @@
  #define EXYNOS5420_I2S_BASE  0x12D6
  #define EXYNOS5420_PWMTIMER_BASE 0x12DD
  #define EXYNOS5420_SPI_ISP_BASE  0x131A
 -#define EXYNOS5420_GPIO_PART2_BASE   0x1340
 -#define EXYNOS5420_GPIO_PART3_BASE   0x13400C00
 -#define EXYNOS5420_GPIO_PART4_BASE   0x1341
 -#define EXYNOS5420_GPIO_PART5_BASE   0x1400
 -#define EXYNOS5420_GPIO_PART1_BASE   0x1401
 +#define EXYNOS5420_GPIO_PART1_BASE   0x1340
 +#define EXYNOS5420_GPIO_PART2_BASE   0x1341
 +#define EXYNOS5420_GPIO_PART3_BASE   0x1400
 +#define EXYNOS5420_GPIO_PART4_BASE   0x1401
  #define EXYNOS5420_MIPI_DSIM_BASE0x1450
  #define EXYNOS5420_DP_BASE   0x145B
  
 diff --git a/arch/arm/include/asm/arch-exynos/gpio.h
 b/arch/arm/include/asm/arch-exynos/gpio.h index 32e045a..431ae3a
 100644 --- a/arch/arm/include/asm/arch-exynos/gpio.h
 +++ b/arch/arm/include/asm/arch-exynos/gpio.h
 @@ -1028,83 +1028,7 @@ enum exynos5_gpio_pin {
  };
  
  enum exynos5420_gpio_pin {
 - /* GPIO_PART1_STARTS */
 - EXYNOS5420_GPIO_A00,/* 0 */
 - EXYNOS5420_GPIO_A01,
 - EXYNOS5420_GPIO_A02,
 - EXYNOS5420_GPIO_A03,
 - EXYNOS5420_GPIO_A04,
 - EXYNOS5420_GPIO_A05,
 - EXYNOS5420_GPIO_A06,
 - EXYNOS5420_GPIO_A07,
 - EXYNOS5420_GPIO_A10,/* 8 */
 - EXYNOS5420_GPIO_A11,
 - EXYNOS5420_GPIO_A12,
 - EXYNOS5420_GPIO_A13,
 - EXYNOS5420_GPIO_A14,
 - EXYNOS5420_GPIO_A15,
 - EXYNOS5420_GPIO_A16,
 - EXYNOS5420_GPIO_A17,
 - EXYNOS5420_GPIO_A20,/* 16 0x10 */
 - EXYNOS5420_GPIO_A21,
 - EXYNOS5420_GPIO_A22,
 - EXYNOS5420_GPIO_A23,
 - EXYNOS5420_GPIO_A24,
 - EXYNOS5420_GPIO_A25,
 - EXYNOS5420_GPIO_A26,
 - EXYNOS5420_GPIO_A27,
 - EXYNOS5420_GPIO_B00,/* 24 0x18 */
 - EXYNOS5420_GPIO_B01,
 - EXYNOS5420_GPIO_B02,
 - EXYNOS5420_GPIO_B03,
 - EXYNOS5420_GPIO_B04,
 - EXYNOS5420_GPIO_B05,
 - EXYNOS5420_GPIO_B06,
 - EXYNOS5420_GPIO_B07,
 - EXYNOS5420_GPIO_B10,/* 32 0x20 */
 - EXYNOS5420_GPIO_B11,
 - EXYNOS5420_GPIO_B12,
 - EXYNOS5420_GPIO_B13,
 - EXYNOS5420_GPIO_B14,
 - EXYNOS5420_GPIO_B15,
 - EXYNOS5420_GPIO_B16,
 - EXYNOS5420_GPIO_B17,
 - EXYNOS5420_GPIO_B20,/* 40 0x28 */
 - EXYNOS5420_GPIO_B21,
 - EXYNOS5420_GPIO_B22,
 - EXYNOS5420_GPIO_B23,
 - EXYNOS5420_GPIO_B24,
 - EXYNOS5420_GPIO_B25,
 - EXYNOS5420_GPIO_B26,
 - EXYNOS5420_GPIO_B27,
 - EXYNOS5420_GPIO_B30,/* 48 0x30 */
 - EXYNOS5420_GPIO_B31,
 - EXYNOS5420_GPIO_B32,
 - EXYNOS5420_GPIO_B33,
 - EXYNOS5420_GPIO_B34,
 - EXYNOS5420_GPIO_B35,
 - EXYNOS5420_GPIO_B36,
 - EXYNOS5420_GPIO_B37,
 - EXYNOS5420_GPIO_B40,/* 56 0x38 */
 - EXYNOS5420_GPIO_B41,
 - EXYNOS5420_GPIO_B42,
 - EXYNOS5420_GPIO_B43,
 - EXYNOS5420_GPIO_B44,
 - EXYNOS5420_GPIO_B45,
 - EXYNOS5420_GPIO_B46,
 - EXYNOS5420_GPIO_B47,
 - EXYNOS5420_GPIO_H00,/* 64 0x40 */
 - EXYNOS5420_GPIO_H01,
 - EXYNOS5420_GPIO_H02,
 - EXYNOS5420_GPIO_H03,
 - EXYNOS5420_GPIO_H04,
 - EXYNOS5420_GPIO_H05,
 - EXYNOS5420_GPIO_H06,
 - EXYNOS5420_GPIO_H07,
 -
 - /* GPIO PART 2 STARTS*/
 - EXYNOS5420_GPIO_MAX_PORT_PART_1,/* 72 0x48 */
 - EXYNOS5420_GPIO_Y70 = EXYNOS5420_GPIO_MAX_PORT_PART_1,
 + EXYNOS5420_GPIO_Y70,
   EXYNOS5420_GPIO_Y71,
   EXYNOS5420_GPIO_Y72,
   EXYNOS5420_GPIO_Y73,
 @@ -1112,10 +1036,7 @@ enum exynos5420_gpio_pin {
   EXYNOS5420_GPIO_Y75,
   EXYNOS5420_GPIO_Y76,
   EXYNOS5420_GPIO_Y77,
 -
 - /* GPIO PART 3 STARTS*/
 - EXYNOS5420_GPIO_MAX_PORT_PART_2,/* 80 0x50 */
 - EXYNOS5420_GPIO_X00

[U-Boot] [PATCH v3 1/2] exynos5: fix GPIO information of exynos5420

2014-11-04 Thread Hyungwon Hwang 
This patch fixes wrong GPIO information such as GPIO bank, table which
is used to convert GPIO name to index, bank base address, and etc.

Signed-off-by: Hyungwon Hwang human.hw...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Lukasz Majewski l.majew...@samsung.com
---
 arch/arm/include/asm/arch-exynos/cpu.h  |  11 +-
 arch/arm/include/asm/arch-exynos/gpio.h | 232 +++-
 2 files changed, 117 insertions(+), 126 deletions(-)

diff --git a/arch/arm/include/asm/arch-exynos/cpu.h 
b/arch/arm/include/asm/arch-exynos/cpu.h
index 7c5c4ff..da4ac6b 100644
--- a/arch/arm/include/asm/arch-exynos/cpu.h
+++ b/arch/arm/include/asm/arch-exynos/cpu.h
@@ -139,7 +139,7 @@
 
 /* EXYNOS5420 */
 #define EXYNOS5420_AUDIOSS_BASE0x0381
-#define EXYNOS5420_GPIO_PART6_BASE 0x0386
+#define EXYNOS5420_GPIO_PART5_BASE 0x0386
 #define EXYNOS5420_PRO_ID  0x1000
 #define EXYNOS5420_CLOCK_BASE  0x1001
 #define EXYNOS5420_POWER_BASE  0x1004
@@ -161,11 +161,10 @@
 #define EXYNOS5420_I2S_BASE0x12D6
 #define EXYNOS5420_PWMTIMER_BASE   0x12DD
 #define EXYNOS5420_SPI_ISP_BASE0x131A
-#define EXYNOS5420_GPIO_PART2_BASE 0x1340
-#define EXYNOS5420_GPIO_PART3_BASE 0x13400C00
-#define EXYNOS5420_GPIO_PART4_BASE 0x1341
-#define EXYNOS5420_GPIO_PART5_BASE 0x1400
-#define EXYNOS5420_GPIO_PART1_BASE 0x1401
+#define EXYNOS5420_GPIO_PART1_BASE 0x1340
+#define EXYNOS5420_GPIO_PART2_BASE 0x1341
+#define EXYNOS5420_GPIO_PART3_BASE 0x1400
+#define EXYNOS5420_GPIO_PART4_BASE 0x1401
 #define EXYNOS5420_MIPI_DSIM_BASE  0x1450
 #define EXYNOS5420_DP_BASE 0x145B
 
diff --git a/arch/arm/include/asm/arch-exynos/gpio.h 
b/arch/arm/include/asm/arch-exynos/gpio.h
index 32e045a..431ae3a 100644
--- a/arch/arm/include/asm/arch-exynos/gpio.h
+++ b/arch/arm/include/asm/arch-exynos/gpio.h
@@ -1028,83 +1028,7 @@ enum exynos5_gpio_pin {
 };
 
 enum exynos5420_gpio_pin {
-   /* GPIO_PART1_STARTS */
-   EXYNOS5420_GPIO_A00,/* 0 */
-   EXYNOS5420_GPIO_A01,
-   EXYNOS5420_GPIO_A02,
-   EXYNOS5420_GPIO_A03,
-   EXYNOS5420_GPIO_A04,
-   EXYNOS5420_GPIO_A05,
-   EXYNOS5420_GPIO_A06,
-   EXYNOS5420_GPIO_A07,
-   EXYNOS5420_GPIO_A10,/* 8 */
-   EXYNOS5420_GPIO_A11,
-   EXYNOS5420_GPIO_A12,
-   EXYNOS5420_GPIO_A13,
-   EXYNOS5420_GPIO_A14,
-   EXYNOS5420_GPIO_A15,
-   EXYNOS5420_GPIO_A16,
-   EXYNOS5420_GPIO_A17,
-   EXYNOS5420_GPIO_A20,/* 16 0x10 */
-   EXYNOS5420_GPIO_A21,
-   EXYNOS5420_GPIO_A22,
-   EXYNOS5420_GPIO_A23,
-   EXYNOS5420_GPIO_A24,
-   EXYNOS5420_GPIO_A25,
-   EXYNOS5420_GPIO_A26,
-   EXYNOS5420_GPIO_A27,
-   EXYNOS5420_GPIO_B00,/* 24 0x18 */
-   EXYNOS5420_GPIO_B01,
-   EXYNOS5420_GPIO_B02,
-   EXYNOS5420_GPIO_B03,
-   EXYNOS5420_GPIO_B04,
-   EXYNOS5420_GPIO_B05,
-   EXYNOS5420_GPIO_B06,
-   EXYNOS5420_GPIO_B07,
-   EXYNOS5420_GPIO_B10,/* 32 0x20 */
-   EXYNOS5420_GPIO_B11,
-   EXYNOS5420_GPIO_B12,
-   EXYNOS5420_GPIO_B13,
-   EXYNOS5420_GPIO_B14,
-   EXYNOS5420_GPIO_B15,
-   EXYNOS5420_GPIO_B16,
-   EXYNOS5420_GPIO_B17,
-   EXYNOS5420_GPIO_B20,/* 40 0x28 */
-   EXYNOS5420_GPIO_B21,
-   EXYNOS5420_GPIO_B22,
-   EXYNOS5420_GPIO_B23,
-   EXYNOS5420_GPIO_B24,
-   EXYNOS5420_GPIO_B25,
-   EXYNOS5420_GPIO_B26,
-   EXYNOS5420_GPIO_B27,
-   EXYNOS5420_GPIO_B30,/* 48 0x30 */
-   EXYNOS5420_GPIO_B31,
-   EXYNOS5420_GPIO_B32,
-   EXYNOS5420_GPIO_B33,
-   EXYNOS5420_GPIO_B34,
-   EXYNOS5420_GPIO_B35,
-   EXYNOS5420_GPIO_B36,
-   EXYNOS5420_GPIO_B37,
-   EXYNOS5420_GPIO_B40,/* 56 0x38 */
-   EXYNOS5420_GPIO_B41,
-   EXYNOS5420_GPIO_B42,
-   EXYNOS5420_GPIO_B43,
-   EXYNOS5420_GPIO_B44,
-   EXYNOS5420_GPIO_B45,
-   EXYNOS5420_GPIO_B46,
-   EXYNOS5420_GPIO_B47,
-   EXYNOS5420_GPIO_H00,/* 64 0x40 */
-   EXYNOS5420_GPIO_H01,
-   EXYNOS5420_GPIO_H02,
-   EXYNOS5420_GPIO_H03,
-   EXYNOS5420_GPIO_H04,
-   EXYNOS5420_GPIO_H05,
-   EXYNOS5420_GPIO_H06,
-   EXYNOS5420_GPIO_H07,
-
-   /* GPIO PART 2 STARTS*/
-   EXYNOS5420_GPIO_MAX_PORT_PART_1,/* 72 0x48 */
-   EXYNOS5420_GPIO_Y70 = EXYNOS5420_GPIO_MAX_PORT_PART_1,
+   EXYNOS5420_GPIO_Y70,
EXYNOS5420_GPIO_Y71,
EXYNOS5420_GPIO_Y72,
EXYNOS5420_GPIO_Y73,
@@ -1112,10 +1036,7 @@ enum exynos5420_gpio_pin {
EXYNOS5420_GPIO_Y75,
EXYNOS5420_GPIO_Y76,
EXYNOS5420_GPIO_Y77,
-
-   /* GPIO PART 3 STARTS*/
-   EXYNOS5420_GPIO_MAX_PORT_PART_2,/* 80 0x50 */
-   EXYNOS5420_GPIO_X00 = EXYNOS5420_GPIO_MAX_PORT_PART_2,
+   EXYNOS5420_GPIO_X00,