Re: [U-Boot] [PATCH v3 1/3] NAND boot: MPC8536DS support
Dear Mingkai Hu, In message 1253244935-1555-1-git-send-email-mingkai...@freescale.com you wrote: MPC8536E can support booting from NAND flash which uses the image u-boot-nand.bin. This image contains two parts: a 4K NAND loader and a main U-Boot image. The former is appended to the latter to produce u-boot-nand.bin. The 4K NAND loader includes the corresponding nand_spl directory, along with the code twisted by CONFIG_NAND_SPL. The main U-Boot image just like a general U-Boot image except the parts that included by CONFIG_SYS_RAMBOOT. When power on, eLBC will automatically load from bank 0 the 4K NAND loader into the FCM buffer RAM where CPU can execute the boot code directly. In the first stage, the NAND loader copies itself to RAM or L2SRAM to free up the FCM buffer RAM, then loads the main image from NAND flash to RAM or L2SRAM and boot from it. This patch implements the NAND loader to load the main image into L2SRAM, so the main image can configure the RAM by using SPD EEPROM. In the first stage, the NAND loader copies itself to the second to last 4K address space, and uses the last 4K address space as the initial RAM for stack. Obviously, the size of L2SRAM shouldn't be less than the size of the image used. If so, the workaround is to generate another image that includes the code to configure the RAM by SPD and load it to L2SRAM first, then relocate the main image to RAM to boot up. Signed-off-by: Mingkai Hu mingkai...@freescale.com --- Change over v2: - Intergrated Kumar's comments. - Aligned to the leatest git tree I am a bit surprised about your way to number patch versions ;-) We had a [PATCH v3 1/3] NAND boot: MPC8536DS support on Sep 18 already, and now again. But OK, the things I complained about for the old version are still present, too. Please fix - but then update the version, too, please. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Without freedom of choice there is no creativity. -- Kirk, The return of the Archons, stardate 3157.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/3] NAND boot: MPC8536DS support
-Original Message- From: Wolfgang Denk [mailto:w...@denx.de] Sent: Wednesday, September 23, 2009 5:11 AM To: Hu Mingkai-B21284 Cc: u-boot@lists.denx.de; Wood Scott-B07421; ga...@kernel.crashing.org Subject: Re: [U-Boot] [PATCH v3 1/3] NAND boot: MPC8536DS support Change over v2: - Intergrated Kumar's comments. - Aligned to the leatest git tree I am a bit surprised about your way to number patch versions ;-) We had a [PATCH v3 1/3] NAND boot: MPC8536DS support on Sep 18 already, and now again. Actually this patch you replied is the patch sent on Sep 18 :-) But OK, the things I complained about for the old version are still present, too. The version you complained about is v2, it should be v3, and this version v3 should be v4, but I sent this version as v3, wanted to make it continuous with v2 and didn't leave a sudden v4. Please fix - but then update the version, too, please. Ok, the next version should be v4, is that OK? :-) Thanks, Mingkai ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/3] NAND boot: MPC8536DS support
-Original Message-
From: Kumar Gala [mailto:ga...@kernel.crashing.org]
Sent: Saturday, September 19, 2009 2:42 AM
To: Hu Mingkai-B21284
Cc: u-boot@lists.denx.de; Wood Scott-B07421
Subject: Re: [PATCH v3 1/3] NAND boot: MPC8536DS support
+
+#include common.h
+#include asm/io.h
+
+void cpu_init_f(void)
+{
+ ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR);
+
+ /*
+* LCRR - Clock Ratio Register - set up local bus timing
+* when needed
+*/
+ out_be32(lbc-lcrr, LCRR_DBYP | LCRR_CLKDIV_8);
+
+#if defined(CONFIG_NAND_BR_PRELIM) \
+defined(CONFIG_NAND_OR_PRELIM)
+ out_be32(lbc-br0, CONFIG_NAND_BR_PRELIM);
+ out_be32(lbc-or0, CONFIG_NAND_OR_PRELIM);
+ /* for FPGA */
+ out_be32(lbc-br3, CONFIG_SYS_BR3_PRELIM);
+ out_be32(lbc-or3, CONFIG_SYS_OR3_PRELIM); #else #error
+CONFIG_NAND_BR_PRELIM, CONFIG_NAND_OR_PRELIM must be defined #endif
+
Should we not have br/or1, br/or2, etc?
In order to boot from NAND, it should be connected on br/or0, so we
don't care br/or1, br/or2.
The br/or3 shoud be moved to board specific file nand_boot.c, as dave
pointed, owing to different
connection between the different borads.
Thanks,
Mingkai
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/3] NAND boot: MPC8536DS support
-Original Message-
From: Wood Scott-B07421
Sent: Saturday, September 19, 2009 12:37 AM
To: Hu Mingkai-B21284
Cc: u-boot@lists.denx.de; ga...@kernel.crashing.org
Subject: Re: [PATCH v3 1/3] NAND boot: MPC8536DS support
On Fri, Sep 18, 2009 at 11:35:33AM +0800, Mingkai Hu wrote:
diff --git a/Makefile b/Makefile
index 99837a3..4d18a9f 100644
--- a/Makefile
+++ b/Makefile
@@ -2446,6 +2446,7 @@ vme8349_config: unconfig
ATUM8548_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc85xx atum8548
+MPC8536DS_NAND_config \
MPC8536DS_36BIT_config \
MPC8536DS_config: unconfig
NAND and 36BIT are orthogonal.
How about changing it to:
# Options: NAND, 36BIT
MPC8536DS_%_config MPC8536DS_config: unconfig
I don't get it. what's the '%'? or how to use it?
+#if defined(CONFIG_NAND_BR_PRELIM) \
+defined(CONFIG_NAND_OR_PRELIM)
+ out_be32(lbc-br0, CONFIG_NAND_BR_PRELIM);
+ out_be32(lbc-or0, CONFIG_NAND_OR_PRELIM);
+ /* for FPGA */
+ out_be32(lbc-br3, CONFIG_SYS_BR3_PRELIM);
+ out_be32(lbc-or3, CONFIG_SYS_OR3_PRELIM);
Those last two lines should probably be #ifdef CONFIG_SYS_BR3_PRELIM.
Ok.
+#if defined(CONFIG_SYS_RAMBOOT) defined(CONFIG_SYS_INIT_L2_ADDR)
+ ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR;
+ uint l2srbar;
+ int i;
+
+ l2srbar = CONFIG_SYS_INIT_L2_ADDR;
+ out_be32(l2cache-l2srbar0, l2srbar);
+
+ /* set MBECCDIS=1, SBECCDIS=1 */
+ out_be32(l2cache-l2errdis,
+ (MPC85xx_L2ERRDIS_MBECC |
+MPC85xx_L2ERRDIS_SBECC));
+
+ /* set L2E=1 L2SRAM=001 */
+ out_be32(l2cache-l2ctl,
+ (MPC85xx_L2CTL_L2E |
+MPC85xx_L2CTL_L2SRAM_ENTIRE));
+
+ /* Initialize L2 SRAM to zero */
+ for (i = 0; i CONFIG_SYS_L2_SIZE; i++)
+ ((char *)l2srbar)[i] = 0;
uint is not a valid type for either virtual or physical addresses.
Use a pointer (or uintptr_t if you must) for the former, and
phys_addr_t for the latter.
You're using it as char *, so why not just declare it that way?
Ok, change to char *.
+void board_init_f(ulong bootflag)
+{
+ u8 sysclk_ratio;
You're not saving any space over plain int/uint...
+ uint plat_ratio, bus_clk, sys_clk;
+ volatile ccsr_gur_t *gur = (void
*)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+
+ /* initialize selected port with appropriate baud rate */
+ sysclk_ratio = *((volatile unsigned char *)(PIXIS_BASE
+ PIXIS_SPD));
+ sysclk_ratio = 0x7;
+ switch (sysclk_ratio) {
+ case 0:
+ sys_clk = 3000;
+ break;
+ case 1:
+ sys_clk = 3600;
+ break;
+ case 2:
+ sys_clk = 4500;
+ break;
+ case 3:
+ sys_clk = 6000;
+ break;
+ case 4:
+ sys_clk = 83332500;
+ break;
+ case 5:
+ sys_clk = 9000;
+ break;
+ case 6:
+ sys_clk = 12000;
+ break;
+ case 7:
+ sys_clk = 15000;
+ break;
+ default:
+ sys_clk = 0;
This default: case is impossible to reach.
+ break;
+ }
We could save some space by putting this in a table.
+ plat_ratio = (gur-porpllsr) 0x003e;
Unnecessary parens.
+ plat_ratio = 1;
plat_ratio /= 2 is more readable and should generate identical code.
Reshaped this function(board_init_f) by table-driven method.
Thanks,
Mingkai
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/3] NAND boot: MPC8536DS support
On Sun, Sep 20, 2009 at 11:40:33PM -0700, Hu Mingkai-B21284 wrote: How about changing it to: # Options: NAND, 36BIT MPC8536DS_%_config MPC8536DS_config: unconfig I don't get it. what's the '%'? or how to use it? It is a wildcard (or more specifically, a pattern rule). It will match anything that begins with MPC8536DS_ and ends with _config. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/3] NAND boot: MPC8536DS support
Hi Liu,
I have posted the patch for the same.
Have a look at the attachment.
Thanks
Dipen
-Original Message-
From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de]
On Behalf Of Liu Dave-R63238
Sent: Saturday, September 19, 2009 5:31 AM
To: Kumar Gala; Hu Mingkai-B21284
Cc: Wood Scott-B07421; u-boot@lists.denx.de
Subject: Re: [U-Boot] [PATCH v3 1/3] NAND boot: MPC8536DS support
diff --git a/cpu/mpc85xx/cpu_init_nand.c
+void cpu_init_f(void)
+{
+ ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR);
+
+ /*
+* LCRR - Clock Ratio Register - set up local bus timing
+* when needed
+*/
+ out_be32(lbc-lcrr, LCRR_DBYP | LCRR_CLKDIV_8);
+
+#if defined(CONFIG_NAND_BR_PRELIM) \
+defined(CONFIG_NAND_OR_PRELIM)
+ out_be32(lbc-br0, CONFIG_NAND_BR_PRELIM);
+ out_be32(lbc-or0, CONFIG_NAND_OR_PRELIM);
+ /* for FPGA */
+ out_be32(lbc-br3, CONFIG_SYS_BR3_PRELIM);
+ out_be32(lbc-or3, CONFIG_SYS_OR3_PRELIM); #else #error
+CONFIG_NAND_BR_PRELIM, CONFIG_NAND_OR_PRELIM must
be defined
+#endif
+
Should we not have br/or1, br/or2, etc?
And FPGA stuff put here cpu/mpc85xx.
It is *not* good practice and should be move out from here.
I know the FPGA is for UART clock.
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
---BeginMessage---
Signed-off-by: Dipen Dudhat dipen.dud...@freescale.com
---
-Please ignore the last patch of the same.
cpu/mpc85xx/cpu_init_nand.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/cpu/mpc85xx/cpu_init_nand.c b/cpu/mpc85xx/cpu_init_nand.c
index e62f8d3..ed0eb2d 100644
--- a/cpu/mpc85xx/cpu_init_nand.c
+++ b/cpu/mpc85xx/cpu_init_nand.c
@@ -37,9 +37,12 @@ void cpu_init_f(void)
defined(CONFIG_NAND_OR_PRELIM)
out_be32(lbc-br0, CONFIG_NAND_BR_PRELIM);
out_be32(lbc-or0, CONFIG_NAND_OR_PRELIM);
+#if defined(CONFIG_SYS_BR3_PRELIM) \
+defined(CONFIG_SYS_OR3_PRELIM)
/* for FPGA */
out_be32(lbc-br3, CONFIG_SYS_BR3_PRELIM);
out_be32(lbc-or3, CONFIG_SYS_OR3_PRELIM);
+#endif
#else
#error CONFIG_NAND_BR_PRELIM, CONFIG_NAND_OR_PRELIM must be defined
#endif
--
1.5.6.3
---End Message---
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/3] NAND boot: MPC8536DS support
-Original Message- From: Kumar Gala [mailto:ga...@kernel.crashing.org] Sent: Saturday, September 19, 2009 2:41 AM To: Hu Mingkai-B21284 Cc: u-boot@lists.denx.de; Wood Scott-B07421 Subject: Re: [PATCH v3 1/3] NAND boot: MPC8536DS support On Sep 17, 2009, at 10:35 PM, Mingkai Hu wrote: nand_spl/board/freescale/mpc8536ds/u-boot.lds | 67 + Can we move this to some common location? cpu/mpc85xx/u- boot_nand_spl.lds? Yes, I think it can. Thanks Mingkai ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/3] NAND boot: MPC8536DS support
-Original Message- From: Kumar Gala [mailto:ga...@kernel.crashing.org] Sent: Friday, September 18, 2009 9:55 PM To: Hu Mingkai-B21284 Cc: u-boot@lists.denx.de; Wood Scott-B07421 Subject: Re: [PATCH v3 1/3] NAND boot: MPC8536DS support Looks good. Any plans on adding support on 8572 and/or p2020? Time is tight for 8536 final release now. After the release, I'll add for it. Thanks, Mingkai ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/3] NAND boot: MPC8536DS support
-Original Message-
From: Liu Dave-R63238
Sent: Saturday, September 19, 2009 8:01 AM
To: Kumar Gala; Hu Mingkai-B21284
Cc: Wood Scott-B07421; u-boot@lists.denx.de
Subject: RE: [U-Boot] [PATCH v3 1/3] NAND boot: MPC8536DS support
diff --git a/cpu/mpc85xx/cpu_init_nand.c
+void cpu_init_f(void)
+{
+ ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR);
+
+ /*
+ * LCRR - Clock Ratio Register - set up local bus timing
+ * when needed
+ */
+ out_be32(lbc-lcrr, LCRR_DBYP | LCRR_CLKDIV_8);
+
+#if defined(CONFIG_NAND_BR_PRELIM) \
+ defined(CONFIG_NAND_OR_PRELIM)
+ out_be32(lbc-br0, CONFIG_NAND_BR_PRELIM);
+ out_be32(lbc-or0, CONFIG_NAND_OR_PRELIM);
+ /* for FPGA */
+ out_be32(lbc-br3, CONFIG_SYS_BR3_PRELIM);
+ out_be32(lbc-or3, CONFIG_SYS_OR3_PRELIM); #else #error
+CONFIG_NAND_BR_PRELIM, CONFIG_NAND_OR_PRELIM must
be defined
+#endif
+
Should we not have br/or1, br/or2, etc?
And FPGA stuff put here cpu/mpc85xx.
It is *not* good practice and should be move out from here.
I know the FPGA is for UART clock.
Yes, it's only used for getting the SYSCLK. Where should we put it to?
to the nand_spl/board/freescale/mpc8536ds/nand_boot.c?
Thanks,
Mingkai
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/3] NAND boot: MPC8536DS support
Looks good. Any plans on adding support on 8572 and/or p2020? - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/3] NAND boot: MPC8536DS support
On Fri, Sep 18, 2009 at 11:35:33AM +0800, Mingkai Hu wrote:
diff --git a/Makefile b/Makefile
index 99837a3..4d18a9f 100644
--- a/Makefile
+++ b/Makefile
@@ -2446,6 +2446,7 @@ vme8349_config: unconfig
ATUM8548_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc85xx atum8548
+MPC8536DS_NAND_config \
MPC8536DS_36BIT_config \
MPC8536DS_config: unconfig
NAND and 36BIT are orthogonal.
How about changing it to:
# Options: NAND, 36BIT
MPC8536DS_%_config MPC8536DS_config: unconfig
+#if defined(CONFIG_NAND_BR_PRELIM) \
+ defined(CONFIG_NAND_OR_PRELIM)
+ out_be32(lbc-br0, CONFIG_NAND_BR_PRELIM);
+ out_be32(lbc-or0, CONFIG_NAND_OR_PRELIM);
+ /* for FPGA */
+ out_be32(lbc-br3, CONFIG_SYS_BR3_PRELIM);
+ out_be32(lbc-or3, CONFIG_SYS_OR3_PRELIM);
Those last two lines should probably be #ifdef CONFIG_SYS_BR3_PRELIM.
+#if defined(CONFIG_SYS_RAMBOOT) defined(CONFIG_SYS_INIT_L2_ADDR)
+ ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR;
+ uint l2srbar;
+ int i;
+
+ l2srbar = CONFIG_SYS_INIT_L2_ADDR;
+ out_be32(l2cache-l2srbar0, l2srbar);
+
+ /* set MBECCDIS=1, SBECCDIS=1 */
+ out_be32(l2cache-l2errdis,
+ (MPC85xx_L2ERRDIS_MBECC |
+ MPC85xx_L2ERRDIS_SBECC));
+
+ /* set L2E=1 L2SRAM=001 */
+ out_be32(l2cache-l2ctl,
+ (MPC85xx_L2CTL_L2E |
+ MPC85xx_L2CTL_L2SRAM_ENTIRE));
+
+ /* Initialize L2 SRAM to zero */
+ for (i = 0; i CONFIG_SYS_L2_SIZE; i++)
+ ((char *)l2srbar)[i] = 0;
uint is not a valid type for either virtual or physical addresses.
Use a pointer (or uintptr_t if you must) for the former, and phys_addr_t for
the latter.
You're using it as char *, so why not just declare it that way?
+void board_init_f(ulong bootflag)
+{
+ u8 sysclk_ratio;
You're not saving any space over plain int/uint...
+ uint plat_ratio, bus_clk, sys_clk;
+ volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+
+ /* initialize selected port with appropriate baud rate */
+ sysclk_ratio = *((volatile unsigned char *)(PIXIS_BASE + PIXIS_SPD));
+ sysclk_ratio = 0x7;
+ switch (sysclk_ratio) {
+ case 0:
+ sys_clk = 3000;
+ break;
+ case 1:
+ sys_clk = 3600;
+ break;
+ case 2:
+ sys_clk = 4500;
+ break;
+ case 3:
+ sys_clk = 6000;
+ break;
+ case 4:
+ sys_clk = 83332500;
+ break;
+ case 5:
+ sys_clk = 9000;
+ break;
+ case 6:
+ sys_clk = 12000;
+ break;
+ case 7:
+ sys_clk = 15000;
+ break;
+ default:
+ sys_clk = 0;
This default: case is impossible to reach.
+ break;
+ }
We could save some space by putting this in a table.
+ plat_ratio = (gur-porpllsr) 0x003e;
Unnecessary parens.
+ plat_ratio = 1;
plat_ratio /= 2 is more readable and should generate identical code.
-Scott
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/3] NAND boot: MPC8536DS support
On Sep 17, 2009, at 10:35 PM, Mingkai Hu wrote: nand_spl/board/freescale/mpc8536ds/u-boot.lds | 67 + Can we move this to some common location? cpu/mpc85xx/u- boot_nand_spl.lds? - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/3] NAND boot: MPC8536DS support
On Sep 17, 2009, at 10:35 PM, Mingkai Hu wrote:
diff --git a/cpu/mpc85xx/cpu_init_nand.c b/cpu/mpc85xx/cpu_init_nand.c
new file mode 100644
index 000..e62f8d3
--- /dev/null
+++ b/cpu/mpc85xx/cpu_init_nand.c
@@ -0,0 +1,69 @@
+/*
+ * Copyright 2009 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/io.h
+
+void cpu_init_f(void)
+{
+ ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR);
+
+ /*
+ * LCRR - Clock Ratio Register - set up local bus timing
+ * when needed
+ */
+ out_be32(lbc-lcrr, LCRR_DBYP | LCRR_CLKDIV_8);
+
+#if defined(CONFIG_NAND_BR_PRELIM) \
+ defined(CONFIG_NAND_OR_PRELIM)
+ out_be32(lbc-br0, CONFIG_NAND_BR_PRELIM);
+ out_be32(lbc-or0, CONFIG_NAND_OR_PRELIM);
+ /* for FPGA */
+ out_be32(lbc-br3, CONFIG_SYS_BR3_PRELIM);
+ out_be32(lbc-or3, CONFIG_SYS_OR3_PRELIM);
+#else
+#error CONFIG_NAND_BR_PRELIM, CONFIG_NAND_OR_PRELIM must be defined
+#endif
+
Should we not have br/or1, br/or2, etc?
- k
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/3] NAND boot: MPC8536DS support
diff --git a/cpu/mpc85xx/cpu_init_nand.c
+void cpu_init_f(void)
+{
+ ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR);
+
+ /*
+* LCRR - Clock Ratio Register - set up local bus timing
+* when needed
+*/
+ out_be32(lbc-lcrr, LCRR_DBYP | LCRR_CLKDIV_8);
+
+#if defined(CONFIG_NAND_BR_PRELIM) \
+defined(CONFIG_NAND_OR_PRELIM)
+ out_be32(lbc-br0, CONFIG_NAND_BR_PRELIM);
+ out_be32(lbc-or0, CONFIG_NAND_OR_PRELIM);
+ /* for FPGA */
+ out_be32(lbc-br3, CONFIG_SYS_BR3_PRELIM);
+ out_be32(lbc-or3, CONFIG_SYS_OR3_PRELIM);
+#else
+#error CONFIG_NAND_BR_PRELIM, CONFIG_NAND_OR_PRELIM must
be defined
+#endif
+
Should we not have br/or1, br/or2, etc?
And FPGA stuff put here cpu/mpc85xx.
It is *not* good practice and should be move out from here.
I know the FPGA is for UART clock.
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 1/3] NAND boot: MPC8536DS support
MPC8536E can support booting from NAND flash which uses the
image u-boot-nand.bin. This image contains two parts: a 4K
NAND loader and a main U-Boot image. The former is appended
to the latter to produce u-boot-nand.bin. The 4K NAND loader
includes the corresponding nand_spl directory, along with the
code twisted by CONFIG_NAND_SPL. The main U-Boot image just
like a general U-Boot image except the parts that included by
CONFIG_SYS_RAMBOOT.
When power on, eLBC will automatically load from bank 0 the
4K NAND loader into the FCM buffer RAM where CPU can execute
the boot code directly. In the first stage, the NAND loader
copies itself to RAM or L2SRAM to free up the FCM buffer RAM,
then loads the main image from NAND flash to RAM or L2SRAM
and boot from it.
This patch implements the NAND loader to load the main image
into L2SRAM, so the main image can configure the RAM by using
SPD EEPROM. In the first stage, the NAND loader copies itself
to the second to last 4K address space, and uses the last 4K
address space as the initial RAM for stack.
Obviously, the size of L2SRAM shouldn't be less than the size
of the image used. If so, the workaround is to generate another
image that includes the code to configure the RAM by SPD and
load it to L2SRAM first, then relocate the main image to RAM
to boot up.
Signed-off-by: Mingkai Hu mingkai...@freescale.com
---
Change over v2:
- Intergrated Kumar's comments.
- Aligned to the leatest git tree
MAKEALL|1 +
Makefile |1 +
board/freescale/mpc8536ds/config.mk|7 ++
board/freescale/mpc8536ds/tlb.c| 11 ++
cpu/mpc85xx/cpu_init_nand.c| 69 +
include/configs/MPC8536DS.h| 96 +++
nand_spl/board/freescale/mpc8536ds/Makefile| 123
nand_spl/board/freescale/mpc8536ds/nand_boot.c | 99 +++
nand_spl/board/freescale/mpc8536ds/u-boot.lds | 67 +
9 files changed, 454 insertions(+), 20 deletions(-)
create mode 100644 cpu/mpc85xx/cpu_init_nand.c
create mode 100644 nand_spl/board/freescale/mpc8536ds/Makefile
create mode 100644 nand_spl/board/freescale/mpc8536ds/nand_boot.c
create mode 100644 nand_spl/board/freescale/mpc8536ds/u-boot.lds
diff --git a/MAKEALL b/MAKEALL
index 1d50c34..283add0 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -378,6 +378,7 @@ LIST_83xx= \
LIST_85xx=\
ATUM8548\
MPC8536DS \
+ MPC8536DS_NAND \
MPC8540ADS \
MPC8540EVAL \
MPC8541CDS \
diff --git a/Makefile b/Makefile
index 99837a3..4d18a9f 100644
--- a/Makefile
+++ b/Makefile
@@ -2446,6 +2446,7 @@ vme8349_config: unconfig
ATUM8548_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc85xx atum8548
+MPC8536DS_NAND_config \
MPC8536DS_36BIT_config \
MPC8536DS_config: unconfig
@$(MKCONFIG) -t $(@:_config=) MPC8536DS ppc mpc85xx mpc8536ds freescale
diff --git a/board/freescale/mpc8536ds/config.mk
b/board/freescale/mpc8536ds/config.mk
index c1d0525..d6490b5 100644
--- a/board/freescale/mpc8536ds/config.mk
+++ b/board/freescale/mpc8536ds/config.mk
@@ -23,6 +23,13 @@
#
# mpc8536ds board
#
+ifndef NAND_SPL
+ifeq ($(CONFIG_MK_NAND), y)
+TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE)
+LDSCRIPT := $(TOPDIR)/cpu/$(CPU)/u-boot-nand.lds
+endif
+endif
+
ifndef TEXT_BASE
TEXT_BASE = 0xeff8
endif
diff --git a/board/freescale/mpc8536ds/tlb.c b/board/freescale/mpc8536ds/tlb.c
index 35a13d4..dc52d7f 100644
--- a/board/freescale/mpc8536ds/tlb.c
+++ b/board/freescale/mpc8536ds/tlb.c
@@ -71,6 +71,17 @@ struct fsl_e_tlb_entry tlb_table[] = {
SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 4, BOOKE_PAGESZ_1M, 1),
+
+#if defined(CONFIG_SYS_RAMBOOT) defined(CONFIG_SYS_INIT_L2_ADDR)
+ /* *I*G - L2SRAM */
+ SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 5, BOOKE_PAGESZ_256K, 1),
+ SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR + 0x4,
+ CONFIG_SYS_INIT_L2_ADDR_PHYS + 0x4,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+ 0, 6, BOOKE_PAGESZ_256K, 1),
+#endif
};
int num_tlb_entries = ARRAY_SIZE(tlb_table);
diff --git a/cpu/mpc85xx/cpu_init_nand.c b/cpu/mpc85xx/cpu_init_nand.c
new file mode 100644
index 000..e62f8d3
--- /dev/null
+++ b/cpu/mpc85xx/cpu_init_nand.c
@@ -0,0 +1,69 @@
+/*
+ * Copyright 2009 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published
