Re: [U-Boot] [PATCH v3 3/4] riscv: prior_stage_fdt_address should only be used when OF_PRIOR_STAGE is enabled
Hi lukas
Auer, Lukas 於 2019年4月29日 週一 下午7:55寫道：
>
> Hi Rick,
>
> On Mon, 2019-04-29 at 15:44 +0800, Andes wrote:
> > From: Rick Chen
> >
> > This patch will fix prior_stage_fdt_address write failure problem, when
> > AE350 boots from flash.
> >
> > When AE350 boots from flash, prior_stage_fdt_address will be flash
> > address, we shall avoid it to be written.
> >
> > Signed-off-by: Rick Chen
> > Cc: Greentime Hu
> > ---
> > arch/riscv/cpu/cpu.c| 2 ++
> > arch/riscv/cpu/start.S | 2 ++
> > board/AndesTech/ax25-ae350/ax25-ae350.c | 4
> > include/configs/ax25-ae350.h| 2 +-
> > 4 files changed, 5 insertions(+), 5 deletions(-)
> >
> > diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
> > index 0cfd7d6..e9a8b43 100644
> > --- a/arch/riscv/cpu/cpu.c
> > +++ b/arch/riscv/cpu/cpu.c
> > @@ -15,7 +15,9 @@
> > * The variables here must be stored in the data section since they are
> > used
> > * before the bss section is available.
> > */
> > +#ifdef CONFIG_OF_PRIOR_STAGE
> > phys_addr_t prior_stage_fdt_address __attribute__((section(".data")));
> > +#endif
> > #ifndef CONFIG_XIP
> > u32 hart_lottery __attribute__((section(".data"))) = 0;
> >
> > diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
> > index 3402d09..60ac8c6 100644
> > --- a/arch/riscv/cpu/start.S
> > +++ b/arch/riscv/cpu/start.S
> > @@ -111,8 +111,10 @@ call_board_init_f_0:
> > bneztp, secondary_hart_loop
> > #endif
> >
> > +#ifdef CONFIG_OF_PRIOR_STAGE
> > la t0, prior_stage_fdt_address
> > SREGs1, 0(t0)
> > +#endif
> >
> > jal board_init_f_init_reserve
> >
> > diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.c
> > b/board/AndesTech/ax25-ae350/ax25-ae350.c
> > index d343453..3d65ce7 100644
> > --- a/board/AndesTech/ax25-ae350/ax25-ae350.c
> > +++ b/board/AndesTech/ax25-ae350/ax25-ae350.c
> > @@ -67,10 +67,6 @@ ulong board_flash_get_legacy(ulong base, int banknum,
> > flash_info_t *info)
> >
> > void *board_fdt_blob_setup(void)
> > {
> > - void **ptr = (void *)_stage_fdt_address;
> > - if (fdt_magic(*ptr) == FDT_MAGIC)
> > - return (void *)*ptr;
> > -
>
> Please move this change and the following into a separate patch.
>
> You may also try to use CONFIG_OF_SEPARATE instead of CONFIG_OF_BOARD.
> As far as I know, this is the recommended configuration and with this
> change, I don't think CONFIG_OF_BOARD is needed anymore.
>
OK.
I will move it into a separate patch and use CONFIG_OF_SEPARATE.
Thanks
Rick
> Thanks,
> Lukas
>
> > return (void *)CONFIG_SYS_FDT_BASE;
> > }
> >
> > diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h
> > index 395f3a4..a4037f3 100644
> > --- a/include/configs/ax25-ae350.h
> > +++ b/include/configs/ax25-ae350.h
> > @@ -40,7 +40,7 @@
> > #define CONFIG_SYS_MALLOC_LEN (512 << 10)
> >
> > /* DT blob (fdt) address */
> > -#define CONFIG_SYS_FDT_BASE 0x000f
> > +#define CONFIG_SYS_FDT_BASE 0x800f
> >
> > /*
> > * Physical Memory Map
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Re: [U-Boot] [PATCH v3 3/4] riscv: prior_stage_fdt_address should only be used when OF_PRIOR_STAGE is enabled
Hi Rick,
On Mon, 2019-04-29 at 15:44 +0800, Andes wrote:
> From: Rick Chen
>
> This patch will fix prior_stage_fdt_address write failure problem, when
> AE350 boots from flash.
>
> When AE350 boots from flash, prior_stage_fdt_address will be flash
> address, we shall avoid it to be written.
>
> Signed-off-by: Rick Chen
> Cc: Greentime Hu
> ---
> arch/riscv/cpu/cpu.c| 2 ++
> arch/riscv/cpu/start.S | 2 ++
> board/AndesTech/ax25-ae350/ax25-ae350.c | 4
> include/configs/ax25-ae350.h| 2 +-
> 4 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
> index 0cfd7d6..e9a8b43 100644
> --- a/arch/riscv/cpu/cpu.c
> +++ b/arch/riscv/cpu/cpu.c
> @@ -15,7 +15,9 @@
> * The variables here must be stored in the data section since they are used
> * before the bss section is available.
> */
> +#ifdef CONFIG_OF_PRIOR_STAGE
> phys_addr_t prior_stage_fdt_address __attribute__((section(".data")));
> +#endif
> #ifndef CONFIG_XIP
> u32 hart_lottery __attribute__((section(".data"))) = 0;
>
> diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
> index 3402d09..60ac8c6 100644
> --- a/arch/riscv/cpu/start.S
> +++ b/arch/riscv/cpu/start.S
> @@ -111,8 +111,10 @@ call_board_init_f_0:
> bneztp, secondary_hart_loop
> #endif
>
> +#ifdef CONFIG_OF_PRIOR_STAGE
> la t0, prior_stage_fdt_address
> SREGs1, 0(t0)
> +#endif
>
> jal board_init_f_init_reserve
>
> diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.c
> b/board/AndesTech/ax25-ae350/ax25-ae350.c
> index d343453..3d65ce7 100644
> --- a/board/AndesTech/ax25-ae350/ax25-ae350.c
> +++ b/board/AndesTech/ax25-ae350/ax25-ae350.c
> @@ -67,10 +67,6 @@ ulong board_flash_get_legacy(ulong base, int banknum,
> flash_info_t *info)
>
> void *board_fdt_blob_setup(void)
> {
> - void **ptr = (void *)_stage_fdt_address;
> - if (fdt_magic(*ptr) == FDT_MAGIC)
> - return (void *)*ptr;
> -
Please move this change and the following into a separate patch.
You may also try to use CONFIG_OF_SEPARATE instead of CONFIG_OF_BOARD.
As far as I know, this is the recommended configuration and with this
change, I don't think CONFIG_OF_BOARD is needed anymore.
Thanks,
Lukas
> return (void *)CONFIG_SYS_FDT_BASE;
> }
>
> diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h
> index 395f3a4..a4037f3 100644
> --- a/include/configs/ax25-ae350.h
> +++ b/include/configs/ax25-ae350.h
> @@ -40,7 +40,7 @@
> #define CONFIG_SYS_MALLOC_LEN (512 << 10)
>
> /* DT blob (fdt) address */
> -#define CONFIG_SYS_FDT_BASE 0x000f
> +#define CONFIG_SYS_FDT_BASE 0x800f
>
> /*
> * Physical Memory Map
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[U-Boot] [PATCH v3 3/4] riscv: prior_stage_fdt_address should only be used when OF_PRIOR_STAGE is enabled
From: Rick Chen
This patch will fix prior_stage_fdt_address write failure problem, when
AE350 boots from flash.
When AE350 boots from flash, prior_stage_fdt_address will be flash
address, we shall avoid it to be written.
Signed-off-by: Rick Chen
Cc: Greentime Hu
---
arch/riscv/cpu/cpu.c| 2 ++
arch/riscv/cpu/start.S | 2 ++
board/AndesTech/ax25-ae350/ax25-ae350.c | 4
include/configs/ax25-ae350.h| 2 +-
4 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index 0cfd7d6..e9a8b43 100644
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -15,7 +15,9 @@
* The variables here must be stored in the data section since they are used
* before the bss section is available.
*/
+#ifdef CONFIG_OF_PRIOR_STAGE
phys_addr_t prior_stage_fdt_address __attribute__((section(".data")));
+#endif
#ifndef CONFIG_XIP
u32 hart_lottery __attribute__((section(".data"))) = 0;
diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
index 3402d09..60ac8c6 100644
--- a/arch/riscv/cpu/start.S
+++ b/arch/riscv/cpu/start.S
@@ -111,8 +111,10 @@ call_board_init_f_0:
bneztp, secondary_hart_loop
#endif
+#ifdef CONFIG_OF_PRIOR_STAGE
la t0, prior_stage_fdt_address
SREGs1, 0(t0)
+#endif
jal board_init_f_init_reserve
diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.c
b/board/AndesTech/ax25-ae350/ax25-ae350.c
index d343453..3d65ce7 100644
--- a/board/AndesTech/ax25-ae350/ax25-ae350.c
+++ b/board/AndesTech/ax25-ae350/ax25-ae350.c
@@ -67,10 +67,6 @@ ulong board_flash_get_legacy(ulong base, int banknum,
flash_info_t *info)
void *board_fdt_blob_setup(void)
{
- void **ptr = (void *)_stage_fdt_address;
- if (fdt_magic(*ptr) == FDT_MAGIC)
- return (void *)*ptr;
-
return (void *)CONFIG_SYS_FDT_BASE;
}
diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h
index 395f3a4..a4037f3 100644
--- a/include/configs/ax25-ae350.h
+++ b/include/configs/ax25-ae350.h
@@ -40,7 +40,7 @@
#define CONFIG_SYS_MALLOC_LEN (512 << 10)
/* DT blob (fdt) address */
-#define CONFIG_SYS_FDT_BASE0x000f
+#define CONFIG_SYS_FDT_BASE0x800f
/*
* Physical Memory Map
--
2.7.4
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