This adds initial support for Colibri VF50/VF61 based on Freescale
Vybrid SoC.
- CPU clocked at 396/500 MHz
- DDR3 at 396MHz
- for VF50, use PLL2 as memory clock (synchronous mode)
- for VF61, use PLL1 as memory clock (asynchronous mode)
- Console on UART0 (Colibri UART_A)
- Ethernet on FEC1
- PLL5 based RMII clocking (E.g. No external crystal)
- UART_A and UART_C I/O muxing
- Boot from NAND by default
Tested on Colibri VF50/VF61 booting using serial loader over UART.
Signed-off-by: Sanchayan Maity
---
arch/arm/Kconfig | 5 +
arch/arm/include/asm/arch-vf610/imx-regs.h | 5 +
board/toradex/colibri_vf/Kconfig | 18 ++
board/toradex/colibri_vf/MAINTAINERS | 6 +
board/toradex/colibri_vf/Makefile | 7 +
board/toradex/colibri_vf/colibri_vf.c | 361 +
board/toradex/colibri_vf/imximage.cfg | 17 ++
configs/colibri_vf_defconfig | 3 +
include/configs/colibri_vf.h | 234 +++
9 files changed, 656 insertions(+)
create mode 100644 board/toradex/colibri_vf/Kconfig
create mode 100644 board/toradex/colibri_vf/MAINTAINERS
create mode 100644 board/toradex/colibri_vf/Makefile
create mode 100644 board/toradex/colibri_vf/colibri_vf.c
create mode 100644 board/toradex/colibri_vf/imximage.cfg
create mode 100644 configs/colibri_vf_defconfig
create mode 100644 include/configs/colibri_vf.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 7ed0e20..fb41f53 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -617,6 +617,10 @@ config TARGET_VF610TWR
bool "Support vf610twr"
select CPU_V7
+config TARGET_COLIBRI_VF
+ bool "Support Colibri VF50/61"
+ select CPU_V7
+
config ZYNQ
bool "Xilinx Zynq Platform"
select CPU_V7
@@ -875,6 +879,7 @@ source "board/ti/ti814x/Kconfig"
source "board/ti/ti816x/Kconfig"
source "board/timll/devkit3250/Kconfig"
source "board/toradex/colibri_pxa270/Kconfig"
+source "board/toradex/colibri_vf/Kconfig"
source "board/tqc/tqma6/Kconfig"
source "board/trizepsiv/Kconfig"
source "board/ttcontrol/vision2/Kconfig"
diff --git a/arch/arm/include/asm/arch-vf610/imx-regs.h
b/arch/arm/include/asm/arch-vf610/imx-regs.h
index a5908ca..bf41971 100644
--- a/arch/arm/include/asm/arch-vf610/imx-regs.h
+++ b/arch/arm/include/asm/arch-vf610/imx-regs.h
@@ -263,6 +263,11 @@
#define SRC_SRSR_WDOG_M4 (0x1 << 4)
#define SRC_SRSR_WDOG_A5 (0x1 << 3)
#define SRC_SRSR_POR_RST (0x1 << 0)
+#define SRC_SBMR2_BMOD_MASK (0x3 << 24)
+#define SRC_SBMR2_BMOD_SHIFT24
+#define SRC_SBMR2_BMOD_FUSES0x0
+#define SRC_SBMR2_BMOD_SERIAL 0x1
+#define SRC_SBMR2_BMOD_RCON 0x2
/* Slow Clock Source Controller Module (SCSC) */
#define SCSC_SOSC_CTR_SOSC_EN0x1
diff --git a/board/toradex/colibri_vf/Kconfig b/board/toradex/colibri_vf/Kconfig
new file mode 100644
index 000..2c3cb30
--- /dev/null
+++ b/board/toradex/colibri_vf/Kconfig
@@ -0,0 +1,18 @@
+if TARGET_COLIBRI_VF
+
+config SYS_CPU
+ default "armv7"
+
+config SYS_BOARD
+ default "colibri_vf"
+
+config SYS_VENDOR
+ default "toradex"
+
+config SYS_SOC
+ default "vf610"
+
+config SYS_CONFIG_NAME
+ default "colibri_vf"
+
+endif
diff --git a/board/toradex/colibri_vf/MAINTAINERS
b/board/toradex/colibri_vf/MAINTAINERS
new file mode 100644
index 000..551c575
--- /dev/null
+++ b/board/toradex/colibri_vf/MAINTAINERS
@@ -0,0 +1,6 @@
+Colibri VFxx
+M: Stefan Agner
+S: Maintained
+F: board/toradex/colibri_vf/
+F: include/configs/colibri_vf.h
+F: configs/colibri_vf_defconfig
diff --git a/board/toradex/colibri_vf/Makefile
b/board/toradex/colibri_vf/Makefile
new file mode 100644
index 000..c7e5134
--- /dev/null
+++ b/board/toradex/colibri_vf/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright 2013 Freescale Semiconductor, Inc.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := colibri_vf.o
diff --git a/board/toradex/colibri_vf/colibri_vf.c
b/board/toradex/colibri_vf/colibri_vf.c
new file mode 100644
index 000..e7bc6c1
--- /dev/null
+++ b/board/toradex/colibri_vf/colibri_vf.c
@@ -0,0 +1,361 @@
+/*
+ * Copyright 2015 Toradex, Inc.
+ *
+ * Based on vf610twr.c:
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
+ PAD_CTL_DSE_25ohm | PAD_CTL_OBE_IBE_ENABLE)
+
+#define ESDHC_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_HIGH | \
+ PAD_CTL_DSE_20ohm | PAD_CTL_OBE_IBE_ENABLE)
+
+#define ENET_PAD_CTRL (PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_HIGH | \
+
