[U-Boot] [PATCH v4] socfpga: Adding Scan Manager driver
Scan Manager driver will be called to configure the IOCSR
scan chain. This configuration will setup the IO buffer settings
Signed-off-by: Chin Liang See cl...@altera.com
Cc: Dinh Nguyen dingu...@altera.com
Cc: Wolfgang Denk w...@denx.de
CC: Pavel Machek pa...@denx.de
Cc: Tom Rini tr...@ti.com
Cc: Albert Aribaud albert.u.b...@aribaud.net
---
Changes for v4
- avoid code duplication by add goto error
- include underscore to variables name
Changes for v3
- merge the handoff file and driver into single patch
Changes for v2
- rebase with latest v2014.01-rc1
---
arch/arm/cpu/armv7/socfpga/Makefile|2 +-
arch/arm/cpu/armv7/socfpga/scan_manager.c | 225 +++
arch/arm/cpu/armv7/socfpga/spl.c |4 +
arch/arm/include/asm/arch-socfpga/scan_manager.h | 97 +++
.../include/asm/arch-socfpga/socfpga_base_addrs.h |1 +
board/altera/socfpga/iocsr_config.c| 657
board/altera/socfpga/iocsr_config.h| 17 +
include/configs/socfpga_cyclone5.h |1 +
8 files changed, 1003 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/cpu/armv7/socfpga/scan_manager.c
create mode 100644 arch/arm/include/asm/arch-socfpga/scan_manager.h
create mode 100644 board/altera/socfpga/iocsr_config.c
create mode 100644 board/altera/socfpga/iocsr_config.h
diff --git a/arch/arm/cpu/armv7/socfpga/Makefile
b/arch/arm/cpu/armv7/socfpga/Makefile
index 3e84a0c..4edc5d4 100644
--- a/arch/arm/cpu/armv7/socfpga/Makefile
+++ b/arch/arm/cpu/armv7/socfpga/Makefile
@@ -9,4 +9,4 @@
obj-y := lowlevel_init.o
obj-y += misc.o timer.o reset_manager.o system_manager.o
-obj-$(CONFIG_SPL_BUILD) += spl.o freeze_controller.o
+obj-$(CONFIG_SPL_BUILD) += spl.o freeze_controller.o scan_manager.o
diff --git a/arch/arm/cpu/armv7/socfpga/scan_manager.c
b/arch/arm/cpu/armv7/socfpga/scan_manager.c
new file mode 100644
index 000..3ec6c7e
--- /dev/null
+++ b/arch/arm/cpu/armv7/socfpga/scan_manager.c
@@ -0,0 +1,225 @@
+/*
+ * Copyright (C) 2013 Altera Corporation www.altera.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+
+#include common.h
+#include asm/io.h
+#include asm/arch/freeze_controller.h
+#include asm/arch/scan_manager.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static const struct socfpga_scan_manager *scan_manager_base =
+ (void *)(SOCFPGA_SCANMGR_ADDRESS);
+static const struct socfpga_freeze_controller *freeze_controller_base =
+ (void *)(SOCFPGA_SYSMGR_ADDRESS + SYSMGR_FRZCTRL_ADDRESS);
+
+/*
+ * Function to check IO scan chain engine status and wait if the engine is
+ * is active. Poll the IO scan chain engine till maximum iteration reached.
+ */
+static inline uint32_t scan_mgr_io_scan_chain_engine_is_idle(uint32_t max_iter)
+{
+ uint32_t scanmgr_status;
+
+ scanmgr_status = readl(scan_manager_base-stat);
+
+ /* Poll the engine until the scan engine is inactive */
+ while (SCANMGR_STAT_ACTIVE_GET(scanmgr_status)
+ || (SCANMGR_STAT_WFIFOCNT_GET(scanmgr_status) 0)) {
+
+ max_iter--;
+
+ if (max_iter 0)
+ scanmgr_status = readl(scan_manager_base-stat);
+ else
+ return SCAN_MGR_IO_SCAN_ENGINE_STATUS_ACTIVE;
+ }
+ return SCAN_MGR_IO_SCAN_ENGINE_STATUS_IDLE;
+}
+
+
+
+/* Program HPS IO Scan Chain */
+uint32_t scan_mgr_io_scan_chain_prg(
+ uint32_t io_scan_chain_id,
+ uint32_t io_scan_chain_len_in_bits,
+ const uint32_t *iocsr_scan_chain)
+{
+
+ uint16_t tdi_tdo_header;
+ uint32_t io_program_iter;
+ uint32_t io_scan_chain_data_residual;
+ uint32_t residual;
+ uint32_t i;
+ uint32_t index = 0;
+
+ /* De-assert reinit if the IO scan chain is intended for HIO */
+ if (3 == io_scan_chain_id)
+ clrbits_le32(freeze_controller_base-hioctrl,
+ SYSMGR_FRZCTRL_HIOCTRL_DLLRST_MASK);
+
+ /*
+* Check if the scan chain engine is inactive and the
+* WFIFO is empty before enabling the IO scan chain
+*/
+ if (SCAN_MGR_IO_SCAN_ENGINE_STATUS_IDLE
+ != scan_mgr_io_scan_chain_engine_is_idle(
+ MAX_WAITING_DELAY_IO_SCAN_ENGINE)) {
+ return 1;
+ }
+
+ /*
+* Enable IO Scan chain based on scan chain id
+* Note: only one chain can be enabled at a time
+*/
+ setbits_le32(scan_manager_base-en, 1 io_scan_chain_id);
+
+ /*
+* Calculate number of iteration needed for full 128-bit (4 x32-bits)
+* bits shifting. Each TDI_TDO packet can shift in maximum 128-bits
+*/
+ io_program_iter = io_scan_chain_len_in_bits
+ IO_SCAN_CHAIN_128BIT_SHIFT;
+ io_scan_chain_data_residual = io_scan_chain_len_in_bits
+ IO_SCAN_CHAIN_128BIT_MASK;
+
+ /* Construct TDI_TDO packet for 128-bit IO scan chain (2 bytes) */
+
Re: [U-Boot] [PATCH v4] socfpga: Adding Scan Manager driver
Hi,
On 02/21/2014 04:26 PM, Chin Liang See wrote:
Scan Manager driver will be called to configure the IOCSR
scan chain. This configuration will setup the IO buffer settings
Signed-off-by: Chin Liang See cl...@altera.com
Cc: Dinh Nguyen dingu...@altera.com
Cc: Wolfgang Denk w...@denx.de
CC: Pavel Machek pa...@denx.de
Cc: Tom Rini tr...@ti.com
Cc: Albert Aribaud albert.u.b...@aribaud.net
---
Changes for v4
- avoid code duplication by add goto error
- include underscore to variables name
Changes for v3
- merge the handoff file and driver into single patch
Changes for v2
- rebase with latest v2014.01-rc1
---
arch/arm/cpu/armv7/socfpga/Makefile|2 +-
arch/arm/cpu/armv7/socfpga/scan_manager.c | 225 +++
arch/arm/cpu/armv7/socfpga/spl.c |4 +
arch/arm/include/asm/arch-socfpga/scan_manager.h | 97 +++
.../include/asm/arch-socfpga/socfpga_base_addrs.h |1 +
board/altera/socfpga/iocsr_config.c| 657
board/altera/socfpga/iocsr_config.h| 17 +
include/configs/socfpga_cyclone5.h |1 +
8 files changed, 1003 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/cpu/armv7/socfpga/scan_manager.c
create mode 100644 arch/arm/include/asm/arch-socfpga/scan_manager.h
create mode 100644 board/altera/socfpga/iocsr_config.c
create mode 100644 board/altera/socfpga/iocsr_config.h
diff --git a/arch/arm/cpu/armv7/socfpga/Makefile
b/arch/arm/cpu/armv7/socfpga/Makefile
index 3e84a0c..4edc5d4 100644
--- a/arch/arm/cpu/armv7/socfpga/Makefile
+++ b/arch/arm/cpu/armv7/socfpga/Makefile
@@ -9,4 +9,4 @@
obj-y:= lowlevel_init.o
obj-y+= misc.o timer.o reset_manager.o system_manager.o
-obj-$(CONFIG_SPL_BUILD) += spl.o freeze_controller.o
+obj-$(CONFIG_SPL_BUILD) += spl.o freeze_controller.o scan_manager.o
diff --git a/arch/arm/cpu/armv7/socfpga/scan_manager.c
b/arch/arm/cpu/armv7/socfpga/scan_manager.c
new file mode 100644
index 000..3ec6c7e
--- /dev/null
+++ b/arch/arm/cpu/armv7/socfpga/scan_manager.c
@@ -0,0 +1,225 @@
+/*
+ * Copyright (C) 2013 Altera Corporation www.altera.com
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+
probably we can use just empty line here.
+#include common.h
+#include asm/io.h
+#include asm/arch/freeze_controller.h
+#include asm/arch/scan_manager.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static const struct socfpga_scan_manager *scan_manager_base =
+ (void *)(SOCFPGA_SCANMGR_ADDRESS);
+static const struct socfpga_freeze_controller *freeze_controller_base =
+ (void *)(SOCFPGA_SYSMGR_ADDRESS + SYSMGR_FRZCTRL_ADDRESS);
+
+/*
+ * Function to check IO scan chain engine status and wait if the engine is
+ * is active. Poll the IO scan chain engine till maximum iteration reached.
+ */
+static inline uint32_t scan_mgr_io_scan_chain_engine_is_idle(uint32_t
max_iter)
+{
+ uint32_t scanmgr_status;
+
+ scanmgr_status = readl(scan_manager_base-stat);
+
+ /* Poll the engine until the scan engine is inactive */
+ while (SCANMGR_STAT_ACTIVE_GET(scanmgr_status)
+ || (SCANMGR_STAT_WFIFOCNT_GET(scanmgr_status) 0)) {
+
+ max_iter--;
+
+ if (max_iter 0)
+ scanmgr_status = readl(scan_manager_base-stat);
+ else
+ return SCAN_MGR_IO_SCAN_ENGINE_STATUS_ACTIVE;
+ }
+ return SCAN_MGR_IO_SCAN_ENGINE_STATUS_IDLE;
+}
+
+
+
ditto.
+/* Program HPS IO Scan Chain */
+uint32_t scan_mgr_io_scan_chain_prg(
+ uint32_t io_scan_chain_id,
+ uint32_t io_scan_chain_len_in_bits,
+ const uint32_t *iocsr_scan_chain)
+{
+
why blanks line here.
+ uint16_t tdi_tdo_header;
+ uint32_t io_program_iter;
+ uint32_t io_scan_chain_data_residual;
+ uint32_t residual;
+ uint32_t i;
+ uint32_t index = 0;
+
+ /* De-assert reinit if the IO scan chain is intended for HIO */
+ if (3 == io_scan_chain_id)
this 3 is magic
+ clrbits_le32(freeze_controller_base-hioctrl,
+ SYSMGR_FRZCTRL_HIOCTRL_DLLRST_MASK);
+
+ /*
+ * Check if the scan chain engine is inactive and the
+ * WFIFO is empty before enabling the IO scan chain
+ */
+ if (SCAN_MGR_IO_SCAN_ENGINE_STATUS_IDLE
+ != scan_mgr_io_scan_chain_engine_is_idle(
+ MAX_WAITING_DELAY_IO_SCAN_ENGINE)) {
+ return 1;
+ }
remove {}
+
+ /*
+ * Enable IO Scan chain based on scan chain id
+ * Note: only one chain can be enabled at a time
+ */
+ setbits_le32(scan_manager_base-en, 1 io_scan_chain_id);
+
+ /*
+ * Calculate number of iteration needed for full 128-bit (4 x32-bits)
+ * bits shifting. Each TDI_TDO packet can shift in maximum 128-bits
+ */
+ io_program_iter = io_scan_chain_len_in_bits
+
Re: [U-Boot] [PATCH v4] socfpga: Adding Scan Manager driver
Hi Michal,
On Fri, 2014-02-21 at 17:01 +0100, Michal Simek wrote:
Hi,
On 02/21/2014 04:26 PM, Chin Liang See wrote:
Scan Manager driver will be called to configure the IOCSR
scan chain. This configuration will setup the IO buffer settings
Signed-off-by: Chin Liang See cl...@altera.com
Cc: Dinh Nguyen dingu...@altera.com
Cc: Wolfgang Denk w...@denx.de
CC: Pavel Machek pa...@denx.de
Cc: Tom Rini tr...@ti.com
Cc: Albert Aribaud albert.u.b...@aribaud.net
---
Changes for v4
- avoid code duplication by add goto error
- include underscore to variables name
Changes for v3
- merge the handoff file and driver into single patch
Changes for v2
- rebase with latest v2014.01-rc1
---
arch/arm/cpu/armv7/socfpga/Makefile|2 +-
arch/arm/cpu/armv7/socfpga/scan_manager.c | 225 +++
arch/arm/cpu/armv7/socfpga/spl.c |4 +
arch/arm/include/asm/arch-socfpga/scan_manager.h | 97 +++
.../include/asm/arch-socfpga/socfpga_base_addrs.h |1 +
board/altera/socfpga/iocsr_config.c| 657
board/altera/socfpga/iocsr_config.h| 17 +
include/configs/socfpga_cyclone5.h |1 +
8 files changed, 1003 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/cpu/armv7/socfpga/scan_manager.c
create mode 100644 arch/arm/include/asm/arch-socfpga/scan_manager.h
create mode 100644 board/altera/socfpga/iocsr_config.c
create mode 100644 board/altera/socfpga/iocsr_config.h
diff --git a/arch/arm/cpu/armv7/socfpga/Makefile
b/arch/arm/cpu/armv7/socfpga/Makefile
index 3e84a0c..4edc5d4 100644
--- a/arch/arm/cpu/armv7/socfpga/Makefile
+++ b/arch/arm/cpu/armv7/socfpga/Makefile
@@ -9,4 +9,4 @@
obj-y := lowlevel_init.o
obj-y += misc.o timer.o reset_manager.o system_manager.o
-obj-$(CONFIG_SPL_BUILD) += spl.o freeze_controller.o
+obj-$(CONFIG_SPL_BUILD) += spl.o freeze_controller.o scan_manager.o
diff --git a/arch/arm/cpu/armv7/socfpga/scan_manager.c
b/arch/arm/cpu/armv7/socfpga/scan_manager.c
new file mode 100644
index 000..3ec6c7e
--- /dev/null
+++ b/arch/arm/cpu/armv7/socfpga/scan_manager.c
@@ -0,0 +1,225 @@
+/*
+ * Copyright (C) 2013 Altera Corporation www.altera.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+
probably we can use just empty line here.
Removed
+#include common.h
+#include asm/io.h
+#include asm/arch/freeze_controller.h
+#include asm/arch/scan_manager.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static const struct socfpga_scan_manager *scan_manager_base =
+ (void *)(SOCFPGA_SCANMGR_ADDRESS);
+static const struct socfpga_freeze_controller *freeze_controller_base =
+ (void *)(SOCFPGA_SYSMGR_ADDRESS + SYSMGR_FRZCTRL_ADDRESS);
+
+/*
+ * Function to check IO scan chain engine status and wait if the engine is
+ * is active. Poll the IO scan chain engine till maximum iteration reached.
+ */
+static inline uint32_t scan_mgr_io_scan_chain_engine_is_idle(uint32_t
max_iter)
+{
+ uint32_t scanmgr_status;
+
+ scanmgr_status = readl(scan_manager_base-stat);
+
+ /* Poll the engine until the scan engine is inactive */
+ while (SCANMGR_STAT_ACTIVE_GET(scanmgr_status)
+ || (SCANMGR_STAT_WFIFOCNT_GET(scanmgr_status) 0)) {
+
+ max_iter--;
+
+ if (max_iter 0)
+ scanmgr_status = readl(scan_manager_base-stat);
+ else
+ return SCAN_MGR_IO_SCAN_ENGINE_STATUS_ACTIVE;
+ }
+ return SCAN_MGR_IO_SCAN_ENGINE_STATUS_IDLE;
+}
+
+
+
ditto.
Removed
+/* Program HPS IO Scan Chain */
+uint32_t scan_mgr_io_scan_chain_prg(
+ uint32_t io_scan_chain_id,
+ uint32_t io_scan_chain_len_in_bits,
+ const uint32_t *iocsr_scan_chain)
+{
+
why blanks line here.
Removed
+ uint16_t tdi_tdo_header;
+ uint32_t io_program_iter;
+ uint32_t io_scan_chain_data_residual;
+ uint32_t residual;
+ uint32_t i;
+ uint32_t index = 0;
+
+ /* De-assert reinit if the IO scan chain is intended for HIO */
+ if (3 == io_scan_chain_id)
this 3 is magic
Actually its hardware related. Anyhow its good to have explanation and I
already added.
+ clrbits_le32(freeze_controller_base-hioctrl,
+ SYSMGR_FRZCTRL_HIOCTRL_DLLRST_MASK);
+
+ /*
+* Check if the scan chain engine is inactive and the
+* WFIFO is empty before enabling the IO scan chain
+*/
+ if (SCAN_MGR_IO_SCAN_ENGINE_STATUS_IDLE
+ != scan_mgr_io_scan_chain_engine_is_idle(
+ MAX_WAITING_DELAY_IO_SCAN_ENGINE)) {
+ return 1;
+ }
remove {}
Removed
+
+ /*
+* Enable IO Scan chain based on scan chain id
+* Note: only one chain can be enabled at a time
+*/
+ setbits_le32(scan_manager_base-en, 1
