Re: [U-Boot] [PATCH v4 10/12] odroid: add board file for Odroid X2/U3 based on Samsung Exynos4412

2014-07-04 Thread Jaehoon Chung
On 07/02/2014 08:50 PM, Przemyslaw Marczak wrote:
 This board file supports standard features of Odroid X2 and U3 boards:
 - Exynos4412 core clock set to 1000MHz and MPLL peripherial clock set to 
 800MHz,
 - MAX77686 power regulator,
 - USB PHY,
 - enable XCL205 - power for board peripherials
 - check board type: U3 or X2.
 - enable Odroid U3 FAN cooler
 
 Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
 Cc: Minkyu Kang mk7.k...@samsung.com
 Cc: Tom Rini tr...@ti.com
 
 ---
 Changes v2:
 - enable fan on odroid U3
 
 Changes v3:
 - odroid.c: clean up board name related code
 - odroid.c: remove static from set_board_type()
 - odroid.c: add implementation of functions: get_dfu_alt_*
 - odroid.c: include misc.h
 
 Changes v4:
 odroid.c: dfu_get_alt_boot: add call get_boot_mode()
 ---
  board/samsung/odroid/Makefile |   8 +
  board/samsung/odroid/odroid.c | 466 
 ++
  board/samsung/odroid/setup.h  | 227 
  3 files changed, 701 insertions(+)
  create mode 100644 board/samsung/odroid/Makefile
  create mode 100644 board/samsung/odroid/odroid.c
  create mode 100644 board/samsung/odroid/setup.h
 
 diff --git a/board/samsung/odroid/Makefile b/board/samsung/odroid/Makefile
 new file mode 100644
 index 000..b98aaeb
 --- /dev/null
 +++ b/board/samsung/odroid/Makefile
 @@ -0,0 +1,8 @@
 +#
 +# Copyright (c) 2014 Samsung Electronics Co., Ltd. All rights reserved.
 +# Przemyslaw Marczak p.marc...@samsung.com
 +#
 +# SPDX-License-Identifier:   GPL-2.0+
 +#
 +
 +obj-y:= odroid.o
 diff --git a/board/samsung/odroid/odroid.c b/board/samsung/odroid/odroid.c
 new file mode 100644
 index 000..28706af
 --- /dev/null
 +++ b/board/samsung/odroid/odroid.c
 @@ -0,0 +1,466 @@
 +/*
 + * Copyright (C) 2014 Samsung Electronics
 + * Przemyslaw Marczak p.marc...@samsung.com
 + *
 + * SPDX-License-Identifier:  GPL-2.0+
 + */
 +
 +#include common.h
 +#include asm/arch/pinmux.h
 +#include asm/arch/power.h
 +#include asm/arch/clock.h
 +#include asm/arch/gpio.h
 +#include asm/gpio.h
 +#include asm/arch/cpu.h
 +#include power/pmic.h
 +#include power/max77686_pmic.h
 +#include errno.h
 +#include usb.h
 +#include usb/s3c_udc.h
 +#include samsung/misc.h
 +#include setup.h
 +
 +DECLARE_GLOBAL_DATA_PTR;
 +
 +#ifdef CONFIG_BOARD_TYPES
 +/* Odroid board types */
 +enum {
 + ODROID_TYPE_U3,
 + ODROID_TYPE_X2,
 +};
 +
 +void set_board_type(void)
 +{
 + int val;
 +
 + /* Check GPC1 pin 2 */
 + gpio_set_pull(EXYNOS4X12_GPIO_C12, S5P_GPIO_PULL_NONE);
 + gpio_set_drv(EXYNOS4X12_GPIO_C12, S5P_GPIO_DRV_4X);
 + gpio_direction_input(EXYNOS4X12_GPIO_C12);
 +
 + /* XCL205 - needs some latch time */
 + mdelay(10);
 +
 + /* Check GPC1 pin2 - LED supplied by XCL205 - X2 only */
 + val = gpio_get_value(EXYNOS4X12_GPIO_C12);
 + if (val)
val is unnecessary. int val can be removed.
if (gpio_get_value(EXYNS4x12_GPIO_C12))


 + gd-board_type = ODROID_TYPE_X2;
 + else
 + gd-board_type = ODROID_TYPE_U3;
 +}
 +
 +const char *get_board_name(void)
 +{
 + const char *board_name = odroid;
Is there other approach or general method for getting board name?

 +
 + return board_name;
 +}
 +
 +const char *get_board_type(void)
 +{
 + const char *board_type[] = {u3, x2};
 +
 + return board_type[gd-board_type];
 +}
 +#endif
 +
 +#ifdef CONFIG_SET_DFU_ALT_INFO
 +char *get_dfu_alt_system(void)
 +{
 + return getenv(dfu_alt_system);
 +}
 +
 +char *get_dfu_alt_boot(void)
 +{
 + char *alt_boot = NULL;
 +
 + switch (get_boot_mode()) {
 + case BOOT_MODE_MMC:
 + alt_boot = CONFIG_DFU_ALT_BOOT_SD;
 + break;
 + default:
 + alt_boot = CONFIG_DFU_ALT_BOOT_EMMC;
 + break;
 + }
 +
 + if (!alt_boot)
 + return NULL;

Is it need? alt_boot is set to CONFIG_DFU_ALT_BOOT_EMMC by default, isn't?
CONFIG_DFU_ALT_BOOT_EMMC is 0?

 +
 + setenv(dfu_alt_boot, alt_boot);
 +
 + return alt_boot;
 +}
 +#endif
 +
 +static void board_clock_init(void)
 +{
 + unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc;
 + struct exynos4x12_clock *clk = (struct exynos4x12_clock *)
 + samsung_get_base_clock();
 +
 + /*
 +  * CMU_CPU clocks src to MPLL
 +  * Bit values: 0  ; 1
 +  * MUX_APLL_SEL:FIN_PLL   ; FOUT_APLL
 +  * MUX_CORE_SEL:MOUT_APLL ; SCLK_MPLL
 +  * MUX_HPM_SEL: MOUT_APLL ; SCLK_MPLL_USER_C
 +  * MUX_MPLL_USER_SEL_C: FIN_PLL   ; SCLK_MPLL
 + */
 + clr_src_cpu = MUX_APLL_SEL(0x1) | MUX_CORE_SEL(0x1) |
 +   MUX_HPM_SEL(0x1) | MUX_MPLL_USER_SEL_C(0x1);
 + set = MUX_APLL_SEL(0) | MUX_CORE_SEL(1) | MUX_HPM_SEL(1) |
 +   MUX_MPLL_USER_SEL_C(1);
0x1 or 1? you can use it consistency. MUX_APLL_SEL(1) or MUX_APLL_SEL(0x1).

 +
 + clrsetbits_le32(clk-src_cpu, clr_src_cpu, 

Re: [U-Boot] [PATCH v4 10/12] odroid: add board file for Odroid X2/U3 based on Samsung Exynos4412

2014-07-04 Thread Przemyslaw Marczak

On 07/04/2014 08:07 AM, Jaehoon Chung wrote:

On 07/02/2014 08:50 PM, Przemyslaw Marczak wrote:

This board file supports standard features of Odroid X2 and U3 boards:
- Exynos4412 core clock set to 1000MHz and MPLL peripherial clock set to 800MHz,
- MAX77686 power regulator,
- USB PHY,
- enable XCL205 - power for board peripherials
- check board type: U3 or X2.
- enable Odroid U3 FAN cooler

Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Tom Rini tr...@ti.com

---
Changes v2:
- enable fan on odroid U3

Changes v3:
- odroid.c: clean up board name related code
- odroid.c: remove static from set_board_type()
- odroid.c: add implementation of functions: get_dfu_alt_*
- odroid.c: include misc.h

Changes v4:
odroid.c: dfu_get_alt_boot: add call get_boot_mode()
---
  board/samsung/odroid/Makefile |   8 +
  board/samsung/odroid/odroid.c | 466 ++
  board/samsung/odroid/setup.h  | 227 
  3 files changed, 701 insertions(+)
  create mode 100644 board/samsung/odroid/Makefile
  create mode 100644 board/samsung/odroid/odroid.c
  create mode 100644 board/samsung/odroid/setup.h

diff --git a/board/samsung/odroid/Makefile b/board/samsung/odroid/Makefile
new file mode 100644
index 000..b98aaeb
--- /dev/null
+++ b/board/samsung/odroid/Makefile
@@ -0,0 +1,8 @@
+#
+# Copyright (c) 2014 Samsung Electronics Co., Ltd. All rights reserved.
+# Przemyslaw Marczak p.marc...@samsung.com
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y  := odroid.o
diff --git a/board/samsung/odroid/odroid.c b/board/samsung/odroid/odroid.c
new file mode 100644
index 000..28706af
--- /dev/null
+++ b/board/samsung/odroid/odroid.c
@@ -0,0 +1,466 @@
+/*
+ * Copyright (C) 2014 Samsung Electronics
+ * Przemyslaw Marczak p.marc...@samsung.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/arch/pinmux.h
+#include asm/arch/power.h
+#include asm/arch/clock.h
+#include asm/arch/gpio.h
+#include asm/gpio.h
+#include asm/arch/cpu.h
+#include power/pmic.h
+#include power/max77686_pmic.h
+#include errno.h
+#include usb.h
+#include usb/s3c_udc.h
+#include samsung/misc.h
+#include setup.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_BOARD_TYPES
+/* Odroid board types */
+enum {
+   ODROID_TYPE_U3,
+   ODROID_TYPE_X2,
+};
+
+void set_board_type(void)
+{
+   int val;
+
+   /* Check GPC1 pin 2 */
+   gpio_set_pull(EXYNOS4X12_GPIO_C12, S5P_GPIO_PULL_NONE);
+   gpio_set_drv(EXYNOS4X12_GPIO_C12, S5P_GPIO_DRV_4X);
+   gpio_direction_input(EXYNOS4X12_GPIO_C12);
+
+   /* XCL205 - needs some latch time */
+   mdelay(10);
+
+   /* Check GPC1 pin2 - LED supplied by XCL205 - X2 only */
+   val = gpio_get_value(EXYNOS4X12_GPIO_C12);
+   if (val)

val is unnecessary. int val can be removed.
if (gpio_get_value(EXYNS4x12_GPIO_C12))



ok

+   gd-board_type = ODROID_TYPE_X2;
+   else
+   gd-board_type = ODROID_TYPE_U3;
+}
+
+const char *get_board_name(void)
+{
+   const char *board_name = odroid;

Is there other approach or general method for getting board name?

Actually, the board name is the same as CONFIG_SYS_BOARD, but we are 
going to have only one binary for Exynos 4 boards in the future - so 
such function is welcome. We can also put this into the dts file.



+
+   return board_name;
+}
+
+const char *get_board_type(void)
+{
+   const char *board_type[] = {u3, x2};
+
+   return board_type[gd-board_type];
+}
+#endif
+
+#ifdef CONFIG_SET_DFU_ALT_INFO
+char *get_dfu_alt_system(void)
+{
+   return getenv(dfu_alt_system);
+}
+
+char *get_dfu_alt_boot(void)
+{
+   char *alt_boot = NULL;
+
+   switch (get_boot_mode()) {
+   case BOOT_MODE_MMC:
+   alt_boot = CONFIG_DFU_ALT_BOOT_SD;
+   break;
+   default:
+   alt_boot = CONFIG_DFU_ALT_BOOT_EMMC;
+   break;
+   }
+
+   if (!alt_boot)
+   return NULL;


Is it need? alt_boot is set to CONFIG_DFU_ALT_BOOT_EMMC by default, isn't?
CONFIG_DFU_ALT_BOOT_EMMC is 0?


Oops, right. I must fix that.

+
+   setenv(dfu_alt_boot, alt_boot);
+
+   return alt_boot;
+}
+#endif
+
+static void board_clock_init(void)
+{
+   unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc;
+   struct exynos4x12_clock *clk = (struct exynos4x12_clock *)
+   samsung_get_base_clock();
+
+   /*
+* CMU_CPU clocks src to MPLL
+* Bit values: 0  ; 1
+* MUX_APLL_SEL:FIN_PLL   ; FOUT_APLL
+* MUX_CORE_SEL:MOUT_APLL ; SCLK_MPLL
+* MUX_HPM_SEL: MOUT_APLL ; SCLK_MPLL_USER_C
+* MUX_MPLL_USER_SEL_C: FIN_PLL   ; SCLK_MPLL
+   */
+   clr_src_cpu = MUX_APLL_SEL(0x1) | MUX_CORE_SEL(0x1) |
+ MUX_HPM_SEL(0x1) | MUX_MPLL_USER_SEL_C(0x1);
+

Re: [U-Boot] [PATCH v4 10/12] odroid: add board file for Odroid X2/U3 based on Samsung Exynos4412

2014-07-04 Thread Jaehoon Chung
On 07/04/2014 05:08 PM, Przemyslaw Marczak wrote:
 On 07/04/2014 08:07 AM, Jaehoon Chung wrote:
 On 07/02/2014 08:50 PM, Przemyslaw Marczak wrote:
 This board file supports standard features of Odroid X2 and U3 boards:
 - Exynos4412 core clock set to 1000MHz and MPLL peripherial clock set to 
 800MHz,
 - MAX77686 power regulator,
 - USB PHY,
 - enable XCL205 - power for board peripherials
 - check board type: U3 or X2.
 - enable Odroid U3 FAN cooler

 Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
 Cc: Minkyu Kang mk7.k...@samsung.com
 Cc: Tom Rini tr...@ti.com

 ---
 Changes v2:
 - enable fan on odroid U3

 Changes v3:
 - odroid.c: clean up board name related code
 - odroid.c: remove static from set_board_type()
 - odroid.c: add implementation of functions: get_dfu_alt_*
 - odroid.c: include misc.h

 Changes v4:
 odroid.c: dfu_get_alt_boot: add call get_boot_mode()
 ---
   board/samsung/odroid/Makefile |   8 +
   board/samsung/odroid/odroid.c | 466 
 ++
   board/samsung/odroid/setup.h  | 227 
   3 files changed, 701 insertions(+)
   create mode 100644 board/samsung/odroid/Makefile
   create mode 100644 board/samsung/odroid/odroid.c
   create mode 100644 board/samsung/odroid/setup.h

 diff --git a/board/samsung/odroid/Makefile b/board/samsung/odroid/Makefile
 new file mode 100644
 index 000..b98aaeb
 --- /dev/null
 +++ b/board/samsung/odroid/Makefile
 @@ -0,0 +1,8 @@
 +#
 +# Copyright (c) 2014 Samsung Electronics Co., Ltd. All rights reserved.
 +# Przemyslaw Marczak p.marc...@samsung.com
 +#
 +# SPDX-License-Identifier:GPL-2.0+
 +#
 +
 +obj-y:= odroid.o
 diff --git a/board/samsung/odroid/odroid.c b/board/samsung/odroid/odroid.c
 new file mode 100644
 index 000..28706af
 --- /dev/null
 +++ b/board/samsung/odroid/odroid.c
 @@ -0,0 +1,466 @@
 +/*
 + * Copyright (C) 2014 Samsung Electronics
 + * Przemyslaw Marczak p.marc...@samsung.com
 + *
 + * SPDX-License-Identifier:GPL-2.0+
 + */
 +
 +#include common.h
 +#include asm/arch/pinmux.h
 +#include asm/arch/power.h
 +#include asm/arch/clock.h
 +#include asm/arch/gpio.h
 +#include asm/gpio.h
 +#include asm/arch/cpu.h
 +#include power/pmic.h
 +#include power/max77686_pmic.h
 +#include errno.h
 +#include usb.h
 +#include usb/s3c_udc.h
 +#include samsung/misc.h
 +#include setup.h
 +
 +DECLARE_GLOBAL_DATA_PTR;
 +
 +#ifdef CONFIG_BOARD_TYPES
 +/* Odroid board types */
 +enum {
 +ODROID_TYPE_U3,
 +ODROID_TYPE_X2,
 +};
 +
 +void set_board_type(void)
 +{
 +int val;
 +
 +/* Check GPC1 pin 2 */
 +gpio_set_pull(EXYNOS4X12_GPIO_C12, S5P_GPIO_PULL_NONE);
 +gpio_set_drv(EXYNOS4X12_GPIO_C12, S5P_GPIO_DRV_4X);
 +gpio_direction_input(EXYNOS4X12_GPIO_C12);
 +
 +/* XCL205 - needs some latch time */
 +mdelay(10);
 +
 +/* Check GPC1 pin2 - LED supplied by XCL205 - X2 only */
 +val = gpio_get_value(EXYNOS4X12_GPIO_C12);
 +if (val)
 val is unnecessary. int val can be removed.
 if (gpio_get_value(EXYNS4x12_GPIO_C12))
 

 ok
 +gd-board_type = ODROID_TYPE_X2;
 +else
 +gd-board_type = ODROID_TYPE_U3;
 +}
 +
 +const char *get_board_name(void)
 +{
 +const char *board_name = odroid;
 Is there other approach or general method for getting board name?

 Actually, the board name is the same as CONFIG_SYS_BOARD, but we are going to 
 have only one binary for Exynos 4 boards in the future - so such function is 
 welcome. We can also put this into the dts file.

In future...Then using dt-file would be better than this.  :)

Best Regards,
Jaehoon Chung

 
 +
 +return board_name;
 +}
 +
 +const char *get_board_type(void)
 +{
 +const char *board_type[] = {u3, x2};
 +
 +return board_type[gd-board_type];
 +}
 +#endif
 +
 +#ifdef CONFIG_SET_DFU_ALT_INFO
 +char *get_dfu_alt_system(void)
 +{
 +return getenv(dfu_alt_system);
 +}
 +
 +char *get_dfu_alt_boot(void)
 +{
 +char *alt_boot = NULL;
 +
 +switch (get_boot_mode()) {
 +case BOOT_MODE_MMC:
 +alt_boot = CONFIG_DFU_ALT_BOOT_SD;
 +break;
 +default:
 +alt_boot = CONFIG_DFU_ALT_BOOT_EMMC;
 +break;
 +}
 +
 +if (!alt_boot)
 +return NULL;

 Is it need? alt_boot is set to CONFIG_DFU_ALT_BOOT_EMMC by default, isn't?
 CONFIG_DFU_ALT_BOOT_EMMC is 0?

 Oops, right. I must fix that.
 +
 +setenv(dfu_alt_boot, alt_boot);
 +
 +return alt_boot;
 +}
 +#endif
 +
 +static void board_clock_init(void)
 +{
 +unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc;
 +struct exynos4x12_clock *clk = (struct exynos4x12_clock *)
 +samsung_get_base_clock();
 +
 +/*
 + * CMU_CPU clocks src to MPLL
 + * Bit values: 0  ; 1
 + * MUX_APLL_SEL:FIN_PLL   ; FOUT_APLL
 + * MUX_CORE_SEL:MOUT_APLL ; SCLK_MPLL
 + * MUX_HPM_SEL: MOUT_APLL ; SCLK_MPLL_USER_C
 + * MUX_MPLL_USER_SEL_C: FIN_PLL   ; SCLK_MPLL
 +*/
 +clr_src_cpu = 

[U-Boot] [PATCH v4 10/12] odroid: add board file for Odroid X2/U3 based on Samsung Exynos4412

2014-07-02 Thread Przemyslaw Marczak
This board file supports standard features of Odroid X2 and U3 boards:
- Exynos4412 core clock set to 1000MHz and MPLL peripherial clock set to 800MHz,
- MAX77686 power regulator,
- USB PHY,
- enable XCL205 - power for board peripherials
- check board type: U3 or X2.
- enable Odroid U3 FAN cooler

Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Tom Rini tr...@ti.com

---
Changes v2:
- enable fan on odroid U3

Changes v3:
- odroid.c: clean up board name related code
- odroid.c: remove static from set_board_type()
- odroid.c: add implementation of functions: get_dfu_alt_*
- odroid.c: include misc.h

Changes v4:
odroid.c: dfu_get_alt_boot: add call get_boot_mode()
---
 board/samsung/odroid/Makefile |   8 +
 board/samsung/odroid/odroid.c | 466 ++
 board/samsung/odroid/setup.h  | 227 
 3 files changed, 701 insertions(+)
 create mode 100644 board/samsung/odroid/Makefile
 create mode 100644 board/samsung/odroid/odroid.c
 create mode 100644 board/samsung/odroid/setup.h

diff --git a/board/samsung/odroid/Makefile b/board/samsung/odroid/Makefile
new file mode 100644
index 000..b98aaeb
--- /dev/null
+++ b/board/samsung/odroid/Makefile
@@ -0,0 +1,8 @@
+#
+# Copyright (c) 2014 Samsung Electronics Co., Ltd. All rights reserved.
+# Przemyslaw Marczak p.marc...@samsung.com
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y  := odroid.o
diff --git a/board/samsung/odroid/odroid.c b/board/samsung/odroid/odroid.c
new file mode 100644
index 000..28706af
--- /dev/null
+++ b/board/samsung/odroid/odroid.c
@@ -0,0 +1,466 @@
+/*
+ * Copyright (C) 2014 Samsung Electronics
+ * Przemyslaw Marczak p.marc...@samsung.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/arch/pinmux.h
+#include asm/arch/power.h
+#include asm/arch/clock.h
+#include asm/arch/gpio.h
+#include asm/gpio.h
+#include asm/arch/cpu.h
+#include power/pmic.h
+#include power/max77686_pmic.h
+#include errno.h
+#include usb.h
+#include usb/s3c_udc.h
+#include samsung/misc.h
+#include setup.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_BOARD_TYPES
+/* Odroid board types */
+enum {
+   ODROID_TYPE_U3,
+   ODROID_TYPE_X2,
+};
+
+void set_board_type(void)
+{
+   int val;
+
+   /* Check GPC1 pin 2 */
+   gpio_set_pull(EXYNOS4X12_GPIO_C12, S5P_GPIO_PULL_NONE);
+   gpio_set_drv(EXYNOS4X12_GPIO_C12, S5P_GPIO_DRV_4X);
+   gpio_direction_input(EXYNOS4X12_GPIO_C12);
+
+   /* XCL205 - needs some latch time */
+   mdelay(10);
+
+   /* Check GPC1 pin2 - LED supplied by XCL205 - X2 only */
+   val = gpio_get_value(EXYNOS4X12_GPIO_C12);
+   if (val)
+   gd-board_type = ODROID_TYPE_X2;
+   else
+   gd-board_type = ODROID_TYPE_U3;
+}
+
+const char *get_board_name(void)
+{
+   const char *board_name = odroid;
+
+   return board_name;
+}
+
+const char *get_board_type(void)
+{
+   const char *board_type[] = {u3, x2};
+
+   return board_type[gd-board_type];
+}
+#endif
+
+#ifdef CONFIG_SET_DFU_ALT_INFO
+char *get_dfu_alt_system(void)
+{
+   return getenv(dfu_alt_system);
+}
+
+char *get_dfu_alt_boot(void)
+{
+   char *alt_boot = NULL;
+
+   switch (get_boot_mode()) {
+   case BOOT_MODE_MMC:
+   alt_boot = CONFIG_DFU_ALT_BOOT_SD;
+   break;
+   default:
+   alt_boot = CONFIG_DFU_ALT_BOOT_EMMC;
+   break;
+   }
+
+   if (!alt_boot)
+   return NULL;
+
+   setenv(dfu_alt_boot, alt_boot);
+
+   return alt_boot;
+}
+#endif
+
+static void board_clock_init(void)
+{
+   unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc;
+   struct exynos4x12_clock *clk = (struct exynos4x12_clock *)
+   samsung_get_base_clock();
+
+   /*
+* CMU_CPU clocks src to MPLL
+* Bit values: 0  ; 1
+* MUX_APLL_SEL:FIN_PLL   ; FOUT_APLL
+* MUX_CORE_SEL:MOUT_APLL ; SCLK_MPLL
+* MUX_HPM_SEL: MOUT_APLL ; SCLK_MPLL_USER_C
+* MUX_MPLL_USER_SEL_C: FIN_PLL   ; SCLK_MPLL
+   */
+   clr_src_cpu = MUX_APLL_SEL(0x1) | MUX_CORE_SEL(0x1) |
+ MUX_HPM_SEL(0x1) | MUX_MPLL_USER_SEL_C(0x1);
+   set = MUX_APLL_SEL(0) | MUX_CORE_SEL(1) | MUX_HPM_SEL(1) |
+ MUX_MPLL_USER_SEL_C(1);
+
+   clrsetbits_le32(clk-src_cpu, clr_src_cpu, set);
+
+   /* Wait for mux change */
+   while (readl(clk-mux_stat_cpu)  MUX_STAT_CPU_CHANGING)
+   continue;
+
+   /* Set APLL to 1000MHz */
+   clr_pll_con0 = SDIV(0x7) | PDIV(0x3f) | MDIV(0x3ff) | FSEL(0x1);
+   set = SDIV(0) | PDIV(3) | MDIV(125) | FSEL(1);
+
+   clrsetbits_le32(clk-apll_con0, clr_pll_con0, set);
+
+   /* Wait for PLL to be locked */
+   while (!(readl(clk-apll_con0)  PLL_LOCKED_BIT))
+   continue;
+
+