Re: [U-Boot] [PATCH v4 24/28] armv8/ls2085aqds: NAND boot support

2015-03-22 Thread Tom Rini
On Fri, Mar 20, 2015 at 07:28:16PM -0500, Scott Wood wrote:
 On Fri, 2015-03-20 at 20:18 -0400, Tom Rini wrote:
  On Fri, Mar 20, 2015 at 04:44:19PM -0500, Scott Wood wrote:
   On Fri, 2015-03-20 at 17:37 -0400, Tom Rini wrote:
On Fri, Mar 20, 2015 at 04:15:40PM -0500, Scott Wood wrote:

[snip]
 It would also be nice to sort out loading the environment during SPL.

*ears perk up*.  Please elaborate :)  We have SPL environment support,
we have SPL NAND Environment support today.  It doesn't get passed along
to the running U-Boot and it's used for some limited cases (network and
redundancy).  I'd like to hear about more and better ways of using it.
   
   In common/spl/spl_nand.c, why does it only load the environment when
   CONFIG_NAND_ENV_DST is defined, yet it never uses the value of
   CONFIG_NAND_ENV_DST?  I also don't see any boards definind
   CONFIG_NAND_ENV_DST (apparently the only one that ever used it was
   smdk6400 which has been removed).
   
   Is there some other way that the environment is supposed to be getting
   loaded from NAND (rather than using the default environment) during SPL?
  
  Yeah, it's loaded via env_init() being called (see spl_net.c or
  board/ti/).
 
 The NAND version of env_init() does not access NAND.  It loads from
 CONFIG_NAND_ENV_DST (but again, no board sets that) or from an embedded
 environment.

OK, you're right.  I had only used it really on the network side for
NAND in ENV and for that default is what we wanted anyhow so I
didn't notice.

-- 
Tom


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Re: [U-Boot] [PATCH v4 24/28] armv8/ls2085aqds: NAND boot support

2015-03-21 Thread Scott Wood
On Fri, 2015-03-20 at 14:44 -0700, York Sun wrote:
 
 On 03/20/2015 02:33 PM, Scott Wood wrote:
  On Fri, 2015-03-20 at 14:23 -0700, York Sun wrote:
 
  On 03/20/2015 02:15 PM, Scott Wood wrote:
  On Fri, 2015-03-20 at 12:21 -0700, York Sun wrote:
  From: Scott Wood scottw...@freescale.com
 
  This adds NAND boot support for LS2085AQDS, using SPL framework.
 
  To form a NAND image, append u-boot-with-spl.bin after a proper
  nand boot RCW and flash to the beginning of NAND.
 
  Do we want to do it this way, or should we keep the RCW in a separate
  block?
 
  I would like to see RCW in a separated block.
  
  OK.  In that case the offsets in this patch will need to change.
  
  What constitutes a proper nand boot RCW (those were not my words)?
  There are details in this patch regarding offsets that need to match
  details in the PBI (which is more than just RCW).
 
  It is not your original words. Yours was To form a NAND image, append
  u-boot-with-spl.bin after PBL_0x3_0x07_1333_nand.bin and flash to the 
  beginning
  of NAND.. I try to make the message generic. A proper nand boot RCW means 
  the
  RCW should contains PBI commands to set bootloc and block copy the image. 
  Since
  RCW is not in the scope of u-boot, I cannot refer to any specific file.
  
  Yes, I know you can't refer to the file, but it needs to be made clear
  what the expectations of that PBI file are.
 
 I think a proper solution would be to put detail instruction into board README
 file by adding
 
 To form the NAND image, append u-boot-with-spl.bin after RCW image. The RCW
 image should have these PBI commands
 
 CCSR 4-byte write to 0x00e00404, data=0x
 CCSR 4-byte write to 0x00e00400, data=0x1800a000
 Block Copy: SRC=0x0104, SRC_ADDR=0x00c0, DEST_ADDR=0x1800a000,
 BLOCK_SIZE=0x00014000
 
 We need to revise the SRS_ADDR if moving u-boot to a separated block. Please
 advise what address is appropriate.

It should be equal to the NAND block size (not to be confused with PBI
block copy size).

 Please also advise the BLOCK_SIZE. Does it need to be fixed, or min(0x14000,
 sizeof(u-boot-spl.bin))?

It should be fixed because we don't want it to have to be updated every
time the SPL build changes.

-Scott


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Re: [U-Boot] [PATCH v4 24/28] armv8/ls2085aqds: NAND boot support

2015-03-20 Thread Scott Wood
On Fri, 2015-03-20 at 20:18 -0400, Tom Rini wrote:
 On Fri, Mar 20, 2015 at 04:44:19PM -0500, Scott Wood wrote:
  On Fri, 2015-03-20 at 17:37 -0400, Tom Rini wrote:
   On Fri, Mar 20, 2015 at 04:15:40PM -0500, Scott Wood wrote:
   
   [snip]
It would also be nice to sort out loading the environment during SPL.
   
   *ears perk up*.  Please elaborate :)  We have SPL environment support,
   we have SPL NAND Environment support today.  It doesn't get passed along
   to the running U-Boot and it's used for some limited cases (network and
   redundancy).  I'd like to hear about more and better ways of using it.
  
  In common/spl/spl_nand.c, why does it only load the environment when
  CONFIG_NAND_ENV_DST is defined, yet it never uses the value of
  CONFIG_NAND_ENV_DST?  I also don't see any boards definind
  CONFIG_NAND_ENV_DST (apparently the only one that ever used it was
  smdk6400 which has been removed).
  
  Is there some other way that the environment is supposed to be getting
  loaded from NAND (rather than using the default environment) during SPL?
 
 Yeah, it's loaded via env_init() being called (see spl_net.c or
 board/ti/).

The NAND version of env_init() does not access NAND.  It loads from
CONFIG_NAND_ENV_DST (but again, no board sets that) or from an embedded
environment.

-Scott


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Re: [U-Boot] [PATCH v4 24/28] armv8/ls2085aqds: NAND boot support

2015-03-20 Thread Tom Rini
On Fri, Mar 20, 2015 at 04:44:19PM -0500, Scott Wood wrote:
 On Fri, 2015-03-20 at 17:37 -0400, Tom Rini wrote:
  On Fri, Mar 20, 2015 at 04:15:40PM -0500, Scott Wood wrote:
  
  [snip]
   It would also be nice to sort out loading the environment during SPL.
  
  *ears perk up*.  Please elaborate :)  We have SPL environment support,
  we have SPL NAND Environment support today.  It doesn't get passed along
  to the running U-Boot and it's used for some limited cases (network and
  redundancy).  I'd like to hear about more and better ways of using it.
 
 In common/spl/spl_nand.c, why does it only load the environment when
 CONFIG_NAND_ENV_DST is defined, yet it never uses the value of
 CONFIG_NAND_ENV_DST?  I also don't see any boards definind
 CONFIG_NAND_ENV_DST (apparently the only one that ever used it was
 smdk6400 which has been removed).
 
 Is there some other way that the environment is supposed to be getting
 loaded from NAND (rather than using the default environment) during SPL?

Yeah, it's loaded via env_init() being called (see spl_net.c or
board/ti/).

-- 
Tom


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Re: [U-Boot] [PATCH v4 24/28] armv8/ls2085aqds: NAND boot support

2015-03-20 Thread Scott Wood
On Fri, 2015-03-20 at 12:21 -0700, York Sun wrote:
 From: Scott Wood scottw...@freescale.com
 
 This adds NAND boot support for LS2085AQDS, using SPL framework.
 
 To form a NAND image, append u-boot-with-spl.bin after a proper
 nand boot RCW and flash to the beginning of NAND.

Do we want to do it this way, or should we keep the RCW in a separate
block?

What constitutes a proper nand boot RCW (those were not my words)?
There are details in this patch regarding offsets that need to match
details in the PBI (which is more than just RCW).

It would also be nice to sort out loading the environment during SPL.

-Scott


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[U-Boot] [PATCH v4 24/28] armv8/ls2085aqds: NAND boot support

2015-03-20 Thread York Sun
From: Scott Wood scottw...@freescale.com

This adds NAND boot support for LS2085AQDS, using SPL framework.

To form a NAND image, append u-boot-with-spl.bin after a proper
nand boot RCW and flash to the beginning of NAND.

Signed-off-by: Scott Wood scottw...@freescale.com
Signed-off-by: York Sun york...@freescale.com

---

Changes in v4:
  Update MAINTAINERS file

Changes in v3: None
Changes in v2: None

 arch/arm/Kconfig |1 +
 arch/arm/cpu/armv8/fsl-lsch3/soc.c   |   48 
 arch/arm/cpu/armv8/u-boot-spl.lds|   77 ++
 arch/arm/include/asm/arch-fsl-lsch3/config.h |9 +++
 arch/arm/lib/crt0_64.S   |7 +++
 board/freescale/ls2085aqds/MAINTAINERS   |1 +
 board/freescale/ls2085aqds/ddr.c |4 ++
 common/spl/spl.c |2 +-
 common/spl/spl_nand.c|2 +-
 configs/ls2085aqds_nand_defconfig|4 ++
 drivers/misc/fsl_ifc.c   |   12 
 drivers/mtd/nand/fsl_ifc_spl.c   |2 +-
 include/configs/ls2085a_common.h |   29 ++
 include/configs/ls2085aqds.h |   50 +++--
 14 files changed, 240 insertions(+), 8 deletions(-)
 create mode 100644 arch/arm/cpu/armv8/u-boot-spl.lds
 create mode 100644 configs/ls2085aqds_nand_defconfig

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 7478eb4..46a48a0 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -652,6 +652,7 @@ config TARGET_LS2085AQDS
bool Support ls2085aqds
select ARM64
select ARMV8_MULTIENTRY
+   select SUPPORT_SPL
help
  Support for Freescale LS2085AQDS platform
  The LS2085A Development System (QDS) is a high-performance
diff --git a/arch/arm/cpu/armv8/fsl-lsch3/soc.c 
b/arch/arm/cpu/armv8/fsl-lsch3/soc.c
index 17700ef..ca00108 100644
--- a/arch/arm/cpu/armv8/fsl-lsch3/soc.c
+++ b/arch/arm/cpu/armv8/fsl-lsch3/soc.c
@@ -6,8 +6,13 @@
 
 #include common.h
 #include fsl_ifc.h
+#include nand.h
+#include spl.h
 #include asm/arch-fsl-lsch3/soc.h
 #include asm/io.h
+#include asm/global_data.h
+
+DECLARE_GLOBAL_DATA_PTR;
 
 static void erratum_a008751(void)
 {
@@ -18,8 +23,51 @@ static void erratum_a008751(void)
 #endif
 }
 
+static void erratum_rcw_src(void)
+{
+#if defined(CONFIG_SPL)
+   u32 __iomem *dcfg_ccsr = (u32 __iomem *)DCFG_BASE;
+   u32 __iomem *dcfg_dcsr = (u32 __iomem *)DCFG_DCSR_BASE;
+   u32 val;
+
+   val = in_le32(dcfg_ccsr + DCFG_PORSR1 / 4);
+   val = ~DCFG_PORSR1_RCW_SRC;
+   val |= DCFG_PORSR1_RCW_SRC_NOR;
+   out_le32(dcfg_dcsr + DCFG_DCSR_PORCR1 / 4, val);
+#endif
+}
+
 void fsl_lsch3_early_init_f(void)
 {
erratum_a008751();
+   erratum_rcw_src();
init_early_memctl_regs();   /* tighten IFC timing */
 }
+
+#ifdef CONFIG_SPL_BUILD
+void board_init_f(ulong dummy)
+{
+   /* Clear global data */
+   memset((void *)gd, 0, sizeof(gd_t));
+
+   arch_cpu_init();
+   board_early_init_f();
+   timer_init();
+   env_init();
+   gd-baudrate = getenv_ulong(baudrate, 10, CONFIG_BAUDRATE);
+
+   serial_init();
+   console_init_f();
+   dram_init();
+
+   /* Clear the BSS. */
+   memset(__bss_start, 0, __bss_end - __bss_start);
+
+   board_init_r(NULL, 0);
+}
+
+u32 spl_boot_device(void)
+{
+   return BOOT_DEVICE_NAND;
+}
+#endif
diff --git a/arch/arm/cpu/armv8/u-boot-spl.lds 
b/arch/arm/cpu/armv8/u-boot-spl.lds
new file mode 100644
index 000..4df339c
--- /dev/null
+++ b/arch/arm/cpu/armv8/u-boot-spl.lds
@@ -0,0 +1,77 @@
+/*
+ * (C) Copyright 2013
+ * David Feng feng...@phytium.com.cn
+ *
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, ga...@denx.de
+ *
+ * (C) Copyright 2010
+ * Texas Instruments, www.ti.com
+ * Aneesh V ane...@ti.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,
+   LENGTH = CONFIG_SPL_MAX_SIZE }
+MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR,
+   LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
+
+OUTPUT_FORMAT(elf64-littleaarch64, elf64-littleaarch64, 
elf64-littleaarch64)
+OUTPUT_ARCH(aarch64)
+ENTRY(_start)
+SECTIONS
+{
+   .text : {
+   . = ALIGN(8);
+   *(.__image_copy_start)
+   CPUDIR/start.o (.text*)
+   *(.text*)
+   } .sram
+
+   .rodata : {
+   . = ALIGN(8);
+   *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
+   } .sram
+
+   .data : {
+   . = ALIGN(8);
+   *(.data*)
+   } .sram
+
+   .u_boot_list : {
+   . = ALIGN(8);
+   KEEP(*(SORT(.u_boot_list*)));
+   } .sram
+
+   .image_copy_end : {
+   . = ALIGN(8);
+   *(.__image_copy_end)
+   } .sram
+
+   .end : {
+   . = ALIGN(8);
+   

Re: [U-Boot] [PATCH v4 24/28] armv8/ls2085aqds: NAND boot support

2015-03-20 Thread York Sun


On 03/20/2015 02:15 PM, Scott Wood wrote:
 On Fri, 2015-03-20 at 12:21 -0700, York Sun wrote:
 From: Scott Wood scottw...@freescale.com

 This adds NAND boot support for LS2085AQDS, using SPL framework.

 To form a NAND image, append u-boot-with-spl.bin after a proper
 nand boot RCW and flash to the beginning of NAND.
 
 Do we want to do it this way, or should we keep the RCW in a separate
 block?

I would like to see RCW in a separated block.
 
 What constitutes a proper nand boot RCW (those were not my words)?
 There are details in this patch regarding offsets that need to match
 details in the PBI (which is more than just RCW).

It is not your original words. Yours was To form a NAND image, append
u-boot-with-spl.bin after PBL_0x3_0x07_1333_nand.bin and flash to the beginning
of NAND.. I try to make the message generic. A proper nand boot RCW means the
RCW should contains PBI commands to set bootloc and block copy the image. Since
RCW is not in the scope of u-boot, I cannot refer to any specific file.

Do you want to include an RCW file into u-boot, like those for powerpc boards?
 
 It would also be nice to sort out loading the environment during SPL.
That can be an additional patch when you have it.

York
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Re: [U-Boot] [PATCH v4 24/28] armv8/ls2085aqds: NAND boot support

2015-03-20 Thread Scott Wood
On Fri, 2015-03-20 at 14:23 -0700, York Sun wrote:
 
 On 03/20/2015 02:15 PM, Scott Wood wrote:
  On Fri, 2015-03-20 at 12:21 -0700, York Sun wrote:
  From: Scott Wood scottw...@freescale.com
 
  This adds NAND boot support for LS2085AQDS, using SPL framework.
 
  To form a NAND image, append u-boot-with-spl.bin after a proper
  nand boot RCW and flash to the beginning of NAND.
  
  Do we want to do it this way, or should we keep the RCW in a separate
  block?
 
 I would like to see RCW in a separated block.

OK.  In that case the offsets in this patch will need to change.

  What constitutes a proper nand boot RCW (those were not my words)?
  There are details in this patch regarding offsets that need to match
  details in the PBI (which is more than just RCW).
 
 It is not your original words. Yours was To form a NAND image, append
 u-boot-with-spl.bin after PBL_0x3_0x07_1333_nand.bin and flash to the 
 beginning
 of NAND.. I try to make the message generic. A proper nand boot RCW means the
 RCW should contains PBI commands to set bootloc and block copy the image. 
 Since
 RCW is not in the scope of u-boot, I cannot refer to any specific file.

Yes, I know you can't refer to the file, but it needs to be made clear
what the expectations of that PBI file are.

 Do you want to include an RCW file into u-boot, like those for powerpc boards?

Not really.  I'd rather have rcw.git published for all use cases (like
http://git.freescale.com/git/cgit.cgi/layerscape/ls1021a/rcw.git/ but
updated for ls2085a and without the repository being chip-specific (at
least in name)).

On PPC we had to have U-Boot do it because the U-Boot image itself had
to be encoded in the PBI.  That thankfully isn't the case here.

-Scott


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Re: [U-Boot] [PATCH v4 24/28] armv8/ls2085aqds: NAND boot support

2015-03-20 Thread Tom Rini
On Fri, Mar 20, 2015 at 04:15:40PM -0500, Scott Wood wrote:

[snip]
 It would also be nice to sort out loading the environment during SPL.

*ears perk up*.  Please elaborate :)  We have SPL environment support,
we have SPL NAND Environment support today.  It doesn't get passed along
to the running U-Boot and it's used for some limited cases (network and
redundancy).  I'd like to hear about more and better ways of using it.

-- 
Tom


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Re: [U-Boot] [PATCH v4 24/28] armv8/ls2085aqds: NAND boot support

2015-03-20 Thread York Sun


On 03/20/2015 02:33 PM, Scott Wood wrote:
 On Fri, 2015-03-20 at 14:23 -0700, York Sun wrote:

 On 03/20/2015 02:15 PM, Scott Wood wrote:
 On Fri, 2015-03-20 at 12:21 -0700, York Sun wrote:
 From: Scott Wood scottw...@freescale.com

 This adds NAND boot support for LS2085AQDS, using SPL framework.

 To form a NAND image, append u-boot-with-spl.bin after a proper
 nand boot RCW and flash to the beginning of NAND.

 Do we want to do it this way, or should we keep the RCW in a separate
 block?

 I would like to see RCW in a separated block.
 
 OK.  In that case the offsets in this patch will need to change.
 
 What constitutes a proper nand boot RCW (those were not my words)?
 There are details in this patch regarding offsets that need to match
 details in the PBI (which is more than just RCW).

 It is not your original words. Yours was To form a NAND image, append
 u-boot-with-spl.bin after PBL_0x3_0x07_1333_nand.bin and flash to the 
 beginning
 of NAND.. I try to make the message generic. A proper nand boot RCW means 
 the
 RCW should contains PBI commands to set bootloc and block copy the image. 
 Since
 RCW is not in the scope of u-boot, I cannot refer to any specific file.
 
 Yes, I know you can't refer to the file, but it needs to be made clear
 what the expectations of that PBI file are.

I think a proper solution would be to put detail instruction into board README
file by adding

To form the NAND image, append u-boot-with-spl.bin after RCW image. The RCW
image should have these PBI commands

CCSR 4-byte write to 0x00e00404, data=0x
CCSR 4-byte write to 0x00e00400, data=0x1800a000
Block Copy: SRC=0x0104, SRC_ADDR=0x00c0, DEST_ADDR=0x1800a000,
BLOCK_SIZE=0x00014000

We need to revise the SRS_ADDR if moving u-boot to a separated block. Please
advise what address is appropriate.

Please also advise the BLOCK_SIZE. Does it need to be fixed, or min(0x14000,
sizeof(u-boot-spl.bin))?

 
 Do you want to include an RCW file into u-boot, like those for powerpc 
 boards?
 
 Not really.  I'd rather have rcw.git published for all use cases (like
 http://git.freescale.com/git/cgit.cgi/layerscape/ls1021a/rcw.git/ but
 updated for ls2085a and without the repository being chip-specific (at
 least in name)).
 
 On PPC we had to have U-Boot do it because the U-Boot image itself had
 to be encoded in the PBI.  That thankfully isn't the case here.

This is good.

York

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Re: [U-Boot] [PATCH v4 24/28] armv8/ls2085aqds: NAND boot support

2015-03-20 Thread Scott Wood
On Fri, 2015-03-20 at 17:37 -0400, Tom Rini wrote:
 On Fri, Mar 20, 2015 at 04:15:40PM -0500, Scott Wood wrote:
 
 [snip]
  It would also be nice to sort out loading the environment during SPL.
 
 *ears perk up*.  Please elaborate :)  We have SPL environment support,
 we have SPL NAND Environment support today.  It doesn't get passed along
 to the running U-Boot and it's used for some limited cases (network and
 redundancy).  I'd like to hear about more and better ways of using it.

In common/spl/spl_nand.c, why does it only load the environment when
CONFIG_NAND_ENV_DST is defined, yet it never uses the value of
CONFIG_NAND_ENV_DST?  I also don't see any boards definind
CONFIG_NAND_ENV_DST (apparently the only one that ever used it was
smdk6400 which has been removed).

Is there some other way that the environment is supposed to be getting
loaded from NAND (rather than using the default environment) during SPL?

-Scott


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