Re: [U-Boot] [PATCH v5 05/16] arm: socfpga: Add A10 macros
On 04/17/2017 06:49 AM, Ley Foon Tan wrote: > On Fri, Apr 14, 2017 at 6:20 PM, Marek Vasutwrote: >> On 04/13/2017 07:41 PM, Ley Foon Tan wrote: >>> Add i2c, timer and other A10 macros. >> >> What's NOC anyway ? > Network on chip. Ah, OK :) >>> Signed-off-by: Ley Foon Tan >>> --- >>> arch/arm/mach-socfpga/include/mach/base_addr_a10.h | 8 +++- >>> 1 file changed, 7 insertions(+), 1 deletion(-) >>> >>> diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_a10.h >>> b/arch/arm/mach-socfpga/include/mach/base_addr_a10.h >>> index a7056d4..448fbdc 100644 >>> --- a/arch/arm/mach-socfpga/include/mach/base_addr_a10.h >>> +++ b/arch/arm/mach-socfpga/include/mach/base_addr_a10.h >>> @@ -1,5 +1,5 @@ >>> /* >>> - * Copyright (C) 2014 Altera Corporation >>> + * Copyright (C) 2014-2017 Altera Corporation >>> * >>> * SPDX-License-Identifier: GPL-2.0+ >>> */ >>> @@ -29,14 +29,20 @@ >>> #define SOCFPGA_MPUL2_ADDRESS0xf000 >>> #define SOCFPGA_I2C0_ADDRESS 0xffc02200 >>> #define SOCFPGA_I2C1_ADDRESS 0xffc02300 >>> +#define SOCFPGA_I2C2_ADDRESS 0xffc02400 >>> +#define SOCFPGA_I2C3_ADDRESS 0xffc02500 >>> +#define SOCFPGA_I2C4_ADDRESS 0xffc02600 >>> >>> #define SOCFPGA_ECC_OCRAM_ADDRESS0xff8c3000 >>> #define SOCFPGA_UART0_ADDRESS0xffc02000 >>> #define SOCFPGA_OSC1TIMER0_ADDRESS 0xffd0 >>> +#define SOCFPGA_OSC1TIMER1_ADDRESS 0xffd00100 >>> #define SOCFPGA_CLKMGR_ADDRESS 0xffd04000 >>> #define SOCFPGA_RSTMGR_ADDRESS 0xffd05000 >>> >>> #define SOCFPGA_SDR_ADDRESS 0xffcfb000 >>> +#define SOCFPGA_NOC_L4_PRIV_FLT_OFST 0xffd11000 >>> +#define SOCFPGA_NOC_FW_H2F_SCR_OFST 0xffd13500 >> >> Keep the list sorted by address at least :) > Okay. >> >>> #define SOCFPGA_SDR_SCHEDULER_ADDRESS0xffd12400 >>> #define SOCFPGA_SDR_FIREWALL_OCRAM_ADDRESS 0xffd13200 >>> #define SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS0xffd13300 >>> > Regards > Ley Foon > -- Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v5 05/16] arm: socfpga: Add A10 macros
On Fri, Apr 14, 2017 at 6:20 PM, Marek Vasutwrote: > On 04/13/2017 07:41 PM, Ley Foon Tan wrote: >> Add i2c, timer and other A10 macros. > > What's NOC anyway ? Network on chip. > >> Signed-off-by: Ley Foon Tan >> --- >> arch/arm/mach-socfpga/include/mach/base_addr_a10.h | 8 +++- >> 1 file changed, 7 insertions(+), 1 deletion(-) >> >> diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_a10.h >> b/arch/arm/mach-socfpga/include/mach/base_addr_a10.h >> index a7056d4..448fbdc 100644 >> --- a/arch/arm/mach-socfpga/include/mach/base_addr_a10.h >> +++ b/arch/arm/mach-socfpga/include/mach/base_addr_a10.h >> @@ -1,5 +1,5 @@ >> /* >> - * Copyright (C) 2014 Altera Corporation >> + * Copyright (C) 2014-2017 Altera Corporation >> * >> * SPDX-License-Identifier: GPL-2.0+ >> */ >> @@ -29,14 +29,20 @@ >> #define SOCFPGA_MPUL2_ADDRESS0xf000 >> #define SOCFPGA_I2C0_ADDRESS 0xffc02200 >> #define SOCFPGA_I2C1_ADDRESS 0xffc02300 >> +#define SOCFPGA_I2C2_ADDRESS 0xffc02400 >> +#define SOCFPGA_I2C3_ADDRESS 0xffc02500 >> +#define SOCFPGA_I2C4_ADDRESS 0xffc02600 >> >> #define SOCFPGA_ECC_OCRAM_ADDRESS0xff8c3000 >> #define SOCFPGA_UART0_ADDRESS0xffc02000 >> #define SOCFPGA_OSC1TIMER0_ADDRESS 0xffd0 >> +#define SOCFPGA_OSC1TIMER1_ADDRESS 0xffd00100 >> #define SOCFPGA_CLKMGR_ADDRESS 0xffd04000 >> #define SOCFPGA_RSTMGR_ADDRESS 0xffd05000 >> >> #define SOCFPGA_SDR_ADDRESS 0xffcfb000 >> +#define SOCFPGA_NOC_L4_PRIV_FLT_OFST 0xffd11000 >> +#define SOCFPGA_NOC_FW_H2F_SCR_OFST 0xffd13500 > > Keep the list sorted by address at least :) Okay. > >> #define SOCFPGA_SDR_SCHEDULER_ADDRESS0xffd12400 >> #define SOCFPGA_SDR_FIREWALL_OCRAM_ADDRESS 0xffd13200 >> #define SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS0xffd13300 >> Regards Ley Foon ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v5 05/16] arm: socfpga: Add A10 macros
On 04/13/2017 07:41 PM, Ley Foon Tan wrote: > Add i2c, timer and other A10 macros. What's NOC anyway ? > Signed-off-by: Ley Foon Tan> --- > arch/arm/mach-socfpga/include/mach/base_addr_a10.h | 8 +++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_a10.h > b/arch/arm/mach-socfpga/include/mach/base_addr_a10.h > index a7056d4..448fbdc 100644 > --- a/arch/arm/mach-socfpga/include/mach/base_addr_a10.h > +++ b/arch/arm/mach-socfpga/include/mach/base_addr_a10.h > @@ -1,5 +1,5 @@ > /* > - * Copyright (C) 2014 Altera Corporation > + * Copyright (C) 2014-2017 Altera Corporation > * > * SPDX-License-Identifier: GPL-2.0+ > */ > @@ -29,14 +29,20 @@ > #define SOCFPGA_MPUL2_ADDRESS0xf000 > #define SOCFPGA_I2C0_ADDRESS 0xffc02200 > #define SOCFPGA_I2C1_ADDRESS 0xffc02300 > +#define SOCFPGA_I2C2_ADDRESS 0xffc02400 > +#define SOCFPGA_I2C3_ADDRESS 0xffc02500 > +#define SOCFPGA_I2C4_ADDRESS 0xffc02600 > > #define SOCFPGA_ECC_OCRAM_ADDRESS0xff8c3000 > #define SOCFPGA_UART0_ADDRESS0xffc02000 > #define SOCFPGA_OSC1TIMER0_ADDRESS 0xffd0 > +#define SOCFPGA_OSC1TIMER1_ADDRESS 0xffd00100 > #define SOCFPGA_CLKMGR_ADDRESS 0xffd04000 > #define SOCFPGA_RSTMGR_ADDRESS 0xffd05000 > > #define SOCFPGA_SDR_ADDRESS 0xffcfb000 > +#define SOCFPGA_NOC_L4_PRIV_FLT_OFST 0xffd11000 > +#define SOCFPGA_NOC_FW_H2F_SCR_OFST 0xffd13500 Keep the list sorted by address at least :) > #define SOCFPGA_SDR_SCHEDULER_ADDRESS0xffd12400 > #define SOCFPGA_SDR_FIREWALL_OCRAM_ADDRESS 0xffd13200 > #define SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS0xffd13300 > -- Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v5 05/16] arm: socfpga: Add A10 macros
Add i2c, timer and other A10 macros. Signed-off-by: Ley Foon Tan--- arch/arm/mach-socfpga/include/mach/base_addr_a10.h | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_a10.h b/arch/arm/mach-socfpga/include/mach/base_addr_a10.h index a7056d4..448fbdc 100644 --- a/arch/arm/mach-socfpga/include/mach/base_addr_a10.h +++ b/arch/arm/mach-socfpga/include/mach/base_addr_a10.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2014 Altera Corporation + * Copyright (C) 2014-2017 Altera Corporation * * SPDX-License-Identifier:GPL-2.0+ */ @@ -29,14 +29,20 @@ #define SOCFPGA_MPUL2_ADDRESS 0xf000 #define SOCFPGA_I2C0_ADDRESS 0xffc02200 #define SOCFPGA_I2C1_ADDRESS 0xffc02300 +#define SOCFPGA_I2C2_ADDRESS 0xffc02400 +#define SOCFPGA_I2C3_ADDRESS 0xffc02500 +#define SOCFPGA_I2C4_ADDRESS 0xffc02600 #define SOCFPGA_ECC_OCRAM_ADDRESS 0xff8c3000 #define SOCFPGA_UART0_ADDRESS 0xffc02000 #define SOCFPGA_OSC1TIMER0_ADDRESS 0xffd0 +#define SOCFPGA_OSC1TIMER1_ADDRESS 0xffd00100 #define SOCFPGA_CLKMGR_ADDRESS 0xffd04000 #define SOCFPGA_RSTMGR_ADDRESS 0xffd05000 #define SOCFPGA_SDR_ADDRESS0xffcfb000 +#define SOCFPGA_NOC_L4_PRIV_FLT_OFST 0xffd11000 +#define SOCFPGA_NOC_FW_H2F_SCR_OFST0xffd13500 #define SOCFPGA_SDR_SCHEDULER_ADDRESS 0xffd12400 #define SOCFPGA_SDR_FIREWALL_OCRAM_ADDRESS 0xffd13200 #define SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS 0xffd13300 -- 1.8.2.3 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot