Re: [U-Boot] [U-BOOT] nand merge problem
On Sun, May 31, 2009 at 04:09:35PM +0800, xiangfu wrote: static void jz_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) { struct nand_chip *this = (struct nand_chip *)(mtd-priv); unsigned int nandaddr = (unsigned int)this-IO_ADDR_W; if (ctrl NAND_CTRL_CHANGE) { if (ctrl NAND_CLE) nandaddr = nandaddr | 0x8000; else nandaddr = nandaddr ~0x8000; if (ctrl NAND_ALE) this-IO_ADDR_W = (void __iomem *)((unsigned long)(this-IO_ADDR_W) | 0x0001); else this-IO_ADDR_W = (void __iomem *)((unsigned long)(this-IO_ADDR_W) ~0x0001); if (ctrl NAND_NCE) { this-IO_ADDR_W = this-IO_ADDR_R = (void __iomem *)NAND_DATA_PORT1; REG_EMC_NFCSR |= EMC_NFCSR_NFCE1; } else { REG_EMC_NFCSR = ~EMC_NFCSR_NFCE1; REG_EMC_NFCSR = ~EMC_NFCSR_NFCE2; REG_EMC_NFCSR = ~EMC_NFCSR_NFCE3; REG_EMC_NFCSR = ~EMC_NFCSR_NFCE4; } } this-IO_ADDR_W = (void __iomem *)nandaddr; if (cmd != NAND_CMD_NONE) writeb(cmd, this-IO_ADDR_W); } Try something like this instead: static void jz_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) { struct nand_chip *this = mtd-priv; unsigned long nandaddr = (unsigned long)this-IO_ADDR_W; if (ctrl NAND_CTRL_CHANGE) { /* Change this to use I/O accessors. */ if (ctrl NAND_NCE) { REG_EMC_NFCSR |= EMC_NFCSR_NFCE1; } else { /* * Why set only one bit when NCE is high, but clear * four when low? Why clear separate bits in the same * register one at a time? */ REG_EMC_NFCSR = ~EMC_NFCSR_NFCE1; REG_EMC_NFCSR = ~EMC_NFCSR_NFCE2; REG_EMC_NFCSR = ~EMC_NFCSR_NFCE3; REG_EMC_NFCSR = ~EMC_NFCSR_NFCE4; } } if (cmd == NAND_CMD_NONE) return; if (ctrl NAND_CLE) nandaddr |= 0x8000; else /* must be ALE */ nandaddr |= 0x0001; writeb(cmd, (uint8_t *)nandaddr); } -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-BOOT] nand merge problem
Thanks Scott, it's work. :-) Scott Wood wrote: Try something like this instead: static void jz_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) { struct nand_chip *this = mtd-priv; unsigned long nandaddr = (unsigned long)this-IO_ADDR_W; if (ctrl NAND_CTRL_CHANGE) { /* Change this to use I/O accessors. */ if (ctrl NAND_NCE) { REG_EMC_NFCSR |= EMC_NFCSR_NFCE1; } else { /* * Why set only one bit when NCE is high, but clear * four when low? Why clear separate bits in the same * register one at a time? */ my mistake. I copy those code form the device's kernel source code. REG_EMC_NFCSR = ~EMC_NFCSR_NFCE1; REG_EMC_NFCSR = ~EMC_NFCSR_NFCE2; REG_EMC_NFCSR = ~EMC_NFCSR_NFCE3; REG_EMC_NFCSR = ~EMC_NFCSR_NFCE4; } } if (cmd == NAND_CMD_NONE) return; if (ctrl NAND_CLE) nandaddr |= 0x8000; else /* must be ALE */ nandaddr |= 0x0001; writeb(cmd, (uint8_t *)nandaddr); } -Scott -- Best Regards Xiangfu Liu jabber : xiangf...@gmail.com skype : xiangfu.z ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-BOOT] nand merge problem
zy...@ingenic.cn wrote: Hi, xiangfu Maybe the drivers of mtd in linux-2.6.24.3 can be as reference. Best Regards thanks, now it's output : nand_get_flash_type: second ID read did not match 43,20 against 84,84 I will let you know the progress. now the hwcontrol is -- static void jz_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) { struct nand_chip *this = (struct nand_chip *)(mtd-priv); unsigned int nandaddr = (unsigned int)this-IO_ADDR_W; if (ctrl NAND_CTRL_CHANGE) { if (ctrl NAND_CLE) nandaddr = nandaddr | 0x8000; else nandaddr = nandaddr ~0x8000; if (ctrl NAND_ALE) this-IO_ADDR_W = (void __iomem *)((unsigned long)(this-IO_ADDR_W) | 0x0001); else this-IO_ADDR_W = (void __iomem *)((unsigned long)(this-IO_ADDR_W) ~0x0001); if (ctrl NAND_NCE) { this-IO_ADDR_W = this-IO_ADDR_R = (void __iomem *)NAND_DATA_PORT1; REG_EMC_NFCSR |= EMC_NFCSR_NFCE1; } else { REG_EMC_NFCSR = ~EMC_NFCSR_NFCE1; REG_EMC_NFCSR = ~EMC_NFCSR_NFCE2; REG_EMC_NFCSR = ~EMC_NFCSR_NFCE3; REG_EMC_NFCSR = ~EMC_NFCSR_NFCE4; } } this-IO_ADDR_W = (void __iomem *)nandaddr; if (cmd != NAND_CMD_NONE) writeb(cmd, this-IO_ADDR_W); } -- Best Regards Xiangfu Liu jabber : xiangf...@gmail.com skype : xiangfu.z ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-BOOT] nand merge problem
xiangfu_gmail wrote: static void jz_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) { struct nand_chip *this = (struct nand_chip *)(mtd-priv); if (ctrl NAND_CTRL_CHANGE) { if (ctrl NAND_NCE) REG_EMC_NFCSR |= EMC_NFCSR_NFCE1; else REG_EMC_NFCSR = ~EMC_NFCSR_NFCE1; if (ctrl NAND_CLE) this-IO_ADDR_W = (void __iomem *) ((unsigned long)(this-IO_ADDR_W) | 0x8000); else this-IO_ADDR_W = (void __iomem *) ((unsigned long)(this-IO_ADDR_W) ~0x8000); if (ctrl NAND_ALE) this-IO_ADDR_W = (void __iomem *) ((unsigned long)(this-IO_ADDR_W) | 0x0001); else this-IO_ADDR_W = (void __iomem *) ((unsigned long)(this-IO_ADDR_W) ~0x0001); } } Nowhere in this function do you issue the command... See cpu/ppc4xx/ndfc.c for a simple hwcontrol function. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [U-BOOT] nand merge problem
Hi I have try to merge Ingenic U-boot (1.1.6) with upstream. but I have some problem 1. there is no -- NAND_CTL_SETNCE: NAND_CTL_CLRNCE: NAND_CTL_SETCLE: NAND_CTL_CLRCLE: NAND_CTL_SETALE: NAND_CTL_CLRALE: instead of : -- NAND_NCE: NAND_CLE: NAND_ALE: NAND_CTRL_CLE: NAND_CTRL_ALE: NAND_CTRL_CHANGE: I use the NAND_CTL_SETNCE... in the jz_hwcontrol function. i use nand-hwcontrol = jz_hwcontrol in the u-boot 1.1.6 but in the U-boot V2009-06 the nand_chip structure does not have hwcontrol function. what am I gonna do? thanks for help. -- Best Regards Xiangfu Liu jabber : xiangf...@gmail.com skype : xiangfu.z Please avoid sending me Word or PowerPoint attachments. See http://www.gnu.org/philosophy/no-word-attachments.html ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-BOOT] nand merge problem
xiangfu_gmail wrote: Hi I have try to merge Ingenic U-boot (1.1.6) with upstream. but I have some problem Hi I rewrite the jz_hwcontrol to : -- static void jz_hwcontrol(..) { .. if (ctrl NAND_CTRL_CHANGE) { if (ctrl NAND_NCE) REG_EMC_NFCSR |= EMC_NFCSR_NFCE1; else REG_EMC_NFCSR = ~EMC_NFCSR_NFCE1; if (ctrl NAND_CLE) .. } } and nand-cmd_ctrl = jz_hwcontrol; in board_nand_init but it's still not work: the error message: -- NAND: nand_get_flash_type: second ID read did not match ff,ff against 00,00 No NAND device found!!! 0 MiB -- what can cause this problem? thanks ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-BOOT] nand merge problem
On Tue, May 26, 2009 at 05:12:01PM +0800, xiangfu_gmail wrote: xiangfu_gmail wrote: Hi I have try to merge Ingenic U-boot (1.1.6) with upstream. but I have some problem Hi I rewrite the jz_hwcontrol to : -- static void jz_hwcontrol(..) { .. if (ctrl NAND_CTRL_CHANGE) { if (ctrl NAND_NCE) REG_EMC_NFCSR |= EMC_NFCSR_NFCE1; else REG_EMC_NFCSR = ~EMC_NFCSR_NFCE1; if (ctrl NAND_CLE) .. } } and nand-cmd_ctrl = jz_hwcontrol; in board_nand_init but it's still not work: the error message: -- NAND: nand_get_flash_type: second ID read did not match ff,ff against 00,00 No NAND device found!!! 0 MiB -- what can cause this problem? It would be helpful if you were to post the entire hwcontrol, so we can see what's hiding behind those ..s. Posting the original legacy NAND defines for this board would be helpful as well. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-BOOT] nand merge problem
Hi Scott thanks for the reply Scott Wood wrote: On Tue, May 26, 2009 at 05:12:01PM +0800, xiangfu_gmail wrote: xiangfu_gmail wrote: Hi I have try to merge Ingenic U-boot (1.1.6) with upstream. but I have some problem Hi I rewrite the jz_hwcontrol to : -- static void jz_hwcontrol(..) {.. } and nand-cmd_ctrl = jz_hwcontrol; in board_nand_init but it's still not work: the error message: -- NAND: nand_get_flash_type: second ID read did not match ff,ff against 00,00 No NAND device found!!! 0 MiB -- what can cause this problem? It would be helpful if you were to post the entire hwcontrol, so we can see what's hiding behind those ..s. here is the entire hwontrol static void jz_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) { struct nand_chip *this = (struct nand_chip *)(mtd-priv); if (ctrl NAND_CTRL_CHANGE) { if (ctrl NAND_NCE) REG_EMC_NFCSR |= EMC_NFCSR_NFCE1; else REG_EMC_NFCSR = ~EMC_NFCSR_NFCE1; if (ctrl NAND_CLE) this-IO_ADDR_W = (void __iomem *) ((unsigned long)(this-IO_ADDR_W) | 0x8000); else this-IO_ADDR_W = (void __iomem *) ((unsigned long)(this-IO_ADDR_W) ~0x8000); if (ctrl NAND_ALE) this-IO_ADDR_W = (void __iomem *) ((unsigned long)(this-IO_ADDR_W) | 0x0001); else this-IO_ADDR_W = (void __iomem *) ((unsigned long)(this-IO_ADDR_W) ~0x0001); } } Posting the original legacy NAND defines for this board would be helpful as well. I don't know which code should I post. so I post the git URL: http://github.com/xiangfu/pi-u-boot/tree/xiangfu -Scott thanks -- Best Regards Xiangfu Liu jabber : xiangf...@gmail.com skype : xiangfu.z ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot