On Fri, Mar 08, 2019 at 11:47:34AM +0530, Lokesh Vutla wrote: > Certain parts of msmc sram can be used by DMSC or can be > marked as L3 cache. Since the available size can vary, changing > DT every time the size varies might be painful. So, query this > information using TISCI cmd and fixup the DT for kernel. > Fixing up DT does the following: > - Create a sram node if not available > - update the reg property with available size > - update ranges property > - loop through available sub nodes and delete it if: > - mentioned size is out if available range > - subnode represents l3 cache or dmsc usage. > > Signed-off-by: Lokesh Vutla <lokeshvu...@ti.com>
Applied to u-boot/master, thanks! -- Tom
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