Re: [U-Boot] [U-Boot, V2, PATCH 2/3] mips: add initial support for qca956x referenced board
Am 05.03.19 um 08:04 schrieb rosys...@rosinson.com:
> From: Rosy Song
>
> Signed-off-by: Rosy Song
> ---
as requested in the last review, please provide a proper commit message.
You also need to provide a changelog if you submit an updated series.
Maybe you should read this:
https://www.denx.de/wiki/U-Boot/Patches
> arch/mips/dts/Makefile| 1 +
> arch/mips/dts/ap152.dts | 48 ++
> arch/mips/dts/qca956x.dtsi| 87
> arch/mips/mach-ath79/Kconfig | 14 +
> arch/mips/mach-ath79/Makefile | 1 +
> .../mach-ath79/include/mach/ar71xx_regs.h | 73 +++
> arch/mips/mach-ath79/include/mach/ath79.h | 3 +
> arch/mips/mach-ath79/qca956x/Makefile | 5 +
> arch/mips/mach-ath79/qca956x/clk.c| 419 ++
> arch/mips/mach-ath79/qca956x/cpu.c| 9 +
> arch/mips/mach-ath79/qca956x/ddr.c| 308 +
> .../mips/mach-ath79/qca956x/qca956x-ddr-tap.S | 193
> arch/mips/mach-ath79/reset.c | 271 +++
> board/qca/ap152/Kconfig | 15 +
> board/qca/ap152/MAINTAINERS | 6 +
> board/qca/ap152/Makefile | 3 +
> board/qca/ap152/ap152.c | 81
> configs/ap152_defconfig | 49 ++
> include/configs/ap152.h | 54 +++
> 19 files changed, 1640 insertions(+)
> create mode 100644 arch/mips/dts/ap152.dts
> create mode 100644 arch/mips/dts/qca956x.dtsi
> create mode 100644 arch/mips/mach-ath79/qca956x/Makefile
> create mode 100644 arch/mips/mach-ath79/qca956x/clk.c
> create mode 100644 arch/mips/mach-ath79/qca956x/cpu.c
> create mode 100644 arch/mips/mach-ath79/qca956x/ddr.c
> create mode 100644 arch/mips/mach-ath79/qca956x/qca956x-ddr-tap.S
> create mode 100644 board/qca/ap152/Kconfig
> create mode 100644 board/qca/ap152/MAINTAINERS
> create mode 100644 board/qca/ap152/Makefile
> create mode 100644 board/qca/ap152/ap152.c
> create mode 100644 configs/ap152_defconfig
> create mode 100644 include/configs/ap152.h
>
> diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
> index b94b582837..621c35f0ef 100644
> --- a/arch/mips/dts/Makefile
> +++ b/arch/mips/dts/Makefile
> @@ -2,6 +2,7 @@
>
> dtb-$(CONFIG_TARGET_AP121) += ap121.dtb
> dtb-$(CONFIG_TARGET_AP143) += ap143.dtb
> +dtb-$(CONFIG_TARGET_AP152) += ap152.dtb
> dtb-$(CONFIG_TARGET_BOSTON) += img,boston.dtb
> dtb-$(CONFIG_TARGET_MALTA) += mti,malta.dtb
> dtb-$(CONFIG_TARGET_PIC32MZDASK) += pic32mzda_sk.dtb
> diff --git a/arch/mips/dts/ap152.dts b/arch/mips/dts/ap152.dts
> new file mode 100644
> index 00..1722290c73
> --- /dev/null
> +++ b/arch/mips/dts/ap152.dts
> @@ -0,0 +1,48 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2018 Rosy Song
> + */
> +
> +/dts-v1/;
> +#include "qca956x.dtsi"
> +
> +/ {
> + model = "AP152 Reference Board";
> + compatible = "qca,ap152", "qca,qca956x";
> +
> + aliases {
> + spi0 =
> + serial0 =
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +};
> +
> + {
> + phy-mode = "sgmii";
> + status = "okay";
> +};
> +
> + {
> + clock-frequency = <2500>;
> +};
> +
> + {
> + clock-frequency = <2500>;
> + status = "okay";
> +};
> +
> + {
> + spi-max-frequency = <2500>;
> + status = "okay";
> + spi-flash@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "spi-flash";
> + memory-map = <0x9f00 0x0100>;
> + spi-max-frequency = <2500>;
> + reg = <0>;
> + };
> +};
> diff --git a/arch/mips/dts/qca956x.dtsi b/arch/mips/dts/qca956x.dtsi
> new file mode 100644
> index 00..6cb360b3f8
> --- /dev/null
> +++ b/arch/mips/dts/qca956x.dtsi
> @@ -0,0 +1,87 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2018 Rosy Song
> + */
> +
> +#include "skeleton.dtsi"
> +
> +/ {
> + compatible = "qca,qca956x";
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu@0 {
> + device_type = "cpu";
> + compatible = "mips,mips74Kc";
> + reg = <0>;
> + };
> + };
> +
> + clocks {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + xtal: xtal {
> + #clock-cells = <0>;
> + compatible = "fixed-clock";
> + clock-output-names = "xtal";
> + };
> + };
> +
> + ahb {
> + compatible = "simple-bus";
> + ranges;
> +
> + #address-cells = <1>;
> + #size-cells =
[U-Boot] [U-Boot, V2, PATCH 2/3] mips: add initial support for qca956x referenced board
From: Rosy Song
Signed-off-by: Rosy Song
---
arch/mips/dts/Makefile| 1 +
arch/mips/dts/ap152.dts | 48 ++
arch/mips/dts/qca956x.dtsi| 87
arch/mips/mach-ath79/Kconfig | 14 +
arch/mips/mach-ath79/Makefile | 1 +
.../mach-ath79/include/mach/ar71xx_regs.h | 73 +++
arch/mips/mach-ath79/include/mach/ath79.h | 3 +
arch/mips/mach-ath79/qca956x/Makefile | 5 +
arch/mips/mach-ath79/qca956x/clk.c| 419 ++
arch/mips/mach-ath79/qca956x/cpu.c| 9 +
arch/mips/mach-ath79/qca956x/ddr.c| 308 +
.../mips/mach-ath79/qca956x/qca956x-ddr-tap.S | 193
arch/mips/mach-ath79/reset.c | 271 +++
board/qca/ap152/Kconfig | 15 +
board/qca/ap152/MAINTAINERS | 6 +
board/qca/ap152/Makefile | 3 +
board/qca/ap152/ap152.c | 81
configs/ap152_defconfig | 49 ++
include/configs/ap152.h | 54 +++
19 files changed, 1640 insertions(+)
create mode 100644 arch/mips/dts/ap152.dts
create mode 100644 arch/mips/dts/qca956x.dtsi
create mode 100644 arch/mips/mach-ath79/qca956x/Makefile
create mode 100644 arch/mips/mach-ath79/qca956x/clk.c
create mode 100644 arch/mips/mach-ath79/qca956x/cpu.c
create mode 100644 arch/mips/mach-ath79/qca956x/ddr.c
create mode 100644 arch/mips/mach-ath79/qca956x/qca956x-ddr-tap.S
create mode 100644 board/qca/ap152/Kconfig
create mode 100644 board/qca/ap152/MAINTAINERS
create mode 100644 board/qca/ap152/Makefile
create mode 100644 board/qca/ap152/ap152.c
create mode 100644 configs/ap152_defconfig
create mode 100644 include/configs/ap152.h
diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
index b94b582837..621c35f0ef 100644
--- a/arch/mips/dts/Makefile
+++ b/arch/mips/dts/Makefile
@@ -2,6 +2,7 @@
dtb-$(CONFIG_TARGET_AP121) += ap121.dtb
dtb-$(CONFIG_TARGET_AP143) += ap143.dtb
+dtb-$(CONFIG_TARGET_AP152) += ap152.dtb
dtb-$(CONFIG_TARGET_BOSTON) += img,boston.dtb
dtb-$(CONFIG_TARGET_MALTA) += mti,malta.dtb
dtb-$(CONFIG_TARGET_PIC32MZDASK) += pic32mzda_sk.dtb
diff --git a/arch/mips/dts/ap152.dts b/arch/mips/dts/ap152.dts
new file mode 100644
index 00..1722290c73
--- /dev/null
+++ b/arch/mips/dts/ap152.dts
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Rosy Song
+ */
+
+/dts-v1/;
+#include "qca956x.dtsi"
+
+/ {
+ model = "AP152 Reference Board";
+ compatible = "qca,ap152", "qca,qca956x";
+
+ aliases {
+ spi0 =
+ serial0 =
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+ {
+ phy-mode = "sgmii";
+ status = "okay";
+};
+
+ {
+ clock-frequency = <2500>;
+};
+
+ {
+ clock-frequency = <2500>;
+ status = "okay";
+};
+
+ {
+ spi-max-frequency = <2500>;
+ status = "okay";
+ spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spi-flash";
+ memory-map = <0x9f00 0x0100>;
+ spi-max-frequency = <2500>;
+ reg = <0>;
+ };
+};
diff --git a/arch/mips/dts/qca956x.dtsi b/arch/mips/dts/qca956x.dtsi
new file mode 100644
index 00..6cb360b3f8
--- /dev/null
+++ b/arch/mips/dts/qca956x.dtsi
@@ -0,0 +1,87 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Rosy Song
+ */
+
+#include "skeleton.dtsi"
+
+/ {
+ compatible = "qca,qca956x";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "mips,mips74Kc";
+ reg = <0>;
+ };
+ };
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ xtal: xtal {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-output-names = "xtal";
+ };
+ };
+
+ ahb {
+ compatible = "simple-bus";
+ ranges;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ apb {
+ compatible = "simple-bus";
+ ranges;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ uart0: uart@1802 {
+ compatible = "ns16550";
+ reg = <0x1802 0x20>;
+ reg-shift = <2>;
+
+ status = "disabled";
+
