Re: [U-Boot] [U-Boot, V3, PATCH 2/3] mips: add initial support for qca956x referenced board

2019-03-07 Thread Daniel Schwierzeck 
Am Do., 7. März 2019 um 02:31 Uhr schrieb :
>
> From: Rosy Song 
>
> QCA9563 is CPU used on AP152 board :
>
> Clock speed : 750 MHz ,
> Arch :  Mips 74Kc,
> Eth : SGMII interface,
> MIMO config : 3 * 3 450M,
> 2 * USB 2.0,
>
> Signed-off-by: Rosy Song 
>
> Changes for v2:
>- coding Style cleanup
>- remove ununsed flash chip in defconfig
>- enable automatic icache / dcache size in defconfig
>
> Changes for v3:
>- add detailed information for qca956x in commit message
> ---
>  arch/mips/dts/Makefile|   1 +
>  arch/mips/dts/ap152.dts   |  48 ++
>  arch/mips/dts/qca956x.dtsi|  87 
>  arch/mips/mach-ath79/Kconfig  |  14 +
>  arch/mips/mach-ath79/Makefile |   1 +
>  .../mach-ath79/include/mach/ar71xx_regs.h |  73 +++
>  arch/mips/mach-ath79/include/mach/ath79.h |   3 +
>  arch/mips/mach-ath79/qca956x/Makefile |   5 +
>  arch/mips/mach-ath79/qca956x/clk.c| 419 ++
>  arch/mips/mach-ath79/qca956x/cpu.c|   9 +
>  arch/mips/mach-ath79/qca956x/ddr.c| 308 +
>  .../mips/mach-ath79/qca956x/qca956x-ddr-tap.S | 193 
>  arch/mips/mach-ath79/reset.c  | 271 +++
>  board/qca/ap152/Kconfig   |  15 +
>  board/qca/ap152/MAINTAINERS   |   6 +
>  board/qca/ap152/Makefile  |   3 +
>  board/qca/ap152/ap152.c   |  81 
>  configs/ap152_defconfig   |  49 ++
>  include/configs/ap152.h   |  54 +++
>  19 files changed, 1640 insertions(+)
>  create mode 100644 arch/mips/dts/ap152.dts
>  create mode 100644 arch/mips/dts/qca956x.dtsi
>  create mode 100644 arch/mips/mach-ath79/qca956x/Makefile
>  create mode 100644 arch/mips/mach-ath79/qca956x/clk.c
>  create mode 100644 arch/mips/mach-ath79/qca956x/cpu.c
>  create mode 100644 arch/mips/mach-ath79/qca956x/ddr.c
>  create mode 100644 arch/mips/mach-ath79/qca956x/qca956x-ddr-tap.S
>  create mode 100644 board/qca/ap152/Kconfig
>  create mode 100644 board/qca/ap152/MAINTAINERS
>  create mode 100644 board/qca/ap152/Makefile
>  create mode 100644 board/qca/ap152/ap152.c
>  create mode 100644 configs/ap152_defconfig
>  create mode 100644 include/configs/ap152.h
>

Reviewed-by: Daniel Schwierzeck 

(if the following comment is addressed)

...

> diff --git a/include/configs/ap152.h b/include/configs/ap152.h
> new file mode 100644
> index 00..bc88506dff
> --- /dev/null
> +++ b/include/configs/ap152.h
> @@ -0,0 +1,54 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright (C) 2018 Rosy Song 
> + */
> +
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +
> +#define CONFIG_SYS_HZ   1000
> +#define CONFIG_SYS_MHZ  375
> +#define CONFIG_SYS_MIPS_TIMER_FREQ  (CONFIG_SYS_MHZ * 100)
> +
> +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
> +
> +#define CONFIG_SYS_MALLOC_LEN   0x4
> +#define CONFIG_SYS_BOOTPARAMS_LEN   0x2
> +
> +#define CONFIG_SYS_SDRAM_BASE   0x8000
> +#define CONFIG_SYS_LOAD_ADDR0x8100
> +
> +#define CONFIG_SYS_INIT_RAM_ADDR0xbd00
> +#define CONFIG_SYS_INIT_RAM_SIZE0x2000
> +#define CONFIG_SYS_INIT_SP_ADDR \
> +   (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE - 1)
> +
> +/*
> + * Serial Port
> + */
> +#define CONFIG_SYS_NS16550_CLK  2500
> +#define CONFIG_SYS_BAUDRATE_TABLE \
> +   {9600, 19200, 38400, 57600, 115200}
> +
> +#define CONFIG_BOOTCOMMAND  "sf probe;" \
> +   "mtdparts default;" \
> +   "bootm 0x9f06"
> +
> +#define CONFIG_EXTRA_ENV_SETTINGS \
> +   "ipaddr=192.168.1.1\0" \
> +   "serverip=192.168.1.10\0" \

boards in mainline must not have any pre-configured network settings.
The user should either use "setenv ipaddr" or dhcp".

> +
> +#define CONFIG_ENV_SPI_MAX_HZ   2500
> +#define CONFIG_ENV_OFFSET   0x4
> +#define CONFIG_ENV_SECT_SIZE0x1
> +#define CONFIG_ENV_SIZE 0x1
> +
> +/* Miscellaneous configurable options */
> +
> +/*
> + * Diagnostics
> + */
> +#define CONFIG_SYS_MEMTEST_START0x8010
> +#define CONFIG_SYS_MEMTEST_END  0x83f0
> +
> +#endif  /* __CONFIG_H */
> --
> 2.17.1
>


-- 
- Daniel
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[U-Boot] [U-Boot, V3, PATCH 2/3] mips: add initial support for qca956x referenced board

2019-03-06 Thread rosysong 
From: Rosy Song 

QCA9563 is CPU used on AP152 board :

Clock speed : 750 MHz ,
Arch :  Mips 74Kc,
Eth : SGMII interface,
MIMO config : 3 * 3 450M,
2 * USB 2.0,

Signed-off-by: Rosy Song 

Changes for v2:
   - coding Style cleanup
   - remove ununsed flash chip in defconfig
   - enable automatic icache / dcache size in defconfig

Changes for v3:
   - add detailed information for qca956x in commit message
---
 arch/mips/dts/Makefile|   1 +
 arch/mips/dts/ap152.dts   |  48 ++
 arch/mips/dts/qca956x.dtsi|  87 
 arch/mips/mach-ath79/Kconfig  |  14 +
 arch/mips/mach-ath79/Makefile |   1 +
 .../mach-ath79/include/mach/ar71xx_regs.h |  73 +++
 arch/mips/mach-ath79/include/mach/ath79.h |   3 +
 arch/mips/mach-ath79/qca956x/Makefile |   5 +
 arch/mips/mach-ath79/qca956x/clk.c| 419 ++
 arch/mips/mach-ath79/qca956x/cpu.c|   9 +
 arch/mips/mach-ath79/qca956x/ddr.c| 308 +
 .../mips/mach-ath79/qca956x/qca956x-ddr-tap.S | 193 
 arch/mips/mach-ath79/reset.c  | 271 +++
 board/qca/ap152/Kconfig   |  15 +
 board/qca/ap152/MAINTAINERS   |   6 +
 board/qca/ap152/Makefile  |   3 +
 board/qca/ap152/ap152.c   |  81 
 configs/ap152_defconfig   |  49 ++
 include/configs/ap152.h   |  54 +++
 19 files changed, 1640 insertions(+)
 create mode 100644 arch/mips/dts/ap152.dts
 create mode 100644 arch/mips/dts/qca956x.dtsi
 create mode 100644 arch/mips/mach-ath79/qca956x/Makefile
 create mode 100644 arch/mips/mach-ath79/qca956x/clk.c
 create mode 100644 arch/mips/mach-ath79/qca956x/cpu.c
 create mode 100644 arch/mips/mach-ath79/qca956x/ddr.c
 create mode 100644 arch/mips/mach-ath79/qca956x/qca956x-ddr-tap.S
 create mode 100644 board/qca/ap152/Kconfig
 create mode 100644 board/qca/ap152/MAINTAINERS
 create mode 100644 board/qca/ap152/Makefile
 create mode 100644 board/qca/ap152/ap152.c
 create mode 100644 configs/ap152_defconfig
 create mode 100644 include/configs/ap152.h

diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
index b94b582837..621c35f0ef 100644
--- a/arch/mips/dts/Makefile
+++ b/arch/mips/dts/Makefile
@@ -2,6 +2,7 @@
 
 dtb-$(CONFIG_TARGET_AP121) += ap121.dtb
 dtb-$(CONFIG_TARGET_AP143) += ap143.dtb
+dtb-$(CONFIG_TARGET_AP152) += ap152.dtb
 dtb-$(CONFIG_TARGET_BOSTON) += img,boston.dtb
 dtb-$(CONFIG_TARGET_MALTA) += mti,malta.dtb
 dtb-$(CONFIG_TARGET_PIC32MZDASK) += pic32mzda_sk.dtb
diff --git a/arch/mips/dts/ap152.dts b/arch/mips/dts/ap152.dts
new file mode 100644
index 00..1722290c73
--- /dev/null
+++ b/arch/mips/dts/ap152.dts
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Rosy Song 
+ */
+
+/dts-v1/;
+#include "qca956x.dtsi"
+
+/ {
+   model = "AP152 Reference Board";
+   compatible = "qca,ap152", "qca,qca956x";
+
+   aliases {
+   spi0 = 
+   serial0 = 
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+};
+
+ {
+   phy-mode = "sgmii";
+   status = "okay";
+};
+
+ {
+   clock-frequency = <2500>;
+};
+
+ {
+   clock-frequency = <2500>;
+   status = "okay";
+};
+
+ {
+   spi-max-frequency = <2500>;
+   status = "okay";
+   spi-flash@0 {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "spi-flash";
+   memory-map = <0x9f00 0x0100>;
+   spi-max-frequency = <2500>;
+   reg = <0>;
+   };
+};
diff --git a/arch/mips/dts/qca956x.dtsi b/arch/mips/dts/qca956x.dtsi
new file mode 100644
index 00..6cb360b3f8
--- /dev/null
+++ b/arch/mips/dts/qca956x.dtsi
@@ -0,0 +1,87 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Rosy Song 
+ */
+
+#include "skeleton.dtsi"
+
+/ {
+   compatible = "qca,qca956x";
+
+   #address-cells = <1>;
+   #size-cells = <1>;
+
+   cpus {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   cpu@0 {
+   device_type = "cpu";
+   compatible = "mips,mips74Kc";
+   reg = <0>;
+   };
+   };
+
+   clocks {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+
+   xtal: xtal {
+   #clock-cells = <0>;
+   compatible = "fixed-clock";
+   clock-output-names = "xtal";
+   };
+   };
+
+   ahb {
+   compatible = "simple-bus";
+   ranges;
+
+   #address-cells = <1>;
+   #size-cells = <1>;
+
+   apb {
+   compatible = "simple-bus";
+