Re: [U-Boot] [U-Boot PATCH v2 03/10] ARM: AM43xx: Add support for disabling clocks in uboot

2015-08-13 Thread Jagan Teki 
On 30 July 2015 at 11:04, Vignesh R vigne...@ti.com wrote:
 From: Kishon Vijay Abraham I kis...@ti.com

 Add do_disable_clocks() to disable clock domains and module clocks.
 These clocks are enabled using do_enable_clocks().

 Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
 Signed-off-by: Vignesh R vigne...@ti.com
 ---

Reviewed-by: Jagan Teki jt...@openedev.com

  arch/arm/cpu/armv7/am33xx/clock.c| 52 
 
  arch/arm/include/asm/arch-am33xx/clock.h |  1 +
  2 files changed, 53 insertions(+)

 diff --git a/arch/arm/cpu/armv7/am33xx/clock.c 
 b/arch/arm/cpu/armv7/am33xx/clock.c
 index ec7d46838b74..595c951ed245 100644
 --- a/arch/arm/cpu/armv7/am33xx/clock.c
 +++ b/arch/arm/cpu/armv7/am33xx/clock.c
 @@ -144,6 +144,33 @@ static inline void enable_clock_module(u32 *const 
 clkctrl_addr, u32 enable_mode,
 wait_for_clk_enable(clkctrl_addr);
  }

 +static inline void wait_for_clk_disable(u32 *clkctrl_addr)
 +{
 +   u32 clkctrl, idlest = MODULE_CLKCTRL_IDLEST_FULLY_FUNCTIONAL;
 +   u32 bound = LDELAY;
 +
 +   while ((idlest != MODULE_CLKCTRL_IDLEST_DISABLED)) {
 +   clkctrl = readl(clkctrl_addr);
 +   idlest = (clkctrl  MODULE_CLKCTRL_IDLEST_MASK) 
 + MODULE_CLKCTRL_IDLEST_SHIFT;
 +   if (--bound == 0) {
 +   printf(Clock disable failed for 0x%p idlest 0x%x\n,
 +  clkctrl_addr, clkctrl);
 +return;
 +   }
 +   }
 +}
 +static inline void disable_clock_module(u32 *const clkctrl_addr,
 +   u32 wait_for_disable)
 +{
 +   clrsetbits_le32(clkctrl_addr, MODULE_CLKCTRL_MODULEMODE_MASK,
 +   MODULE_CLKCTRL_MODULEMODE_SW_DISABLE 
 +   MODULE_CLKCTRL_MODULEMODE_SHIFT);
 +   debug(Disable clock module - %p\n, clkctrl_addr);
 +   if (wait_for_disable)
 +   wait_for_clk_disable(clkctrl_addr);
 +}
 +
  static inline void enable_clock_domain(u32 *const clkctrl_reg, u32 
 enable_mode)
  {
 clrsetbits_le32(clkctrl_reg, CD_CLKCTRL_CLKTRCTRL_MASK,
 @@ -151,6 +178,14 @@ static inline void enable_clock_domain(u32 *const 
 clkctrl_reg, u32 enable_mode)
 debug(Enable clock domain - %p\n, clkctrl_reg);
  }

 +static inline void disable_clock_domain(u32 *const clkctrl_reg)
 +{
 +   clrsetbits_le32(clkctrl_reg, CD_CLKCTRL_CLKTRCTRL_MASK,
 +   CD_CLKCTRL_CLKTRCTRL_SW_SLEEP 
 +   CD_CLKCTRL_CLKTRCTRL_SHIFT);
 +   debug(Disable clock domain - %p\n, clkctrl_reg);
 +}
 +
  void do_enable_clocks(u32 *const *clk_domains,
   u32 *const *clk_modules_explicit_en, u8 wait_for_enable)
  {
 @@ -170,6 +205,23 @@ void do_enable_clocks(u32 *const *clk_domains,
 };
  }

 +void do_disable_clocks(u32 *const *clk_domains,
 +   u32 *const *clk_modules_disable,
 +   u8 wait_for_disable)
 +{
 +   u32 i, max = 100;
 +
 +
 +   /* Clock modules that need to be put in SW_DISABLE */
 +   for (i = 0; (i  max)  clk_modules_disable[i]; i++)
 +   disable_clock_module(clk_modules_disable[i],
 +wait_for_disable);
 +
 +   /* Put the clock domains in SW_SLEEP mode */
 +   for (i = 0; (i  max)  clk_domains[i]; i++)
 +   disable_clock_domain(clk_domains[i]);
 +}
 +
  /*
   * Before scaling up the clocks we need to have the PMIC scale up the
   * voltages first.  This will be dependent on which PMIC is in use
 diff --git a/arch/arm/include/asm/arch-am33xx/clock.h 
 b/arch/arm/include/asm/arch-am33xx/clock.h
 index 4af6b57e42f5..a6d2419fb843 100644
 --- a/arch/arm/include/asm/arch-am33xx/clock.h
 +++ b/arch/arm/include/asm/arch-am33xx/clock.h
 @@ -112,5 +112,6 @@ void do_setup_dpll(const struct dpll_regs *, const struct 
 dpll_params *);
  void prcm_init(void);
  void enable_basic_clocks(void);
  void do_enable_clocks(u32 *const *, u32 *const *, u8);
 +void do_disable_clocks(u32 *const *, u32 *const *, u8);

  #endif
 --
 2.5.0

 ___
 U-Boot mailing list
 U-Boot@lists.denx.de
 http://lists.denx.de/mailman/listinfo/u-boot



-- 
Jagan | openedev.
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [U-Boot PATCH v2 03/10] ARM: AM43xx: Add support for disabling clocks in uboot

2015-07-29 Thread Vignesh R 
From: Kishon Vijay Abraham I kis...@ti.com

Add do_disable_clocks() to disable clock domains and module clocks.
These clocks are enabled using do_enable_clocks().

Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Signed-off-by: Vignesh R vigne...@ti.com
---
 arch/arm/cpu/armv7/am33xx/clock.c| 52 
 arch/arm/include/asm/arch-am33xx/clock.h |  1 +
 2 files changed, 53 insertions(+)

diff --git a/arch/arm/cpu/armv7/am33xx/clock.c 
b/arch/arm/cpu/armv7/am33xx/clock.c
index ec7d46838b74..595c951ed245 100644
--- a/arch/arm/cpu/armv7/am33xx/clock.c
+++ b/arch/arm/cpu/armv7/am33xx/clock.c
@@ -144,6 +144,33 @@ static inline void enable_clock_module(u32 *const 
clkctrl_addr, u32 enable_mode,
wait_for_clk_enable(clkctrl_addr);
 }
 
+static inline void wait_for_clk_disable(u32 *clkctrl_addr)
+{
+   u32 clkctrl, idlest = MODULE_CLKCTRL_IDLEST_FULLY_FUNCTIONAL;
+   u32 bound = LDELAY;
+
+   while ((idlest != MODULE_CLKCTRL_IDLEST_DISABLED)) {
+   clkctrl = readl(clkctrl_addr);
+   idlest = (clkctrl  MODULE_CLKCTRL_IDLEST_MASK) 
+ MODULE_CLKCTRL_IDLEST_SHIFT;
+   if (--bound == 0) {
+   printf(Clock disable failed for 0x%p idlest 0x%x\n,
+  clkctrl_addr, clkctrl);
+return;
+   }
+   }
+}
+static inline void disable_clock_module(u32 *const clkctrl_addr,
+   u32 wait_for_disable)
+{
+   clrsetbits_le32(clkctrl_addr, MODULE_CLKCTRL_MODULEMODE_MASK,
+   MODULE_CLKCTRL_MODULEMODE_SW_DISABLE 
+   MODULE_CLKCTRL_MODULEMODE_SHIFT);
+   debug(Disable clock module - %p\n, clkctrl_addr);
+   if (wait_for_disable)
+   wait_for_clk_disable(clkctrl_addr);
+}
+
 static inline void enable_clock_domain(u32 *const clkctrl_reg, u32 enable_mode)
 {
clrsetbits_le32(clkctrl_reg, CD_CLKCTRL_CLKTRCTRL_MASK,
@@ -151,6 +178,14 @@ static inline void enable_clock_domain(u32 *const 
clkctrl_reg, u32 enable_mode)
debug(Enable clock domain - %p\n, clkctrl_reg);
 }
 
+static inline void disable_clock_domain(u32 *const clkctrl_reg)
+{
+   clrsetbits_le32(clkctrl_reg, CD_CLKCTRL_CLKTRCTRL_MASK,
+   CD_CLKCTRL_CLKTRCTRL_SW_SLEEP 
+   CD_CLKCTRL_CLKTRCTRL_SHIFT);
+   debug(Disable clock domain - %p\n, clkctrl_reg);
+}
+
 void do_enable_clocks(u32 *const *clk_domains,
  u32 *const *clk_modules_explicit_en, u8 wait_for_enable)
 {
@@ -170,6 +205,23 @@ void do_enable_clocks(u32 *const *clk_domains,
};
 }
 
+void do_disable_clocks(u32 *const *clk_domains,
+   u32 *const *clk_modules_disable,
+   u8 wait_for_disable)
+{
+   u32 i, max = 100;
+
+
+   /* Clock modules that need to be put in SW_DISABLE */
+   for (i = 0; (i  max)  clk_modules_disable[i]; i++)
+   disable_clock_module(clk_modules_disable[i],
+wait_for_disable);
+
+   /* Put the clock domains in SW_SLEEP mode */
+   for (i = 0; (i  max)  clk_domains[i]; i++)
+   disable_clock_domain(clk_domains[i]);
+}
+
 /*
  * Before scaling up the clocks we need to have the PMIC scale up the
  * voltages first.  This will be dependent on which PMIC is in use
diff --git a/arch/arm/include/asm/arch-am33xx/clock.h 
b/arch/arm/include/asm/arch-am33xx/clock.h
index 4af6b57e42f5..a6d2419fb843 100644
--- a/arch/arm/include/asm/arch-am33xx/clock.h
+++ b/arch/arm/include/asm/arch-am33xx/clock.h
@@ -112,5 +112,6 @@ void do_setup_dpll(const struct dpll_regs *, const struct 
dpll_params *);
 void prcm_init(void);
 void enable_basic_clocks(void);
 void do_enable_clocks(u32 *const *, u32 *const *, u8);
+void do_disable_clocks(u32 *const *, u32 *const *, u8);
 
 #endif
-- 
2.5.0

___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot