Re: [U-Boot] CONFIG_ARMV7_NONSEC on altera soc (alignment issues ?)

2014-04-07 Thread Tim Sander
Hi Albert
> > I am currently trying to configure either Altera Soc and Xilinx Zynq to
> > boot Linux in nonsecure-mode. This mail focusses on the Altera SOC.
> > 
> > As soon as the u-boot switched to normal mode it seems there is a problem
> > with code alignment handling? At least it seems the code which is running
> > beforehand stops working in normal mode and stops in either data_abort or
> > prefetch handler. It stopps working when it hits the call to
> > stdio_devices[file]->puts(s); in console_puts (console.c:255).
> > 
> > print *stdio_devices[file]
> > $2 = {flags = 16978471, ext = 16978464,
> > name = "$\022\003\001\202\022\003\001\360\031\003\001\020\060\220",
> > ,> 
> >   start = 0xe92d4070, stop = 0xe2806010, putc = 0xe1530006, puts =
> >   0xe1a04000, tstc = 0xe1a05001, getc = 0xe5810024, priv = 0x1a07,
> >   list = { next = 0xe5831004, prev = 0xe5813000}}> 
> > As there are unaligned addresses (putc?) in these function calls i have
> > the impression that this is not working in normal mode but in secure
> > mode.
> > 
> > Unfortunatly i was not able to get the mainline u-boot to boot on the
> > altera soc so i patched the altera release:
> > git://git.rocketboards.org/u-boot-socfpga.git
> > with the 1740999a39ea4217bf926002d10869c0d925a5dc aka
> > socfpga_v2013.01.01-rel branch.
> > 
> > As the altera u-boot release socfpga_v2013.01.01-rel is to old to have the
> > CONFIG_ARMV7_NONSEC patches i cherry-picked the following patches:
> > d4296887544ddf95808bfb62f312008f519efb7bextend non-secure switch to also
> > go into HYP mode ba6a1698116da272f14c53a3ae41467cb7fc4372   add SMP
> > support for non-secure switch bb975455650b1f36681de31a93ffe54952ed3a6b
> > trigger non-secure state switch during bootm execution
> > 1ef923851ab8ffcc4265fd991815b88d9c1f12d7add C function to switch to
> > non-secure state 16212b594f385bd594d5d316bf11b13c1186e3d7   add assembly
> > routine to switch to non-secure state
> > 45b940d6f9a9d4989452ea67480e299bfa51ee19add secure monitor handler to
> > switch to non-secure state d75ba503a972df09784f1a332ba356ef8b42a0a6 
ARM:
> > prepare armv7.h to be included from assembly source
> > 
> > I also applied the attached hacked together patches to get the system
> > running and fix up the stack pointer in normal mode as it pointed to 0.
> > 
> > Best regards
> > Tim
> 
> So this is not a patch for mainline U-Boot, right?
Unfortunatly not. The altera branch is from an older version and i had 
problems booting mainline. So i went the other way round and used the altera 
git release and cherry picked the patches of which i thought that would be 
needed for switching to normal world. This works but as soon as i print out 
something in u-boot ("Booting linux") or if thats commented out, booting linux
i get a access violation. So i either get in the prefetch or abort handler. As 
i don't know where the TrustZone registers are nor what they do, i have a hard 
time moving on with this. So these patches are just very experimental and got 
me as far as booting into early linux. I have the suscpicion that the serial 
port, and probably other hw is only writable from secure world so one would 
need a monitor running to have access to this hw (If it can not be switched to 
be accessible from normal world). Further with the stack pointer not set up in 
normal world i have no idea how the versatile express should work without 
setting the stack. 

Best regards
Tim
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Re: [U-Boot] CONFIG_ARMV7_NONSEC on altera soc (alignment issues ?)

2014-04-07 Thread Albert ARIBAUD
Hi Tim,

On Wed, 26 Mar 2014 15:25:33 +0100, Tim Sander 
wrote:

> Hi
> 
> I am currently trying to configure either Altera Soc and Xilinx Zynq to boot 
> Linux in nonsecure-mode.
> This mail focusses on the Altera SOC.
> 
> As soon as the u-boot switched to normal mode it seems there is a problem 
> with code alignment handling? 
> At least it seems the code which is running beforehand stops working in 
> normal mode and stops in either
> data_abort or prefetch handler. It stopps working when it hits the call to
> stdio_devices[file]->puts(s); in console_puts (console.c:255).
> 
> print *stdio_devices[file]
> $2 = {flags = 16978471, ext = 16978464, 
> name = "$\022\003\001\202\022\003\001\360\031\003\001\020\060\220", 
> , 
>   start = 0xe92d4070, stop = 0xe2806010, putc = 0xe1530006, puts = 
> 0xe1a04000, tstc = 0xe1a05001, 
>   getc = 0xe5810024, priv = 0x1a07, list = { next = 0xe5831004, prev = 
> 0xe5813000}}
> 
> As there are unaligned addresses (putc?) in these function calls i have the 
> impression that this is not working in
> normal mode but in secure mode.
> 
> Unfortunatly i was not able to get the mainline u-boot to boot on the altera 
> soc so i patched the altera release:
> git://git.rocketboards.org/u-boot-socfpga.git
> with the 1740999a39ea4217bf926002d10869c0d925a5dc aka socfpga_v2013.01.01-rel 
> branch.
> 
> As the altera u-boot release socfpga_v2013.01.01-rel is to old to have the 
> CONFIG_ARMV7_NONSEC patches
> i cherry-picked the following patches:
> d4296887544ddf95808bfb62f312008f519efb7b  extend non-secure switch to 
> also go into HYP mode
> ba6a1698116da272f14c53a3ae41467cb7fc4372  add SMP support for non-secure 
> switch
> bb975455650b1f36681de31a93ffe54952ed3a6b  trigger non-secure state switch 
> during bootm execution
> 1ef923851ab8ffcc4265fd991815b88d9c1f12d7  add C function to switch to 
> non-secure state
> 16212b594f385bd594d5d316bf11b13c1186e3d7  add assembly routine to switch 
> to non-secure state
> 45b940d6f9a9d4989452ea67480e299bfa51ee19  add secure monitor handler to 
> switch to non-secure state
> d75ba503a972df09784f1a332ba356ef8b42a0a6  ARM: prepare armv7.h to be 
> included from assembly source
> 
> I also applied the attached hacked together patches to get the system running 
> and fix up the stack pointer in 
> normal mode as it pointed to 0. 
> 
> Best regards
> Tim

So this is not a patch for mainline U-Boot, right?

Amicalement,
-- 
Albert.
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[U-Boot] CONFIG_ARMV7_NONSEC on altera soc (alignment issues ?)

2014-03-26 Thread Tim Sander
Hi

I am currently trying to configure either Altera Soc and Xilinx Zynq to boot 
Linux in nonsecure-mode.
This mail focusses on the Altera SOC.

As soon as the u-boot switched to normal mode it seems there is a problem with 
code alignment handling? 
At least it seems the code which is running beforehand stops working in normal 
mode and stops in either
data_abort or prefetch handler. It stopps working when it hits the call to
stdio_devices[file]->puts(s); in console_puts (console.c:255).

print *stdio_devices[file]
$2 = {flags = 16978471, ext = 16978464, 
name = "$\022\003\001\202\022\003\001\360\031\003\001\020\060\220", , 
  start = 0xe92d4070, stop = 0xe2806010, putc = 0xe1530006, puts = 0xe1a04000, 
tstc = 0xe1a05001, 
  getc = 0xe5810024, priv = 0x1a07, list = { next = 0xe5831004, prev = 
0xe5813000}}

As there are unaligned addresses (putc?) in these function calls i have the 
impression that this is not working in
normal mode but in secure mode.

Unfortunatly i was not able to get the mainline u-boot to boot on the altera 
soc so i patched the altera release:
git://git.rocketboards.org/u-boot-socfpga.git
with the 1740999a39ea4217bf926002d10869c0d925a5dc aka socfpga_v2013.01.01-rel 
branch.

As the altera u-boot release socfpga_v2013.01.01-rel is to old to have the 
CONFIG_ARMV7_NONSEC patches
i cherry-picked the following patches:
d4296887544ddf95808bfb62f312008f519efb7bextend non-secure switch to 
also go into HYP mode
ba6a1698116da272f14c53a3ae41467cb7fc4372add SMP support for non-secure 
switch
bb975455650b1f36681de31a93ffe54952ed3a6btrigger non-secure state switch 
during bootm execution
1ef923851ab8ffcc4265fd991815b88d9c1f12d7add C function to switch to 
non-secure state
16212b594f385bd594d5d316bf11b13c1186e3d7add assembly routine to switch 
to non-secure state
45b940d6f9a9d4989452ea67480e299bfa51ee19add secure monitor handler to 
switch to non-secure state
d75ba503a972df09784f1a332ba356ef8b42a0a6ARM: prepare armv7.h to be 
included from assembly source

I also applied the attached hacked together patches to get the system running 
and fix up the stack pointer in 
normal mode as it pointed to 0. 

Best regards
Tim>From ada1a10d612d8f123ff63b17a7b4e5d586a9a43a Mon Sep 17 00:00:00 2001
From: Tim Sander 
Date: Mon, 24 Mar 2014 15:12:47 +0100
Subject: [PATCH 1/3] CONFIG_ARMV7_NONSEC compile fixes

---
 arch/arm/cpu/u-boot.lds   |1 +
 board/altera/socfpga/socfpga_common.c |   16 
 include/configs/socfpga_cyclone5.h|4 
 3 files changed, 21 insertions(+)

diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
index e6b202b..1ea1ac2 100644
--- a/arch/arm/cpu/u-boot.lds
+++ b/arch/arm/cpu/u-boot.lds
@@ -88,6 +88,7 @@ SECTIONS
 		__bss_end__ = .;
 	}
 
+	.rel.plt : { *(.rel.plt) }
 	/DISCARD/ : { *(.dynstr*) }
 	/DISCARD/ : { *(.dynamic*) }
 	/DISCARD/ : { *(.plt*) }
diff --git a/board/altera/socfpga/socfpga_common.c b/board/altera/socfpga/socfpga_common.c
index 5e459bb..8f6d215 100644
--- a/board/altera/socfpga/socfpga_common.c
+++ b/board/altera/socfpga/socfpga_common.c
@@ -81,4 +81,20 @@ int designware_board_phy_init(struct eth_device *dev, int phy_addr,
 	}
 	return 0;
 }
+
+#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
+/* Setting the address at which secondary cores start from.
+ * Versatile Express uses one address for all cores, so ignore corenr
+ */
+void smp_set_core_boot_addr(unsigned long addr, int corenr)
+{
+/* The SYSFLAGS register on VExpress needs to be cleared first
+ * by writing to the next address, since any writes to the address
+ * at offset 0 will only be ORed in
+ */
+writel(~0, CONFIG_SYSFLAGS_ADDR + 4);
+writel(addr, CONFIG_SYSFLAGS_ADDR);
+}
+#endif
+
 #endif
diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h
index 106c52c..a2b8b3b 100644
--- a/include/configs/socfpga_cyclone5.h
+++ b/include/configs/socfpga_cyclone5.h
@@ -35,4 +35,8 @@
 #define CONFIG_EPHY_PHY_ADDR		CONFIG_EPHY1_PHY_ADDR
 #define CONFIG_PHY_INTERFACE_MODE	SOCFPGA_PHYSEL_ENUM_RGMII
 
+#define CONFIG_ARMV7_NONSEC
+#define CONFIG_SYSFLAGS_ADDR0x1c010030
+#define CONFIG_SMP_PEN_ADDR CONFIG_SYSFLAGS_ADDR
+
 #endif	/* __CONFIG_H */
-- 
1.7.9.5

>From 7ead8c23659ad64dfdf54994f0e1c9f6e376b6aa Mon Sep 17 00:00:00 2001
From: Tim Sander 
Date: Wed, 26 Mar 2014 13:37:17 +0100
Subject: [PATCH 2/3] restore stack pointer in normal mode, remove prints in
 u-boot final stage, add GIC_BASE_ADDRESS

---
 arch/arm/cpu/armv7/nonsec_virt.S   |5 +
 arch/arm/cpu/armv7/virt-v7.c   |   18 +++---
 arch/arm/include/asm/armv7.h   |7 ---
 arch/arm/lib/bootm.c   |2 +-
 common/bootstage.c |3 +++
 include/configs/socfpga_common.h   |2 ++
 include/configs/socfpga_cyclone5.h |1 +
 7 files changed, 31 insertions(+), 7 deletions(-)

diff --git a/arch/arm/cpu/armv7/nonsec_vi