Re: [U-Boot] MMC boot / mvebu / clearfog

[Christoph Egger]

Hi!

Christoph Egger  writes:
> Indeeed, the following patch fixes MMC booting for me (and most
> certainly breaks SD card booting)

It actually seems to be somewhat more difficult. It worked because I had
a old u-boot image at mmcblk0 at offset 1 block and a new u-boot at
mmcblk0boot0. (old ~ before removing the +1). I guess u-boot gets loaded
from the mmc0boot0 device (which is also where the SPL is from) and as
soon as the post-SPL u-boot tries to access it's own bytes it falls over
to mmcblk0.

I have a working setup by

  dd if=u-boot-spl.kwb of=/dev/mmcblk0boot0 bs=512
  dd if=u-boot-spl.kwb of=/dev/mmcblk0  bs=512 seek=1 skip=1

(skipping the first sector to keep the MBR alive and assuming it only
contains SPL code anyway)

  Christoph

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Re: [U-Boot] MMC boot / mvebu / clearfog

[Christoph Egger]

Hi!

Christoph Egger  writes:
> hdr read sector 141, count=1

Looking at the binary it seems to have the expected magic at sector 140
== 0x28000 and the "wrong magic" at sector 141 == 0x28200 indeed. I
guess this comes from SD cards where the kwb blob is written with 1
sector offset while on eMMC it has to be written directly to the start
of the mmc device.

  Christoph

[0] 
http://wiki.solid-run.com/doku.php?id=products:a38x:software:development:u-boot
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Re: [U-Boot] MMC boot / mvebu / clearfog

[Christoph Egger]

Hi!

Christoph Egger  writes:
> Christoph Egger  writes:
>> hdr read sector 141, count=1
>
> Looking at the binary it seems to have the expected magic at sector 140
> == 0x28000 and the "wrong magic" at sector 141 == 0x28200 indeed. I
> guess this comes from SD cards where the kwb blob is written with 1
> sector offset while on eMMC it has to be written directly to the start
> of the mmc device.

Indeeed, the following patch fixes MMC booting for me (and most
certainly breaks SD card booting)

  Christoph

diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h
index 6cbdee2..5e049bd 100644
--- a/include/configs/clearfog.h
+++ b/include/configs/clearfog.h
@@ -143,8 +143,7 @@
 #define CONFIG_SPL_LIBDISK_SUPPORT
 #define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10)
 #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
((CONFIG_SYS_U_BOOT_OFFS / 512)\
-+ 1)
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR(CONFIG_SYS_U_BOOT_OFFS 
/ 512)
 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS ((512 << 10) / 512) /* 512KiB */
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER  0x0018  /* in SDRAM */


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[U-Boot] MMC boot / mvebu / clearfog

[Christoph Egger]

Hi!

  MMC boot on the ClearFog (base) still seems to fail (uart boot works
fine apart from uart detection). The SPL seems to finish successfully
and jump to u-boot but there is no further output then. I'm trying to
enable even more `DEBUG` but help is indeed welcome!

Regards

  Christoph

=
spl_init()

U-Boot SPL 2016.09-dirty (Oct 02 2016 - 22:04:41)
High speed PHY - Version: 2.0
Detected Device ID 6828
board SerDes lanes topology details:
 | Lane #  | Speed |  Type   |
 
 |   0|  3   |  SATA0   |
 |   1|  0   |  SGMII1  |
 |   2|  5   |  PCIe1   |
 |   3|  5   |  USB3 HOST1  |
 |   4|  5   |  PCIe2   |
 |   5|  0   |  SGMII2  |
 
PCIe, Idx 1: detected no link
PCIe, Idx 2: detected no link
High speed PHY - Ended Successfully
DDR3 Training Sequence - Ver TIP-1.29.0
DDR3 Training Sequence - Switching XBAR Window to FastPath Window
DDR3 Training Sequence - Ended Successfully
BOOTROM_REG=0xe7001000 boot_device=0xe
SAR_REG=0xdb00331e boot_device=0x31
>>spl:board_init_r()
BOOTROM_REG=0xe7001000 boot_device=0xe
SAR_REG=0xdb00331e boot_device=0x31
Trying to boot from MMC1
sdhci_transfer_data: Error detected in status(0x408000)!
spl: mmc boot mode: raw
hdr read sector 141, count=1
mkimage signature not found - ih_magic = e1ad
read 190 sectors to 80
Jumping to U-Boot
SPL malloc() used 0x394 bytes (0 KB)
loaded - jumping to U-Boot...image entry point: 0x80

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