[U-Boot] SPL on ZynqMP ZCU102 evaluation board
Hi all I'm working with zynqmp evalutation board (zcu102 revB) and currently I rely on FSBL generated by petalinux and I'm thinking of dropping it ans using u-boot's SPL. I have spent some time trying to configure and use SPL, but I've stuck on booting up the board. I've prepared SD card as described here: http://lists.denx.de/pipermail/u-boot/2016-May/254902.html Boot process has end with following message: Debug uart enabled U-Boot SPL 2016.07-rc3 (Jul 11 2016 - 13:13:28) EL Level: EL3 Trying to boot from MMC1 reading u-boot.bin "Synchronous Abort" handler, esr 0x9610 ELR: fffc65d8 LR: fffc6530 x0 : 00010eb0 x1 : 8181 x2 : 8ce8 x3 : 7ff0 x4 : x5 : x6 : 7d18 x7 : 000f x8 : 7b80 x9 : 0080 x10: 73f3 x11: x12: x13: x14: 7d6c x15: fffd34b0 x16: 66540500c006 x17: d800b24018c0082c x18: 7e80 x19: 0058 x20: 8d30 x21: 8d30 x22: 0210 x23: 0200 x24: 7d18 x25: fffcf000 x26: fffd9b40 x27: 0001 x28: 8521b220c0c38d88 x29: 7200 Resetting CPU ... resetting ... I use u-boot 2016.07-rc3 with psu_init_gpl, which is also used in FSBL (and FSBL boot up board correctly). I suppose that the loading u-boot.bin to the RAM fails, because DDR controller is not initialized correctly. Probably I've forgotten enable something in .config, but I do not have idea what. Could somebody help me with this issue? If I forgot to add some information, please inform me. BR, Adam Oleksy ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] SPL on ZynqMP ZCU102 evaluation board
Hi all I'm working with zynqmp evalutation board (zcu102 revB) and currently I rely on FSBL generated by petalinux and I'm thinking of dropping it ans using u-boot's SPL. I have spent some time trying to configure and use SPL, but I've stuck on booting up the board. I've prepared SD card as described here: http://lists.denx.de/pipermail/u-boot/2016-May/254902.html Boot process has end with following message: Debug uart enabled U-Boot SPL 2016.07-rc3 (Jul 11 2016 - 13:13:28) EL Level: EL3 Trying to boot from MMC1 reading u-boot.bin "Synchronous Abort" handler, esr 0x9610 ELR: fffc65d8 LR: fffc6530 x0 : 00010eb0 x1 : 8181 x2 : 8ce8 x3 : 7ff0 x4 : x5 : x6 : 7d18 x7 : 000f x8 : 7b80 x9 : 0080 x10: 73f3 x11: x12: x13: x14: 7d6c x15: fffd34b0 x16: 66540500c006 x17: d800b24018c0082c x18: 7e80 x19: 0058 x20: 8d30 x21: 8d30 x22: 0210 x23: 0200 x24: 7d18 x25: fffcf000 x26: fffd9b40 x27: 0001 x28: 8521b220c0c38d88 x29: 7200 Resetting CPU ... resetting ... I use u-boot 2016.07-rc3 with psu_init_gpl, which is also used in FSBL. I suppose that the loading u-boot.bin to the RAM fails, because DDR controller is not initialized correctly (I can be wrong:). Probably I've forgotten enable something in .config, but I do not have idea what. Could somebody help me with this issue? If I forgot to add some information, please inform me. BR, Adam Oleksy ATT78522.config Description: ATT78522.config ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
