RE: [v6 10/18] net: designware: socfpga: Add ATF support for MAC driver

[Tan, Ley Foon]

> -Original Message-
> From: Lim, Elly Siew Chin 
> Sent: Wednesday, December 23, 2020 10:56 PM
> To: u-boot@lists.denx.de
> Cc: Marek Vasut ; Tan, Ley Foon
> ; See, Chin Liang ;
> Simon Goldschmidt ; Chee, Tien Fong
> ; Westergreen, Dalon
> ; Simon Glass ; Gan,
> Yau Wai ; Ang, Chee Hong
> ; Lim, Elly Siew Chin
> 
> Subject: [v6 10/18] net: designware: socfpga: Add ATF support for MAC
> driver
> 
> From: Chee Hong Ang 
> 
> In non-secure mode (EL2), MAC driver calls the SMC/PSCI services provided
> by ATF to setup the PHY interface.
> 
> Signed-off-by: Chee Hong Ang 
> Signed-off-by: Siew Chin Lim 
> 
> ---
> v5
> ---
> Call secure register access helper function to write the secure register.
> Return error if fail to write the PHY related secure register.
> 
> ---
> v6
> ---
> Clean up the code and use socfpga_secure_reg_update32 to update PHY
> related secure registers.

Reviewed-by: Ley Foon Tan 

[v6 10/18] net: designware: socfpga: Add ATF support for MAC driver

[Siew Chin Lim]

From: Chee Hong Ang 

In non-secure mode (EL2), MAC driver calls the SMC/PSCI services
provided by ATF to setup the PHY interface.

Signed-off-by: Chee Hong Ang 
Signed-off-by: Siew Chin Lim 

---
v5
---
Call secure register access helper function to write the secure register.
Return error if fail to write the PHY related secure register.

---
v6
---
Clean up the code and use socfpga_secure_reg_update32 to update
PHY related secure registers.
---
 drivers/net/dwmac_socfpga.c | 37 +++--
 1 file changed, 31 insertions(+), 6 deletions(-)

diff --git a/drivers/net/dwmac_socfpga.c b/drivers/net/dwmac_socfpga.c
index e93561dffa..26f647c778 100644
--- a/drivers/net/dwmac_socfpga.c
+++ b/drivers/net/dwmac_socfpga.c
@@ -6,6 +6,8 @@
  */
 
 #include 
+#include 
+#include 
 #include 
 #include 
 #include 
@@ -17,8 +19,6 @@
 #include 
 #include 
 
-#include 
-
 struct dwmac_socfpga_platdata {
struct dw_eth_pdata dw_eth_pdata;
void*phy_intf;
@@ -64,6 +64,32 @@ static int dwmac_socfpga_ofdata_to_platdata(struct udevice 
*dev)
return designware_eth_ofdata_to_platdata(dev);
 }
 
+static int dwmac_socfpga_do_setphy(struct udevice *dev, u32 modereg)
+{
+   struct dwmac_socfpga_platdata *pdata = dev_get_platdata(dev);
+   u32 modemask = SYSMGR_EMACGRP_CTRL_PHYSEL_MASK << pdata->reg_shift;
+
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_ATF)
+   u32 index = ((u64)pdata->phy_intf - socfpga_get_sysmgr_addr() -
+SYSMGR_SOC64_EMAC0) >> 2;
+
+   u32 id = SOCFPGA_SECURE_REG_SYSMGR_SOC64_EMAC0 + index;
+
+   int ret = socfpga_secure_reg_update32(id,
+modemask,
+modereg << pdata->reg_shift);
+   if (ret) {
+   dev_err(dev, "Failed to set PHY register via SMC call\n");
+   return ret;
+   }
+#else
+   clrsetbits_le32(pdata->phy_intf, modemask,
+   modereg << pdata->reg_shift);
+#endif
+
+   return 0;
+}
+
 static int dwmac_socfpga_probe(struct udevice *dev)
 {
struct dwmac_socfpga_platdata *pdata = dev_get_platdata(dev);
@@ -71,7 +97,6 @@ static int dwmac_socfpga_probe(struct udevice *dev)
struct reset_ctl_bulk reset_bulk;
int ret;
u32 modereg;
-   u32 modemask;
 
switch (edata->phy_interface) {
case PHY_INTERFACE_MODE_MII:
@@ -97,9 +122,9 @@ static int dwmac_socfpga_probe(struct udevice *dev)
 
reset_assert_bulk(_bulk);
 
-   modemask = SYSMGR_EMACGRP_CTRL_PHYSEL_MASK << pdata->reg_shift;
-   clrsetbits_le32(pdata->phy_intf, modemask,
-   modereg << pdata->reg_shift);
+   ret = dwmac_socfpga_do_setphy(dev, modereg);
+   if (ret)
+   return ret;
 
reset_release_bulk(_bulk);
 
-- 
2.13.0