Re: [PATCH v2 8/9] spi: bcmbca-hsspi: Add driver for newer HSSPI controller

2023-06-02 Thread William Zhang

Hi Jagan,

On 06/01/2023 10:54 PM, Jagan Teki wrote:

On Wed, May 3, 2023 at 12:29 AM William Zhang
 wrote:


The newer BCMBCA SoCs such as BCM6756, BCM4912 and BCM6855 include an
updated SPI controller that add the capability to allow the driver to
control chip select explicitly. Driver can control and keep cs low
between the transfers natively. Hence the dummy cs workaround or prepend
mode found in the bcm63xx-hsspi driver are no longer needed and this new
driver is much cleaner.

Port from linux patch:
Link: 
https://lore.kernel.org/r/20230209200246.141520-15-william.zh...@broadcom.com

Signed-off-by: William Zhang 
---

Changes in v2: None

  arch/arm/mach-bcmbca/Kconfig |  15 ++


Exclude this from spi driver patch. Driver has to be a separate patch.


Sure


  drivers/spi/Kconfig  |   9 +
  drivers/spi/Makefile |   1 +
  drivers/spi/bcmbca_hsspi.c   | 414 +++
  4 files changed, 439 insertions(+)
  create mode 100644 drivers/spi/bcmbca_hsspi.c

diff --git a/arch/arm/mach-bcmbca/Kconfig b/arch/arm/mach-bcmbca/Kconfig
index 6441ed5929d2..60b36c4bb0f6 100644
--- a/arch/arm/mach-bcmbca/Kconfig
+++ b/arch/arm/mach-bcmbca/Kconfig
@@ -27,6 +27,7 @@ config BCM4912
 select SYS_ARCH_TIMER
 select DM_SERIAL
 select PL01X_SERIAL
+   select BCMBCA_HSSPI

  config BCM63138
 bool "Support for Broadcom 63138 Family"
@@ -75,6 +76,7 @@ config BCM6756
 select CPU_V7A
 select DM_SERIAL
 select PL01X_SERIAL
+   select BCMBCA_HSSPI

  config BCM6813
 bool "Support for Broadcom 6813 Family"
@@ -82,6 +84,7 @@ config BCM6813
 select SYS_ARCH_TIMER
 select DM_SERIAL
 select PL01X_SERIAL
+   select BCMBCA_HSSPI

  config BCM6846
 bool "Support for Broadcom 6846 Family"
@@ -97,6 +100,7 @@ config BCM6855
 select CPU_V7A
 select DM_SERIAL
 select PL01X_SERIAL
+   select BCMBCA_HSSPI
 help
   Broadcom BCM6855 is a triple core Cortex A7 based xPON Gateway
   SoC. This SoC family includes BCM6855x, BCM68252 and BCM6753.
@@ -131,6 +135,17 @@ config BCM6878
 select PL01X_SERIAL
 select BCM63XX_HSSPI

+config HAVE_SPI_CS_CTRL
+   bool "SoC supports SPI chip select control"
+   default y if BCM4912
+   default y if BCM6756
+   default y if BCM6855
+   default y if BCM6813


Use ||

Will update




+   default n
+   help
+ Enable this option if SoC supports SPI chip select control explicitly
+ through software.
+
  source "arch/arm/mach-bcmbca/bcm47622/Kconfig"
  source "arch/arm/mach-bcmbca/bcm4908/Kconfig"
  source "arch/arm/mach-bcmbca/bcm4912/Kconfig"
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 47a261f1e1b8..6b26915f9bb2 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -107,6 +107,15 @@ config BCM63XX_HSSPI
   access the SPI NOR flash on platforms embedding this Broadcom
   SPI core.

+config BCMBCA_HSSPI
+   bool "BCMBCA HSSPI driver"
+   depends on ARCH_BCMBCA && HAVE_SPI_CS_CTRL
+   help
+ This enables support for the High Speed SPI controller present on
+ newer Broadcom BCMBCA SoCs. These SoCs include an updated SPI 
controller
+ that adds the capability to allow the driver to control chip select
+ explicitly.
+
  config BCM63XX_SPI
 bool "BCM6348 SPI driver"
 depends on ARCH_BMIPS
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 95dba9ac4559..c27b3327c337 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -25,6 +25,7 @@ obj-$(CONFIG_ATH79_SPI) += ath79_spi.o
  obj-$(CONFIG_ATMEL_QSPI) += atmel-quadspi.o
  obj-$(CONFIG_ATMEL_SPI) += atmel_spi.o
  obj-$(CONFIG_BCM63XX_HSSPI) += bcm63xx_hsspi.o
+obj-$(CONFIG_BCMBCA_HSSPI) += bcmbca_hsspi.o
  obj-$(CONFIG_BCM63XX_SPI) += bcm63xx_spi.o
  obj-$(CONFIG_BCMSTB_SPI) += bcmstb_spi.o
  obj-$(CONFIG_CF_SPI) += cf_spi.o
diff --git a/drivers/spi/bcmbca_hsspi.c b/drivers/spi/bcmbca_hsspi.c
new file mode 100644
index ..fbe315a7d45d
--- /dev/null
+++ b/drivers/spi/bcmbca_hsspi.c
@@ -0,0 +1,414 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas 
+ *
+ * Derived from linux/drivers/spi/spi-bcm63xx-hsspi.c:
+ * Copyright (C) 2000-2010 Broadcom Corporation
+ * Copyright (C) 2012-2013 Jonas Gorski 
+ * Copyright (C) 2021 Broadcom Ltd
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define HSSPI_PP   0
+
+#define SPI_MAX_SYNC_CLOCK 3000


What is this clock? spi-max-frequency ? if yes pick it from DT.

Not spi-max-frequency. This is the controller internal setting that 
determines if controller works in sync or async mode when clock is below 
or above this frequency.



+
+/* SPI Control register */
+#define SPI_CTL_REG0x000
+#define 

Re: [PATCH v2 8/9] spi: bcmbca-hsspi: Add driver for newer HSSPI controller

2023-06-01 Thread Jagan Teki
On Wed, May 3, 2023 at 12:29 AM William Zhang
 wrote:
>
> The newer BCMBCA SoCs such as BCM6756, BCM4912 and BCM6855 include an
> updated SPI controller that add the capability to allow the driver to
> control chip select explicitly. Driver can control and keep cs low
> between the transfers natively. Hence the dummy cs workaround or prepend
> mode found in the bcm63xx-hsspi driver are no longer needed and this new
> driver is much cleaner.
>
> Port from linux patch:
> Link: 
> https://lore.kernel.org/r/20230209200246.141520-15-william.zh...@broadcom.com
>
> Signed-off-by: William Zhang 
> ---
>
> Changes in v2: None
>
>  arch/arm/mach-bcmbca/Kconfig |  15 ++

Exclude this from spi driver patch. Driver has to be a separate patch.

>  drivers/spi/Kconfig  |   9 +
>  drivers/spi/Makefile |   1 +
>  drivers/spi/bcmbca_hsspi.c   | 414 +++
>  4 files changed, 439 insertions(+)
>  create mode 100644 drivers/spi/bcmbca_hsspi.c
>
> diff --git a/arch/arm/mach-bcmbca/Kconfig b/arch/arm/mach-bcmbca/Kconfig
> index 6441ed5929d2..60b36c4bb0f6 100644
> --- a/arch/arm/mach-bcmbca/Kconfig
> +++ b/arch/arm/mach-bcmbca/Kconfig
> @@ -27,6 +27,7 @@ config BCM4912
> select SYS_ARCH_TIMER
> select DM_SERIAL
> select PL01X_SERIAL
> +   select BCMBCA_HSSPI
>
>  config BCM63138
> bool "Support for Broadcom 63138 Family"
> @@ -75,6 +76,7 @@ config BCM6756
> select CPU_V7A
> select DM_SERIAL
> select PL01X_SERIAL
> +   select BCMBCA_HSSPI
>
>  config BCM6813
> bool "Support for Broadcom 6813 Family"
> @@ -82,6 +84,7 @@ config BCM6813
> select SYS_ARCH_TIMER
> select DM_SERIAL
> select PL01X_SERIAL
> +   select BCMBCA_HSSPI
>
>  config BCM6846
> bool "Support for Broadcom 6846 Family"
> @@ -97,6 +100,7 @@ config BCM6855
> select CPU_V7A
> select DM_SERIAL
> select PL01X_SERIAL
> +   select BCMBCA_HSSPI
> help
>   Broadcom BCM6855 is a triple core Cortex A7 based xPON Gateway
>   SoC. This SoC family includes BCM6855x, BCM68252 and BCM6753.
> @@ -131,6 +135,17 @@ config BCM6878
> select PL01X_SERIAL
> select BCM63XX_HSSPI
>
> +config HAVE_SPI_CS_CTRL
> +   bool "SoC supports SPI chip select control"
> +   default y if BCM4912
> +   default y if BCM6756
> +   default y if BCM6855
> +   default y if BCM6813

Use ||

> +   default n
> +   help
> + Enable this option if SoC supports SPI chip select control 
> explicitly
> + through software.
> +
>  source "arch/arm/mach-bcmbca/bcm47622/Kconfig"
>  source "arch/arm/mach-bcmbca/bcm4908/Kconfig"
>  source "arch/arm/mach-bcmbca/bcm4912/Kconfig"
> diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
> index 47a261f1e1b8..6b26915f9bb2 100644
> --- a/drivers/spi/Kconfig
> +++ b/drivers/spi/Kconfig
> @@ -107,6 +107,15 @@ config BCM63XX_HSSPI
>   access the SPI NOR flash on platforms embedding this Broadcom
>   SPI core.
>
> +config BCMBCA_HSSPI
> +   bool "BCMBCA HSSPI driver"
> +   depends on ARCH_BCMBCA && HAVE_SPI_CS_CTRL
> +   help
> + This enables support for the High Speed SPI controller present on
> + newer Broadcom BCMBCA SoCs. These SoCs include an updated SPI 
> controller
> + that adds the capability to allow the driver to control chip select
> + explicitly.
> +
>  config BCM63XX_SPI
> bool "BCM6348 SPI driver"
> depends on ARCH_BMIPS
> diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
> index 95dba9ac4559..c27b3327c337 100644
> --- a/drivers/spi/Makefile
> +++ b/drivers/spi/Makefile
> @@ -25,6 +25,7 @@ obj-$(CONFIG_ATH79_SPI) += ath79_spi.o
>  obj-$(CONFIG_ATMEL_QSPI) += atmel-quadspi.o
>  obj-$(CONFIG_ATMEL_SPI) += atmel_spi.o
>  obj-$(CONFIG_BCM63XX_HSSPI) += bcm63xx_hsspi.o
> +obj-$(CONFIG_BCMBCA_HSSPI) += bcmbca_hsspi.o
>  obj-$(CONFIG_BCM63XX_SPI) += bcm63xx_spi.o
>  obj-$(CONFIG_BCMSTB_SPI) += bcmstb_spi.o
>  obj-$(CONFIG_CF_SPI) += cf_spi.o
> diff --git a/drivers/spi/bcmbca_hsspi.c b/drivers/spi/bcmbca_hsspi.c
> new file mode 100644
> index ..fbe315a7d45d
> --- /dev/null
> +++ b/drivers/spi/bcmbca_hsspi.c
> @@ -0,0 +1,414 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2017 Álvaro Fernández Rojas 
> + *
> + * Derived from linux/drivers/spi/spi-bcm63xx-hsspi.c:
> + * Copyright (C) 2000-2010 Broadcom Corporation
> + * Copyright (C) 2012-2013 Jonas Gorski 
> + * Copyright (C) 2021 Broadcom Ltd
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#define HSSPI_PP   0
> +
> +#define SPI_MAX_SYNC_CLOCK 3000

What is this clock? spi-max-frequency ? if yes pick it from DT.

> +
> +/* SPI Control register */
> +#define SPI_CTL_REG0x000
> +#define SPI_CTL_CS_POL_SHIFT