Re: [U-Boot] [PATCH 1/2 RFT] sunxi: power: Add AXP806 and AXP808 support
On Mon, Feb 27, 2017 at 11:26:33AM +0800, Chen-Yu Tsai wrote: > On Mon, Feb 27, 2017 at 3:01 AM, Rask Ingemann Lambertsen >wrote: > > An X-Powers AXP806 or AXP808 PMIC is usually found on boards using the > > Allwinner A80 ARM SoC. This patch adds support for the PMIC's regulators > > and sets up the runtime address and master/slave mode in pmic_bus_init(). > > > > AXP806/AXP808 support is enabled by default on all MACH_SUN9I boards. > > > > Because there are boards with both an AXP806 and an AXP809, > > drivers/power/Kconfig and arch/arm/mach-sunxi/pmic_bus.c are changed to > > make it possible to have more than one PMIC enabled at a time. > > > > Signed-off-by: Rask Ingemann Lambertsen > > --- > > This patch needs to be tested on the following boards which I don't have: > > Cubietech Cubieboard4 > > Merrii A80 Optimus [...] > > diff --git a/arch/arm/mach-sunxi/pmic_bus.c b/arch/arm/mach-sunxi/pmic_bus.c > > index 7c57f02..a2da40c 100644 > > --- a/arch/arm/mach-sunxi/pmic_bus.c > > +++ b/arch/arm/mach-sunxi/pmic_bus.c [...] > > +#ifdef CONFIG_AXP806_POWER > > +int pmic2_bus_read(u8 reg, u8 *data) > > { > > - int ret; > > - u8 val; > > - > > - ret = pmic_bus_read(reg, ); > > - if (ret) > > - return ret; > > - > > - val &= ~bits; > > - return pmic_bus_write(reg, val); > > + return rsb_read(AXP806_RUNTIME_ADDR, reg, data); > > } > > + > > +int pmic2_bus_write(u8 reg, u8 data) > > +{ > > + return rsb_write(AXP806_RUNTIME_ADDR, reg, data); > > +} > > + > > +int pmic2_bus_setbits(u8 reg, u8 bits) > > +PMIC_BUS_SETBITS(pmic2_bus_read, pmic2_bus_write, reg, bits) > > + > > +int pmic2_bus_clrbits(u8 reg, u8 bits) > > +PMIC_BUS_CLRBITS(pmic2_bus_read, pmic2_bus_write, reg, bits) > > +#endif > > Please split the pmic_bus changes into separate patches, such as the > following: > > - Pull out PMIC_BUS_*. However please don't use macros. Just make some > static functions. The compiler can choose to inline them. > > - Add AXP806 support in master mode > > - Add support for second PMIC to pmic_bus > > - Add AXP806 slave mode support. OK. I'll take care to not leave a broken state between individual patches. > > diff --git a/board/sunxi/board.c b/board/sunxi/board.c > > index 5365638..7847837 100644 > > --- a/board/sunxi/board.c > > +++ b/board/sunxi/board.c > > @@ -540,6 +540,26 @@ void sunxi_board_init(void) > > power_failed |= axp_set_sw(IS_ENABLED(CONFIG_AXP_SW_ON)); > > #endif > > #endif > > +#ifdef CONFIG_AXP806_POWER > > + power_failed |= axp2_init(); > > + > > + power_failed |= axp_set_dcdca(CONFIG_AXP_DCDCA_VOLT); > > + power_failed |= axp_set_dcdcb(CONFIG_AXP_DCDCB_VOLT); > > + power_failed |= axp_set_dcdcc(CONFIG_AXP_DCDCC_VOLT); > > + power_failed |= axp_set_dcdcd(CONFIG_AXP_DCDCD_VOLT); > > + power_failed |= axp_set_dcdce(CONFIG_AXP_DCDCE_VOLT); > > + power_failed |= axp2_set_aldo(1, CONFIG_AXP2_ALDO1_VOLT); > > + power_failed |= axp2_set_aldo(2, CONFIG_AXP2_ALDO2_VOLT); > > + power_failed |= axp2_set_aldo(3, CONFIG_AXP2_ALDO3_VOLT); > > Allwinner code calls them s_aldo. OK. > > + power_failed |= axp2_set_sw(IS_ENABLED(CONFIG_AXP2_SW_ON)); > > And this s_sw. OK. > > diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig > > index f2c5629..aa32e5a 100644 > > --- a/drivers/power/Kconfig > > +++ b/drivers/power/Kconfig > > @@ -6,19 +6,18 @@ source "drivers/power/pmic/Kconfig" > > > > source "drivers/power/regulator/Kconfig" > > > > -choice > > - prompt "Select Sunxi PMIC Variant" > > - depends on ARCH_SUNXI > > - default AXP209_POWER if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I > > - default AXP221_POWER if MACH_SUN6I || MACH_SUN8I_A23 || > > MACH_SUN8I_A33 > > - default AXP818_POWER if MACH_SUN8I_A83T > > - default SUNXI_NO_PMIC if MACH_SUN8I_H3 || MACH_SUN50I > > +if ARCH_SUNXI > > + > > +comment "Select Sunxi PMIC Variant" > > Would this change break existing defconfigs? It was fine with the six or so that I checked, but that's just 0.5 % of the defconfigs. It might actually be feasible to check them all, so I'll try that. > > @@ -141,6 +164,63 @@ config AXP_DCDC5_VOLT > > On A23 / A31 / A33 / A80 / A83T boards dcdc5 is VCC-DRAM and > > should be 1.5V, 1.35V if DDR3L is used. > > > > +config AXP_DCDCA_VOLT > > + int "axp pmic dcdca voltage" > > + depends on AXP806_POWER > > + default 900 if MACH_SUN9I > > + ---help--- > > + Set the voltage (mV) to program the axp pmic dcdca at, set to 0 to > > + disable dcdca. > > + On the Cubietech Cubieboard4 and Merrii A80 Optimus boards, dcdca > > + powers the Cortex-A15 cores (VDD-CPUB) and should be 0.9 V. > > + On the Sunchip CX-A99 board, dcdca powers the Cortex-A7 cores > > + (VDD-CPUA) and should be 0.9 V at the default 1008 MHz clock > > frequency. >
Re: [U-Boot] [PATCH 1/2 RFT] sunxi: power: Add AXP806 and AXP808 support
On 02/27/2017 04:01 AM, Rask Ingemann Lambertsen wrote: > An X-Powers AXP806 or AXP808 PMIC is usually found on boards using the > Allwinner A80 ARM SoC. This patch adds support for the PMIC's regulators > and sets up the runtime address and master/slave mode in pmic_bus_init(). > > AXP806/AXP808 support is enabled by default on all MACH_SUN9I boards. > > Because there are boards with both an AXP806 and an AXP809, > drivers/power/Kconfig and arch/arm/mach-sunxi/pmic_bus.c are changed to > make it possible to have more than one PMIC enabled at a time. > > Signed-off-by: Rask Ingemann Lambertsen> --- > This patch needs to be tested on the following boards which I don't have: > Cubietech Cubieboard4 > Merrii A80 Optimus > As ChenYu, This patch need to separate to some more patches. Best Regards, Jaehoon Chung > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2 RFT] sunxi: power: Add AXP806 and AXP808 support
On Mon, Feb 27, 2017 at 3:01 AM, Rask Ingemann Lambertsenwrote: > An X-Powers AXP806 or AXP808 PMIC is usually found on boards using the > Allwinner A80 ARM SoC. This patch adds support for the PMIC's regulators > and sets up the runtime address and master/slave mode in pmic_bus_init(). > > AXP806/AXP808 support is enabled by default on all MACH_SUN9I boards. > > Because there are boards with both an AXP806 and an AXP809, > drivers/power/Kconfig and arch/arm/mach-sunxi/pmic_bus.c are changed to > make it possible to have more than one PMIC enabled at a time. > > Signed-off-by: Rask Ingemann Lambertsen > --- > This patch needs to be tested on the following boards which I don't have: > Cubietech Cubieboard4 > Merrii A80 Optimus > > arch/arm/include/asm/arch-sunxi/pmic_bus.h | 4 + > arch/arm/mach-sunxi/Makefile | 1 + > arch/arm/mach-sunxi/pmic_bus.c | 107 ++--- > board/sunxi/board.c| 20 +++ > drivers/power/Kconfig | 226 +++- > drivers/power/Makefile | 1 + > drivers/power/axp806.c | 231 > + > include/axp806.h | 50 +++ > include/axp_pmic.h | 13 ++ > 9 files changed, 623 insertions(+), 30 deletions(-) > create mode 100644 drivers/power/axp806.c > create mode 100644 include/axp806.h > > diff --git a/arch/arm/include/asm/arch-sunxi/pmic_bus.h > b/arch/arm/include/asm/arch-sunxi/pmic_bus.h > index 9c4372a..d143d54 100644 > --- a/arch/arm/include/asm/arch-sunxi/pmic_bus.h > +++ b/arch/arm/include/asm/arch-sunxi/pmic_bus.h > @@ -14,5 +14,9 @@ int pmic_bus_read(u8 reg, u8 *data); > int pmic_bus_write(u8 reg, u8 data); > int pmic_bus_setbits(u8 reg, u8 bits); > int pmic_bus_clrbits(u8 reg, u8 bits); > +int pmic2_bus_read(u8 reg, u8 *data); > +int pmic2_bus_write(u8 reg, u8 data); > +int pmic2_bus_setbits(u8 reg, u8 bits); > +int pmic2_bus_clrbits(u8 reg, u8 bits); > > #endif > diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile > index 7daba11..410fb49 100644 > --- a/arch/arm/mach-sunxi/Makefile > +++ b/arch/arm/mach-sunxi/Makefile > @@ -37,6 +37,7 @@ obj-$(CONFIG_MACH_SUN9I) += clock_sun9i.o gtbus_sun9i.o > obj-$(CONFIG_AXP152_POWER) += pmic_bus.o > obj-$(CONFIG_AXP209_POWER) += pmic_bus.o > obj-$(CONFIG_AXP221_POWER) += pmic_bus.o > +obj-$(CONFIG_AXP806_POWER) += pmic_bus.o > obj-$(CONFIG_AXP809_POWER) += pmic_bus.o > obj-$(CONFIG_AXP818_POWER) += pmic_bus.o > > diff --git a/arch/arm/mach-sunxi/pmic_bus.c b/arch/arm/mach-sunxi/pmic_bus.c > index 7c57f02..a2da40c 100644 > --- a/arch/arm/mach-sunxi/pmic_bus.c > +++ b/arch/arm/mach-sunxi/pmic_bus.c > @@ -27,6 +27,15 @@ > #define AXP223_DEVICE_ADDR 0x3a3 > #define AXP223_RUNTIME_ADDR0x2d > > +/* AXP806 and AXP808 use the same addresses. */ > +#define AXP806_DEVICE_ADDR 0x745 > +#define AXP806_RUNTIME_ADDR0x3a > + > +/* AXP806 and AXP808 address space extension. */ > +#define AXP806_REG_ADDR_EXT0xff > +#define AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE 0 > +#define AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODEBIT(4) > + > int pmic_bus_init(void) > { > /* This cannot be 0 because it is used in SPL before BSS is ready */ > @@ -36,7 +45,8 @@ int pmic_bus_init(void) > if (!needs_init) > return 0; > > -#if defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || defined > CONFIG_AXP818_POWER > +#if defined CONFIG_AXP221_POWER || defined CONFIG_AXP806_POWER || \ > + defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER > # ifdef CONFIG_MACH_SUN6I > p2wi_init(); > ret = p2wi_change_to_p2wi_mode(AXP221_CHIP_ADDR, AXP221_CTRL_ADDR, > @@ -46,16 +56,70 @@ int pmic_bus_init(void) > if (ret) > return ret; > > +# if defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || \ > + defined CONFIG_AXP818_POWER > ret = rsb_set_device_address(AXP223_DEVICE_ADDR, AXP223_RUNTIME_ADDR); > -# endif > if (ret) > return ret; > +# endif > +# ifdef CONFIG_AXP806_POWER > + ret = rsb_set_device_address(AXP806_DEVICE_ADDR, AXP806_RUNTIME_ADDR); > + if (ret) > + return ret; > +# endif > +# endif > + > +# ifdef CONFIG_AXP806_POWER > + /* > +* An AXP806 or AXP808 can be wired for either master mode or slave > +* mode. The AXP806_REG_ADDR_EXT register must be set accordingly for > +* the chip to repond to access to its other registers. > +*/ > +# ifdef CONFIG_AXP806_POWER_SLAVE_MODE > + ret = pmic2_bus_write(AXP806_REG_ADDR_EXT, > + AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE); > +# else > + ret = pmic2_bus_write(AXP806_REG_ADDR_EXT, > +