Re: [U-Boot] [PATCH v2 1/5] 85xx: add boot from NAND/eSDHC/eSPI support

2009-09-11 Thread Wolfgang Denk 
Dear Mingkai Hu,

In message 1252639077-29277-1-git-send-email-mingkai...@freescale.com you 
wrote:
 The MPC8536E is capable of booting form NAND/eSDHC/eSPI, this patch
 implements these three bootup methods in a unified way - all of these
 use the general cpu/mpc85xx/start.S, and load the main image to L2SRAM
 which lets us use the SPD to initialize the SDRAM.

...

I'm confused.

Is this v2 reposted? Or an updated version?

Could you please be so kind and always note (below the --- line)
what has changed against the previous version of the patch?

Thanks.

Best regards,

Wolfgang Denk

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Re: [U-Boot] [PATCH v2 1/5] 85xx: add boot from NAND/eSDHC/eSPI support

2009-09-11 Thread Scott Wood 
Mingkai Hu wrote:
 The MPC8536E is capable of booting form NAND/eSDHC/eSPI, this patch
 implements these three bootup methods in a unified way - all of these
 use the general cpu/mpc85xx/start.S, and load the main image to L2SRAM
 which lets us use the SPD to initialize the SDRAM.
 
 For all three bootup methods, the bootup process can be divided into two
 stages: the first stage will initialize the corresponding controller,
 configure the L2SRAM, then copy the second stage image to L2SRAM and
 jump to it. The second stage image is just like the general U-Boot image
 to configure all the hardware and boot up to U-Boot command line.
 
 When boot from NAND, the eLBC controller will first load the first stage
 image to internal 4K RAM buffer because it's also stored on the NAND
 flash. The first stage image, also call 4K NADN loader, will initialize

s/NADN/NAND/ here...

 +#ifdef CONFIG_NADN_SPL
  static void tlbsx (const volatile unsigned *addr)

And more importantly, here.

-Scott
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Re: [U-Boot] [PATCH v2 1/5] 85xx: add boot from NAND/eSDHC/eSPI support

2009-09-11 Thread Kumar Gala 

On Sep 11, 2009, at 1:06 PM, Scott Wood wrote:

 Mingkai Hu wrote:
 The MPC8536E is capable of booting form NAND/eSDHC/eSPI, this patch
 implements these three bootup methods in a unified way - all of these
 use the general cpu/mpc85xx/start.S, and load the main image to  
 L2SRAM
 which lets us use the SPD to initialize the SDRAM.

 For all three bootup methods, the bootup process can be divided  
 into two
 stages: the first stage will initialize the corresponding controller,
 configure the L2SRAM, then copy the second stage image to L2SRAM and
 jump to it. The second stage image is just like the general U-Boot  
 image
 to configure all the hardware and boot up to U-Boot command line.

 When boot from NAND, the eLBC controller will first load the first  
 stage
 image to internal 4K RAM buffer because it's also stored on the NAND
 flash. The first stage image, also call 4K NADN loader, will  
 initialize

 s/NADN/NAND/ here...

will fix this one.

 +#ifdef CONFIG_NADN_SPL
 static void tlbsx (const volatile unsigned *addr)

 And more importantly, here.

I've fixed that one.. see my latest v4 patch.

- k
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Re: [U-Boot] [PATCH v2 1/5] 85xx: add boot from NAND/eSDHC/eSPI support

2009-09-10 Thread Kumar Gala 

On Sep 10, 2009, at 9:53 PM, Mingkai Hu wrote:

 diff --git a/cpu/mpc85xx/tlb.c b/cpu/mpc85xx/tlb.c
 index 0497a29..9c7c928 100644
 --- a/cpu/mpc85xx/tlb.c
 +++ b/cpu/mpc85xx/tlb.c
 @@ -59,6 +59,7 @@ void set_tlb(u8 tlb, u32 epn, u64 rpn,
 #endif
 }

 +#ifndef CONFIG_NAND_SPL
 void disable_tlb(u8 esel)
 {
   u32 _mas0, _mas1, _mas2, _mas3, _mas7;
 @@ -83,6 +84,7 @@ void disable_tlb(u8 esel)
   addrmap_set_entry(0, 0, 0, esel);
 #endif
 }
 +#endif

 void invalidate_tlb(u8 tlb)
 {
 @@ -106,6 +108,7 @@ void init_tlbs(void)
   return ;
 }

 +#ifdef CONFIG_ADDR_MAP

why ADDR_MAP?

- k

 static void tlbsx (const volatile unsigned *addr)
 {
   __asm__ __volatile__ (tlbsx 0,%0 : : r (addr), m (*addr));
 @@ -132,6 +135,7 @@ int find_tlb_idx(void *addr, u8 tlbsel)

   return -1;
 }
 +#endif

 #ifdef CONFIG_ADDR_MAP
 void init_addr_map(void)
 @@ -168,6 +172,7 @@ void init_addr_map(void)
 }
 #endif

 +#ifndef CONFIG_NAND_SPL
 #ifndef CONFIG_SYS_DDR_TLB_START
 #define CONFIG_SYS_DDR_TLB_START 8
 #endif
 @@ -215,3 +220,4 @@ unsigned int setup_ddr_tlbs(unsigned int  
 memsize_in_meg)
*/
   return memsize_in_meg;
 }
 +#endif /* !CONFIG_NAND_SPL */

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Re: [U-Boot] [PATCH v2 1/5] 85xx: add boot from NAND/eSDHC/eSPI support

2009-09-10 Thread Hu Mingkai-B21284 
 

 -Original Message-
 From: Gala Kumar-B11780 
 Sent: Friday, September 11, 2009 11:13 AM
 To: Hu Mingkai-B21284
 Cc: u-boot@lists.denx.de; Wood Scott-B07421
 Subject: Re: [PATCH v2 1/5] 85xx: add boot from 
 NAND/eSDHC/eSPI support
 
 
 On Sep 10, 2009, at 9:53 PM, Mingkai Hu wrote:
 
  diff --git a/cpu/mpc85xx/tlb.c b/cpu/mpc85xx/tlb.c index 
  0497a29..9c7c928 100644
  --- a/cpu/mpc85xx/tlb.c
  +++ b/cpu/mpc85xx/tlb.c
  @@ -59,6 +59,7 @@ void set_tlb(u8 tlb, u32 epn, u64 rpn, #endif }
 
  +#ifndef CONFIG_NAND_SPL
  void disable_tlb(u8 esel)
  {
  u32 _mas0, _mas1, _mas2, _mas3, _mas7; @@ -83,6 +84,7 @@ void 
  disable_tlb(u8 esel)
  addrmap_set_entry(0, 0, 0, esel);
  #endif
  }
  +#endif
 
  void invalidate_tlb(u8 tlb)
  {
  @@ -106,6 +108,7 @@ void init_tlbs(void)
  return ;
  }
 
  +#ifdef CONFIG_ADDR_MAP
 
 why ADDR_MAP?
 

Oh..., sorry, copy error, it should be NAND_SPL. I'll send it again.

Without this, the 4K NAND loader size will over 4K.

Thanks,
Mingkai
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