Re: [U-Boot] [PATCH v3] arm: socfpga: Add DT support for SoCFPGA and add socfpga_socrates target

2014-11-13 Thread Masahiro Yamada
Hi Stefan,


On Fri,  7 Nov 2014 14:10:41 +0100
Stefan Roese s...@denx.de wrote:

 This patch includes the latest DT sources for socfpga from the current
 Linux kernel. And enables CONFIG_OF_CONTROL for the new build target
 socfpga_socrates (the EBV SoCrates board) to make use of this new DT
 support.
 
 Until this patch, the only SoCFPGA U-Boot target in mainline is
 socfpga_cyclone5. This build target is not (yet) changed to support
 DT. So nothing changes for this target. Even though the long-term
 goal should be to move all SoCFPGA targets over to DT.
 
 One of the reasons to enable DT support in SoCFPGA is, that I need to
 support multiple different SPI controllers for this platform. This is
 the QSPI Cadence controller and the Designware SPI master controller.
 Both are implemented in the SoCFPGA. And enabling both controllers is
 only possible by using the new driver model (DM). The DM SPI code
 only supports DT based probing. So it was easier to move SoCFPGA to
 DT than to add the (deprecated) platform-data based probing to the
 DM SPI suport.
 
 Note that the image with the dtb embedded is u-boot-dtb.img. This needs
 to be used now for those DT enabled boards instead of u-boot.img.


Since this patch was applied, I see a warning message
  WARNING: no status info for 'socfpga_socrates'
  WARNING: no maintainers for 'socfpga_socrates'
when I run tools/genboardscfg.py


I think you should add the maintainership info
  F:   configs/socfpga_socrates_defconfig
to somewhere of MAINTAINERS to suppress the warning message.


Best Regards
Masahiro Yamada

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Re: [U-Boot] [PATCH v3] arm: socfpga: Add DT support for SoCFPGA and add socfpga_socrates target

2014-11-13 Thread Stefan Roese

Hi Masahiro-san,

On 14.11.2014 07:03, Masahiro Yamada wrote:

This patch includes the latest DT sources for socfpga from the current
Linux kernel. And enables CONFIG_OF_CONTROL for the new build target
socfpga_socrates (the EBV SoCrates board) to make use of this new DT
support.

Until this patch, the only SoCFPGA U-Boot target in mainline is
socfpga_cyclone5. This build target is not (yet) changed to support
DT. So nothing changes for this target. Even though the long-term
goal should be to move all SoCFPGA targets over to DT.

One of the reasons to enable DT support in SoCFPGA is, that I need to
support multiple different SPI controllers for this platform. This is
the QSPI Cadence controller and the Designware SPI master controller.
Both are implemented in the SoCFPGA. And enabling both controllers is
only possible by using the new driver model (DM). The DM SPI code
only supports DT based probing. So it was easier to move SoCFPGA to
DT than to add the (deprecated) platform-data based probing to the
DM SPI suport.

Note that the image with the dtb embedded is u-boot-dtb.img. This needs
to be used now for those DT enabled boards instead of u-boot.img.



Since this patch was applied, I see a warning message
   WARNING: no status info for 'socfpga_socrates'
   WARNING: no maintainers for 'socfpga_socrates'
when I run tools/genboardscfg.py


I think you should add the maintainership info
   F:   configs/socfpga_socrates_defconfig
to somewhere of MAINTAINERS to suppress the warning message.


Yes, should be done. Not sure where I should add such information 
though. We don't have a board directory for this socrates board (yet). 
And the toplevel MAINTAINERS file seems to be reserved for the custodian 
entries.


Any ideas / suggestions welcome.

Thanks,
Stefan

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Re: [U-Boot] [PATCH v3] arm: socfpga: Add DT support for SoCFPGA and add socfpga_socrates target

2014-11-13 Thread Masahiro Yamada
Hi Stefan,


On Fri, 14 Nov 2014 08:20:06 +0100
Stefan Roese s...@denx.de wrote:

 Hi Masahiro-san,
 
 On 14.11.2014 07:03, Masahiro Yamada wrote:
  This patch includes the latest DT sources for socfpga from the current
  Linux kernel. And enables CONFIG_OF_CONTROL for the new build target
  socfpga_socrates (the EBV SoCrates board) to make use of this new DT
  support.
 
  Until this patch, the only SoCFPGA U-Boot target in mainline is
  socfpga_cyclone5. This build target is not (yet) changed to support
  DT. So nothing changes for this target. Even though the long-term
  goal should be to move all SoCFPGA targets over to DT.
 
  One of the reasons to enable DT support in SoCFPGA is, that I need to
  support multiple different SPI controllers for this platform. This is
  the QSPI Cadence controller and the Designware SPI master controller.
  Both are implemented in the SoCFPGA. And enabling both controllers is
  only possible by using the new driver model (DM). The DM SPI code
  only supports DT based probing. So it was easier to move SoCFPGA to
  DT than to add the (deprecated) platform-data based probing to the
  DM SPI suport.
 
  Note that the image with the dtb embedded is u-boot-dtb.img. This needs
  to be used now for those DT enabled boards instead of u-boot.img.
 
 
  Since this patch was applied, I see a warning message
 WARNING: no status info for 'socfpga_socrates'
 WARNING: no maintainers for 'socfpga_socrates'
  when I run tools/genboardscfg.py
 
 
  I think you should add the maintainership info
 F:   configs/socfpga_socrates_defconfig
  to somewhere of MAINTAINERS to suppress the warning message.
 
 Yes, should be done. Not sure where I should add such information though. We 
 don't have a board directory for this socrates board (yet). And the toplevel 
 MAINTAINERS file seems to be reserved for the custodian entries.
 
 Any ideas / suggestions welcome.
 

It looks like this socfpga_socrates board borrows most of the parts from 
socfpga_cyclone board,
so I think you can append your maintainership info to 
board/altera/socfpga/MAINTAINERS.

Perhaps it might be helpful to refer to board/sunxi/MAINTAINERS.
The core support of SUNXI boards are owned by Hans de Goede
and some additional files are maintained by other people.


Best Regards
Masahiro Yamada

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Re: [U-Boot] [PATCH v3] arm: socfpga: Add DT support for SoCFPGA and add socfpga_socrates target

2014-11-12 Thread Pavel Machek
On Fri 2014-11-07 14:10:41, Stefan Roese wrote:
 This patch includes the latest DT sources for socfpga from the current
 Linux kernel. And enables CONFIG_OF_CONTROL for the new build target
 socfpga_socrates (the EBV SoCrates board) to make use of this new DT
 support.
 
 Until this patch, the only SoCFPGA U-Boot target in mainline is
 socfpga_cyclone5. This build target is not (yet) changed to support
 DT. So nothing changes for this target. Even though the long-term
 goal should be to move all SoCFPGA targets over to DT.
 
 One of the reasons to enable DT support in SoCFPGA is, that I need to
 support multiple different SPI controllers for this platform. This is
 the QSPI Cadence controller and the Designware SPI master controller.
 Both are implemented in the SoCFPGA. And enabling both controllers is
 only possible by using the new driver model (DM). The DM SPI code
 only supports DT based probing. So it was easier to move SoCFPGA to
 DT than to add the (deprecated) platform-data based probing to the
 DM SPI suport.
 
 Note that the image with the dtb embedded is u-boot-dtb.img. This needs
 to be used now for those DT enabled boards instead of u-boot.img.
 
 Signed-off-by: Stefan Roese s...@denx.de
 Cc: Marek Vasut ma...@denx.de
 Cc: Chin Liang See cl...@altera.com
 Cc: Dinh Nguyen dingu...@altera.com
 Cc: Vince Bridgers vbrid...@altera.com
 Cc: Albert Aribaud albert.u.b...@aribaud.net
 Cc: Pavel Machek pa...@denx.de
 Cc: Simon Glass s...@chromium.org
 ---
 v3:
 - Add missing gpio.h (even if empty). This header is needed for
   lib/fdtdec.c to compile.
 
 v2:
 - As mentioned in the commit text, this new version does not move
   the default target to DT (yet). It adds support for the SoCrates
   board now based on this DT support as the first example.
   Nothing changes for the current socfpga_cyclone5 target.
   
  arch/arm/dts/Makefile  |   2 +
  arch/arm/dts/socfpga.dtsi  | 755 
 +
  arch/arm/dts/socfpga_cyclone5.dtsi |  51 ++
  arch/arm/dts/socfpga_cyclone5_socrates.dts |  50 ++
  arch/arm/include/asm/arch-socfpga/gpio.h   |  10 +
  configs/socfpga_socrates_defconfig |   5 +
  include/dt-bindings/reset/altr,rst-mgr.h   |  90 
  7 files changed, 963 insertions(+)
  create mode 100644 arch/arm/dts/socfpga.dtsi
  create mode 100644 arch/arm/dts/socfpga_cyclone5.dtsi
  create mode 100644 arch/arm/dts/socfpga_cyclone5_socrates.dts
  create mode 100644 arch/arm/include/asm/arch-socfpga/gpio.h
  create mode 100644 configs/socfpga_socrates_defconfig
  create mode 100644 include/dt-bindings/reset/altr,rst-mgr.h
 
 diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
 index 52f8926..b946abe 100644
 --- a/arch/arm/dts/Makefile
 +++ b/arch/arm/dts/Makefile
 @@ -40,6 +40,8 @@ dtb-$(CONFIG_ZYNQ) += zynq-zc702.dtb \
   zynq-zc770-xm013.dtb
  dtb-$(CONFIG_AM33XX) += am335x-boneblack.dtb
  
 +dtb-$(CONFIG_SOCFPGA) += socfpga_cyclone5_socrates.dtb
 +
  targets += $(dtb-y)
  
  DTC_FLAGS += -R 4 -p 0x1000
 diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi
 new file mode 100644
 index 000..4472fd9
 --- /dev/null
 +++ b/arch/arm/dts/socfpga.dtsi
 @@ -0,0 +1,755 @@
 +/*
 + *  Copyright (C) 2012 Altera www.altera.com
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License as published by
 + * the Free Software Foundation; either version 2 of the License, or
 + * (at your option) any later version.
 + *
 + * This program is distributed in the hope that it will be useful,
 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 + * GNU General Public License for more details.
 + *
 + * You should have received a copy of the GNU General Public License
 + * along with this program.  If not, see http://www.gnu.org/licenses/.
 + */

SPDX? Or do we want to keep it exactly same as in linux?

 + qspi_clk: qspi_clk {
 + #clock-cells = 0;
 + compatible = 
 altr,socfpga-gate-clk;
 + clocks = f2s_periph_ref_clk, 
 main_qspi_clk, per_qspi_clk;
 + clk-gate = 0xa0 11;
 + };
 + };
 + };

Any chance to wrap at 80 columns?

 index 000..3f04908
 --- /dev/null
 +++ b/include/dt-bindings/reset/altr,rst-mgr.h
 @@ -0,0 +1,90 @@
 +/*
 + * Copyright (c) 2014, Steffen Trumtrar s.trumt...@pengutronix.de
 + *
 + * This software is licensed under the terms of the GNU General Public
 + * License version 2, as published by the Free Software Foundation, and
 + * may be copied, distributed, and modified under those terms.
 + *
 + * This program is distributed in the hope that it will be 

Re: [U-Boot] [PATCH v3] arm: socfpga: Add DT support for SoCFPGA and add socfpga_socrates target

2014-11-07 Thread Marek Vasut
On Friday, November 07, 2014 at 02:10:41 PM, Stefan Roese wrote:
 This patch includes the latest DT sources for socfpga from the current
 Linux kernel. And enables CONFIG_OF_CONTROL for the new build target
 socfpga_socrates (the EBV SoCrates board) to make use of this new DT
 support.
 
 Until this patch, the only SoCFPGA U-Boot target in mainline is
 socfpga_cyclone5. This build target is not (yet) changed to support
 DT. So nothing changes for this target. Even though the long-term
 goal should be to move all SoCFPGA targets over to DT.
 
 One of the reasons to enable DT support in SoCFPGA is, that I need to
 support multiple different SPI controllers for this platform. This is
 the QSPI Cadence controller and the Designware SPI master controller.
 Both are implemented in the SoCFPGA. And enabling both controllers is
 only possible by using the new driver model (DM). The DM SPI code
 only supports DT based probing. So it was easier to move SoCFPGA to
 DT than to add the (deprecated) platform-data based probing to the
 DM SPI suport.
 
 Note that the image with the dtb embedded is u-boot-dtb.img. This needs
 to be used now for those DT enabled boards instead of u-boot.img.
 
 Signed-off-by: Stefan Roese s...@denx.de
 Cc: Marek Vasut ma...@denx.de
 Cc: Chin Liang See cl...@altera.com
 Cc: Dinh Nguyen dingu...@altera.com
 Cc: Vince Bridgers vbrid...@altera.com
 Cc: Albert Aribaud albert.u.b...@aribaud.net
 Cc: Pavel Machek pa...@denx.de
 Cc: Simon Glass s...@chromium.org

Applied, thanks!

Best regards,
Marek Vasut
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