Re: [U-Boot] U-boot: Erase/read/write issue with S25fl256S flash device
Hi Jagan,
On Saturday 15 June 2013 09:47 PM, Jagan Teki wrote:
On 14-06-2013 20:13, Sourav Poddar wrote:
Hi Jagan,
On Friday 14 June 2013 08:08 PM, Jagan Teki wrote:
On 14-06-2013 20:03, Sourav Poddar wrote:
Hi,
On Wednesday 12 June 2013 01:00 PM, Sourav Poddar wrote:
Hi,
I am working on qspi flash device S25FL256S at u-boot level. I am
trying to
make use of the existing spi_flash.c framework available at u-boot
for
erasing/reading/writing
into the flash device.
There are several issues(mentioned below), which I faced while using
S25FL256s flash device
with my dra7xx board which has a qspi controller to which the above
mentioned flash device is attached.
1. Erase (spi_flash_cmd_erase)
Issuing a command something like this..
sf erase 0x0 0x5
- erases only first 0x2 bytes of flash device, anything above
that is not erase. I need to
issue separate commands after 0x2 for every 0x1 bytes.
Am i missing anything here?
2. read
sf read 8100 0 0x1
Read is not happening properly. The last few byte along the 4k
boundary always shows zero.
Above 4k bytes, read is not happening.
For ex:
DRA752 EVM # md 81000f00
81000f00:
81000f10:
81000f20:
81000f30:
81000f40:
81000f50:
81000f60:
81000f70:
81000f80:
81000f90:
81000fa0:
81000fb0:
81000fc0:
81000fd0:
81000fe0:
81000ff0: 00ff
In this dump, if you see 81000ff0 the last column shows 00
which is
not expected. and it happens along every 4k bytes.
So, to get rid of the above issue, I switched to page read with the
below patch[1],
which is giving me the correct result.
[1]:
@@ -147,17 +153,40 @@ int spi_flash_read_common(struct spi_flash
*flash, const u8 *cmd,
int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
size_t len, void *data)
{
- u8 cmd[5];
+ unsigned long page_addr, byte_addr, page_size;
+ size_t chunk_len, actual;
+ int ret = 0;
+ u8 cmd[4];
/* Handle memory-mapped SPI */
if (flash-memory_map)
memcpy(data, flash-memory_map + offset, len);
+ page_size = flash-page_size;
+ page_addr = offset / page_size;
+ byte_addr = offset % page_size;
+
+ cmd[0] = CMD_READ_ARRAY_SLOW;
+ for (actual = 0; actual len; actual += chunk_len) {
+ chunk_len = min(len - actual, page_size - byte_addr);
+
+ cmd[1] = page_addr 8;
+ cmd[2] = page_addr;
+ cmd[3] = byte_addr;
+
+ ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
data + actual, chunk_len);
+ if (ret 0) {
+ debug(SF: read failed);
+ break;
+ }
- cmd[0] = CMD_READ_ARRAY_FAST;
- spi_flash_addr(offset, cmd);
- cmd[4] = 0x00;
+ byte_addr += chunk_len;
+ if (byte_addr == page_size) {
+ page_addr++;
+ byte_addr = 0;
+ }
+ }
- return spi_flash_read_common(flash, cmd, sizeof(cmd), data,
len);
+ return ret;
}
Any idea about this?
3. write (spi_flash_cmd_write_multi)
write not happening properly.
observations: only able to write single page, anything after a
page is
not getting
written.
Workaround:
I did a write disable latch at the end of every write cycle(page
program) and enable it
again for the next loop. With this, I see I get rid of the above
issue.
@@ -117,6 +117,12 @@ int spi_flash_cmd_write_multi(struct spi_flash
*flash, u32 offset,
if (ret)
break;
+ ret = spi_flash_cmd_write_disable(flash);
+ if (ret 0) {
+ printf(SF: disabling write failed\n);
+ break;
+ }
+
Have anyone seen the above mentioned issues regarding
read/write/erase? OR is there any
configurations that I might be missing ?
Any Input on this?
Please wait, I am pushing some changes tonight or so.
We will continue this thread, after testing your part with these new
changes.
I will intimate you once
Re: [U-Boot] U-boot: Erase/read/write issue with S25fl256S flash device
Hi Sourav,
On Mon, Jun 17, 2013 at 11:44 AM, Sourav Poddar sourav.pod...@ti.com wrote:
Hi Jagan,
On Saturday 15 June 2013 09:47 PM, Jagan Teki wrote:
On 14-06-2013 20:13, Sourav Poddar wrote:
Hi Jagan,
On Friday 14 June 2013 08:08 PM, Jagan Teki wrote:
On 14-06-2013 20:03, Sourav Poddar wrote:
Hi,
On Wednesday 12 June 2013 01:00 PM, Sourav Poddar wrote:
Hi,
I am working on qspi flash device S25FL256S at u-boot level. I am
trying to
make use of the existing spi_flash.c framework available at u-boot for
erasing/reading/writing
into the flash device.
There are several issues(mentioned below), which I faced while using
S25FL256s flash device
with my dra7xx board which has a qspi controller to which the above
mentioned flash device is attached.
1. Erase (spi_flash_cmd_erase)
Issuing a command something like this..
sf erase 0x0 0x5
- erases only first 0x2 bytes of flash device, anything above
that is not erase. I need to
issue separate commands after 0x2 for every 0x1 bytes.
Am i missing anything here?
2. read
sf read 8100 0 0x1
Read is not happening properly. The last few byte along the 4k
boundary always shows zero.
Above 4k bytes, read is not happening.
For ex:
DRA752 EVM # md 81000f00
81000f00:
81000f10:
81000f20:
81000f30:
81000f40:
81000f50:
81000f60:
81000f70:
81000f80:
81000f90:
81000fa0:
81000fb0:
81000fc0:
81000fd0:
81000fe0:
81000ff0: 00ff
In this dump, if you see 81000ff0 the last column shows 00 which
is
not expected. and it happens along every 4k bytes.
So, to get rid of the above issue, I switched to page read with the
below patch[1],
which is giving me the correct result.
[1]:
@@ -147,17 +153,40 @@ int spi_flash_read_common(struct spi_flash
*flash, const u8 *cmd,
int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
size_t len, void *data)
{
- u8 cmd[5];
+ unsigned long page_addr, byte_addr, page_size;
+ size_t chunk_len, actual;
+ int ret = 0;
+ u8 cmd[4];
/* Handle memory-mapped SPI */
if (flash-memory_map)
memcpy(data, flash-memory_map + offset, len);
+ page_size = flash-page_size;
+ page_addr = offset / page_size;
+ byte_addr = offset % page_size;
+
+ cmd[0] = CMD_READ_ARRAY_SLOW;
+ for (actual = 0; actual len; actual += chunk_len) {
+ chunk_len = min(len - actual, page_size - byte_addr);
+
+ cmd[1] = page_addr 8;
+ cmd[2] = page_addr;
+ cmd[3] = byte_addr;
+
+ ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
data + actual, chunk_len);
+ if (ret 0) {
+ debug(SF: read failed);
+ break;
+ }
- cmd[0] = CMD_READ_ARRAY_FAST;
- spi_flash_addr(offset, cmd);
- cmd[4] = 0x00;
+ byte_addr += chunk_len;
+ if (byte_addr == page_size) {
+ page_addr++;
+ byte_addr = 0;
+ }
+ }
- return spi_flash_read_common(flash, cmd, sizeof(cmd), data,
len);
+ return ret;
}
Any idea about this?
3. write (spi_flash_cmd_write_multi)
write not happening properly.
observations: only able to write single page, anything after a page is
not getting
written.
Workaround:
I did a write disable latch at the end of every write cycle(page
program) and enable it
again for the next loop. With this, I see I get rid of the above
issue.
@@ -117,6 +117,12 @@ int spi_flash_cmd_write_multi(struct spi_flash
*flash, u32 offset,
if (ret)
break;
+ ret = spi_flash_cmd_write_disable(flash);
+ if (ret 0) {
+ printf(SF: disabling write failed\n);
+ break;
+ }
+
Have anyone seen the above mentioned issues regarding
read/write/erase? OR is there any
configurations that I
Re: [U-Boot] U-boot: Erase/read/write issue with S25fl256S flash device
HI Jagan,
On Monday 17 June 2013 12:17 PM, Jagan Teki wrote:
Hi Sourav,
On Mon, Jun 17, 2013 at 11:44 AM, Sourav Poddarsourav.pod...@ti.com wrote:
Hi Jagan,
On Saturday 15 June 2013 09:47 PM, Jagan Teki wrote:
On 14-06-2013 20:13, Sourav Poddar wrote:
Hi Jagan,
On Friday 14 June 2013 08:08 PM, Jagan Teki wrote:
On 14-06-2013 20:03, Sourav Poddar wrote:
Hi,
On Wednesday 12 June 2013 01:00 PM, Sourav Poddar wrote:
Hi,
I am working on qspi flash device S25FL256S at u-boot level. I am
trying to
make use of the existing spi_flash.c framework available at u-boot for
erasing/reading/writing
into the flash device.
There are several issues(mentioned below), which I faced while using
S25FL256s flash device
with my dra7xx board which has a qspi controller to which the above
mentioned flash device is attached.
1. Erase (spi_flash_cmd_erase)
Issuing a command something like this..
sf erase 0x0 0x5
- erases only first 0x2 bytes of flash device, anything above
that is not erase. I need to
issue separate commands after 0x2 for every 0x1 bytes.
Am i missing anything here?
2. read
sf read 8100 0 0x1
Read is not happening properly. The last few byte along the 4k
boundary always shows zero.
Above 4k bytes, read is not happening.
For ex:
DRA752 EVM # md 81000f00
81000f00:
81000f10:
81000f20:
81000f30:
81000f40:
81000f50:
81000f60:
81000f70:
81000f80:
81000f90:
81000fa0:
81000fb0:
81000fc0:
81000fd0:
81000fe0:
81000ff0: 00ff
In this dump, if you see 81000ff0 the last column shows 00 which
is
not expected. and it happens along every 4k bytes.
So, to get rid of the above issue, I switched to page read with the
below patch[1],
which is giving me the correct result.
[1]:
@@ -147,17 +153,40 @@ int spi_flash_read_common(struct spi_flash
*flash, const u8 *cmd,
int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
size_t len, void *data)
{
- u8 cmd[5];
+ unsigned long page_addr, byte_addr, page_size;
+ size_t chunk_len, actual;
+ int ret = 0;
+ u8 cmd[4];
/* Handle memory-mapped SPI */
if (flash-memory_map)
memcpy(data, flash-memory_map + offset, len);
+ page_size = flash-page_size;
+ page_addr = offset / page_size;
+ byte_addr = offset % page_size;
+
+ cmd[0] = CMD_READ_ARRAY_SLOW;
+ for (actual = 0; actual len; actual += chunk_len) {
+ chunk_len = min(len - actual, page_size - byte_addr);
+
+ cmd[1] = page_addr 8;
+ cmd[2] = page_addr;
+ cmd[3] = byte_addr;
+
+ ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
data + actual, chunk_len);
+ if (ret 0) {
+ debug(SF: read failed);
+ break;
+ }
- cmd[0] = CMD_READ_ARRAY_FAST;
- spi_flash_addr(offset, cmd);
- cmd[4] = 0x00;
+ byte_addr += chunk_len;
+ if (byte_addr == page_size) {
+ page_addr++;
+ byte_addr = 0;
+ }
+ }
- return spi_flash_read_common(flash, cmd, sizeof(cmd), data,
len);
+ return ret;
}
Any idea about this?
3. write (spi_flash_cmd_write_multi)
write not happening properly.
observations: only able to write single page, anything after a page is
not getting
written.
Workaround:
I did a write disable latch at the end of every write cycle(page
program) and enable it
again for the next loop. With this, I see I get rid of the above
issue.
@@ -117,6 +117,12 @@ int spi_flash_cmd_write_multi(struct spi_flash
*flash, u32 offset,
if (ret)
break;
+ ret = spi_flash_cmd_write_disable(flash);
+ if (ret 0) {
+ printf(SF: disabling write failed\n);
+ break;
+ }
+
Have anyone seen the above mentioned issues regarding
read/write/erase? OR is there any
configurations that I might be missing ?
Any Input on this?
Re: [U-Boot] U-boot: Erase/read/write issue with S25fl256S flash device
On Mon, Jun 17, 2013 at 12:28 PM, Sourav Poddar sourav.pod...@ti.com wrote:
HI Jagan,
On Monday 17 June 2013 12:17 PM, Jagan Teki wrote:
Hi Sourav,
On Mon, Jun 17, 2013 at 11:44 AM, Sourav Poddarsourav.pod...@ti.com
wrote:
Hi Jagan,
On Saturday 15 June 2013 09:47 PM, Jagan Teki wrote:
On 14-06-2013 20:13, Sourav Poddar wrote:
Hi Jagan,
On Friday 14 June 2013 08:08 PM, Jagan Teki wrote:
On 14-06-2013 20:03, Sourav Poddar wrote:
Hi,
On Wednesday 12 June 2013 01:00 PM, Sourav Poddar wrote:
Hi,
I am working on qspi flash device S25FL256S at u-boot level. I am
trying to
make use of the existing spi_flash.c framework available at u-boot
for
erasing/reading/writing
into the flash device.
There are several issues(mentioned below), which I faced while using
S25FL256s flash device
with my dra7xx board which has a qspi controller to which the above
mentioned flash device is attached.
1. Erase (spi_flash_cmd_erase)
Issuing a command something like this..
sf erase 0x0 0x5
- erases only first 0x2 bytes of flash device, anything above
that is not erase. I need to
issue separate commands after 0x2 for every 0x1 bytes.
Am i missing anything here?
2. read
sf read 8100 0 0x1
Read is not happening properly. The last few byte along the 4k
boundary always shows zero.
Above 4k bytes, read is not happening.
For ex:
DRA752 EVM # md 81000f00
81000f00:
81000f10:
81000f20:
81000f30:
81000f40:
81000f50:
81000f60:
81000f70:
81000f80:
81000f90:
81000fa0:
81000fb0:
81000fc0:
81000fd0:
81000fe0:
81000ff0: 00ff
In this dump, if you see 81000ff0 the last column shows 00 which
is
not expected. and it happens along every 4k bytes.
So, to get rid of the above issue, I switched to page read with the
below patch[1],
which is giving me the correct result.
[1]:
@@ -147,17 +153,40 @@ int spi_flash_read_common(struct spi_flash
*flash, const u8 *cmd,
int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
size_t len, void *data)
{
- u8 cmd[5];
+ unsigned long page_addr, byte_addr, page_size;
+ size_t chunk_len, actual;
+ int ret = 0;
+ u8 cmd[4];
/* Handle memory-mapped SPI */
if (flash-memory_map)
memcpy(data, flash-memory_map + offset, len);
+ page_size = flash-page_size;
+ page_addr = offset / page_size;
+ byte_addr = offset % page_size;
+
+ cmd[0] = CMD_READ_ARRAY_SLOW;
+ for (actual = 0; actual len; actual += chunk_len) {
+ chunk_len = min(len - actual, page_size -
byte_addr);
+
+ cmd[1] = page_addr 8;
+ cmd[2] = page_addr;
+ cmd[3] = byte_addr;
+
+ ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
data + actual, chunk_len);
+ if (ret 0) {
+ debug(SF: read failed);
+ break;
+ }
- cmd[0] = CMD_READ_ARRAY_FAST;
- spi_flash_addr(offset, cmd);
- cmd[4] = 0x00;
+ byte_addr += chunk_len;
+ if (byte_addr == page_size) {
+ page_addr++;
+ byte_addr = 0;
+ }
+ }
- return spi_flash_read_common(flash, cmd, sizeof(cmd), data,
len);
+ return ret;
}
Any idea about this?
3. write (spi_flash_cmd_write_multi)
write not happening properly.
observations: only able to write single page, anything after a page
is
not getting
written.
Workaround:
I did a write disable latch at the end of every write cycle(page
program) and enable it
again for the next loop. With this, I see I get rid of the above
issue.
@@ -117,6 +117,12 @@ int spi_flash_cmd_write_multi(struct
spi_flash
*flash, u32 offset,
if (ret)
break;
+ ret = spi_flash_cmd_write_disable(flash);
+ if (ret 0) {
+ printf(SF: disabling write failed\n);
+
Re: [U-Boot] U-boot: Erase/read/write issue with S25fl256S flash device
On Monday 17 June 2013 12:35 PM, Jagan Teki wrote:
On Mon, Jun 17, 2013 at 12:28 PM, Sourav Poddarsourav.pod...@ti.com wrote:
HI Jagan,
On Monday 17 June 2013 12:17 PM, Jagan Teki wrote:
Hi Sourav,
On Mon, Jun 17, 2013 at 11:44 AM, Sourav Poddarsourav.pod...@ti.com
wrote:
Hi Jagan,
On Saturday 15 June 2013 09:47 PM, Jagan Teki wrote:
On 14-06-2013 20:13, Sourav Poddar wrote:
Hi Jagan,
On Friday 14 June 2013 08:08 PM, Jagan Teki wrote:
On 14-06-2013 20:03, Sourav Poddar wrote:
Hi,
On Wednesday 12 June 2013 01:00 PM, Sourav Poddar wrote:
Hi,
I am working on qspi flash device S25FL256S at u-boot level. I am
trying to
make use of the existing spi_flash.c framework available at u-boot
for
erasing/reading/writing
into the flash device.
There are several issues(mentioned below), which I faced while using
S25FL256s flash device
with my dra7xx board which has a qspi controller to which the above
mentioned flash device is attached.
1. Erase (spi_flash_cmd_erase)
Issuing a command something like this..
sf erase 0x0 0x5
- erases only first 0x2 bytes of flash device, anything above
that is not erase. I need to
issue separate commands after 0x2 for every 0x1 bytes.
Am i missing anything here?
2. read
sf read 8100 0 0x1
Read is not happening properly. The last few byte along the 4k
boundary always shows zero.
Above 4k bytes, read is not happening.
For ex:
DRA752 EVM # md 81000f00
81000f00:
81000f10:
81000f20:
81000f30:
81000f40:
81000f50:
81000f60:
81000f70:
81000f80:
81000f90:
81000fa0:
81000fb0:
81000fc0:
81000fd0:
81000fe0:
81000ff0: 00ff
In this dump, if you see 81000ff0 the last column shows 00 which
is
not expected. and it happens along every 4k bytes.
So, to get rid of the above issue, I switched to page read with the
below patch[1],
which is giving me the correct result.
[1]:
@@ -147,17 +153,40 @@ int spi_flash_read_common(struct spi_flash
*flash, const u8 *cmd,
int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
size_t len, void *data)
{
- u8 cmd[5];
+ unsigned long page_addr, byte_addr, page_size;
+ size_t chunk_len, actual;
+ int ret = 0;
+ u8 cmd[4];
/* Handle memory-mapped SPI */
if (flash-memory_map)
memcpy(data, flash-memory_map + offset, len);
+ page_size = flash-page_size;
+ page_addr = offset / page_size;
+ byte_addr = offset % page_size;
+
+ cmd[0] = CMD_READ_ARRAY_SLOW;
+ for (actual = 0; actual len; actual += chunk_len) {
+ chunk_len = min(len - actual, page_size -
byte_addr);
+
+ cmd[1] = page_addr 8;
+ cmd[2] = page_addr;
+ cmd[3] = byte_addr;
+
+ ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
data + actual, chunk_len);
+ if (ret 0) {
+ debug(SF: read failed);
+ break;
+ }
- cmd[0] = CMD_READ_ARRAY_FAST;
- spi_flash_addr(offset, cmd);
- cmd[4] = 0x00;
+ byte_addr += chunk_len;
+ if (byte_addr == page_size) {
+ page_addr++;
+ byte_addr = 0;
+ }
+ }
- return spi_flash_read_common(flash, cmd, sizeof(cmd), data,
len);
+ return ret;
}
Any idea about this?
3. write (spi_flash_cmd_write_multi)
write not happening properly.
observations: only able to write single page, anything after a page
is
not getting
written.
Workaround:
I did a write disable latch at the end of every write cycle(page
program) and enable it
again for the next loop. With this, I see I get rid of the above
issue.
@@ -117,6 +117,12 @@ int spi_flash_cmd_write_multi(struct
spi_flash
*flash, u32 offset,
if (ret)
break;
+ ret = spi_flash_cmd_write_disable(flash);
+ if (ret 0) {
+ printf(SF: disabling write failed\n);
+ break;
+ }
+
Have
Re: [U-Boot] U-boot: Erase/read/write issue with S25fl256S flash device
On Mon, Jun 17, 2013 at 12:41 PM, Sourav Poddar sourav.pod...@ti.com wrote:
On Monday 17 June 2013 12:35 PM, Jagan Teki wrote:
On Mon, Jun 17, 2013 at 12:28 PM, Sourav Poddarsourav.pod...@ti.com
wrote:
HI Jagan,
On Monday 17 June 2013 12:17 PM, Jagan Teki wrote:
Hi Sourav,
On Mon, Jun 17, 2013 at 11:44 AM, Sourav Poddarsourav.pod...@ti.com
wrote:
Hi Jagan,
On Saturday 15 June 2013 09:47 PM, Jagan Teki wrote:
On 14-06-2013 20:13, Sourav Poddar wrote:
Hi Jagan,
On Friday 14 June 2013 08:08 PM, Jagan Teki wrote:
On 14-06-2013 20:03, Sourav Poddar wrote:
Hi,
On Wednesday 12 June 2013 01:00 PM, Sourav Poddar wrote:
Hi,
I am working on qspi flash device S25FL256S at u-boot level. I am
trying to
make use of the existing spi_flash.c framework available at u-boot
for
erasing/reading/writing
into the flash device.
There are several issues(mentioned below), which I faced while
using
S25FL256s flash device
with my dra7xx board which has a qspi controller to which the
above
mentioned flash device is attached.
1. Erase (spi_flash_cmd_erase)
Issuing a command something like this..
sf erase 0x0 0x5
- erases only first 0x2 bytes of flash device, anything
above
that is not erase. I need to
issue separate commands after 0x2 for every 0x1
bytes.
Am i missing anything here?
2. read
sf read 8100 0 0x1
Read is not happening properly. The last few byte along the 4k
boundary always shows zero.
Above 4k bytes, read is not happening.
For ex:
DRA752 EVM # md 81000f00
81000f00:
81000f10:
81000f20:
81000f30:
81000f40:
81000f50:
81000f60:
81000f70:
81000f80:
81000f90:
81000fa0:
81000fb0:
81000fc0:
81000fd0:
81000fe0:
81000ff0: 00ff
In this dump, if you see 81000ff0 the last column shows 00
which
is
not expected. and it happens along every 4k bytes.
So, to get rid of the above issue, I switched to page read with
the
below patch[1],
which is giving me the correct result.
[1]:
@@ -147,17 +153,40 @@ int spi_flash_read_common(struct spi_flash
*flash, const u8 *cmd,
int spi_flash_cmd_read_fast(struct spi_flash *flash, u32
offset,
size_t len, void *data)
{
- u8 cmd[5];
+ unsigned long page_addr, byte_addr, page_size;
+ size_t chunk_len, actual;
+ int ret = 0;
+ u8 cmd[4];
/* Handle memory-mapped SPI */
if (flash-memory_map)
memcpy(data, flash-memory_map + offset, len);
+ page_size = flash-page_size;
+ page_addr = offset / page_size;
+ byte_addr = offset % page_size;
+
+ cmd[0] = CMD_READ_ARRAY_SLOW;
+ for (actual = 0; actual len; actual += chunk_len) {
+ chunk_len = min(len - actual, page_size -
byte_addr);
+
+ cmd[1] = page_addr 8;
+ cmd[2] = page_addr;
+ cmd[3] = byte_addr;
+
+ ret = spi_flash_read_common(flash, cmd,
sizeof(cmd),
data + actual, chunk_len);
+ if (ret 0) {
+ debug(SF: read failed);
+ break;
+ }
- cmd[0] = CMD_READ_ARRAY_FAST;
- spi_flash_addr(offset, cmd);
- cmd[4] = 0x00;
+ byte_addr += chunk_len;
+ if (byte_addr == page_size) {
+ page_addr++;
+ byte_addr = 0;
+ }
+ }
- return spi_flash_read_common(flash, cmd, sizeof(cmd),
data,
len);
+ return ret;
}
Any idea about this?
3. write (spi_flash_cmd_write_multi)
write not happening properly.
observations: only able to write single page, anything after a
page
is
not getting
written.
Workaround:
I did a write disable latch at the end of every write cycle(page
program) and enable it
again for the next loop. With this, I see I get rid of the above
issue.
@@ -117,6 +117,12 @@ int spi_flash_cmd_write_multi(struct
spi_flash
*flash, u32 offset,
if (ret)
break;
Re: [U-Boot] U-boot: Erase/read/write issue with S25fl256S flash device
On Monday 17 June 2013 12:44 PM, Jagan Teki wrote:
On Mon, Jun 17, 2013 at 12:41 PM, Sourav Poddarsourav.pod...@ti.com wrote:
On Monday 17 June 2013 12:35 PM, Jagan Teki wrote:
On Mon, Jun 17, 2013 at 12:28 PM, Sourav Poddarsourav.pod...@ti.com
wrote:
HI Jagan,
On Monday 17 June 2013 12:17 PM, Jagan Teki wrote:
Hi Sourav,
On Mon, Jun 17, 2013 at 11:44 AM, Sourav Poddarsourav.pod...@ti.com
wrote:
Hi Jagan,
On Saturday 15 June 2013 09:47 PM, Jagan Teki wrote:
On 14-06-2013 20:13, Sourav Poddar wrote:
Hi Jagan,
On Friday 14 June 2013 08:08 PM, Jagan Teki wrote:
On 14-06-2013 20:03, Sourav Poddar wrote:
Hi,
On Wednesday 12 June 2013 01:00 PM, Sourav Poddar wrote:
Hi,
I am working on qspi flash device S25FL256S at u-boot level. I am
trying to
make use of the existing spi_flash.c framework available at u-boot
for
erasing/reading/writing
into the flash device.
There are several issues(mentioned below), which I faced while
using
S25FL256s flash device
with my dra7xx board which has a qspi controller to which the
above
mentioned flash device is attached.
1. Erase (spi_flash_cmd_erase)
Issuing a command something like this..
sf erase 0x0 0x5
- erases only first 0x2 bytes of flash device, anything
above
that is not erase. I need to
issue separate commands after 0x2 for every 0x1
bytes.
Am i missing anything here?
2. read
sf read 8100 0 0x1
Read is not happening properly. The last few byte along the 4k
boundary always shows zero.
Above 4k bytes, read is not happening.
For ex:
DRA752 EVM # md 81000f00
81000f00:
81000f10:
81000f20:
81000f30:
81000f40:
81000f50:
81000f60:
81000f70:
81000f80:
81000f90:
81000fa0:
81000fb0:
81000fc0:
81000fd0:
81000fe0:
81000ff0: 00ff
In this dump, if you see 81000ff0 the last column shows 00
which
is
not expected. and it happens along every 4k bytes.
So, to get rid of the above issue, I switched to page read with
the
below patch[1],
which is giving me the correct result.
[1]:
@@ -147,17 +153,40 @@ int spi_flash_read_common(struct spi_flash
*flash, const u8 *cmd,
int spi_flash_cmd_read_fast(struct spi_flash *flash, u32
offset,
size_t len, void *data)
{
- u8 cmd[5];
+ unsigned long page_addr, byte_addr, page_size;
+ size_t chunk_len, actual;
+ int ret = 0;
+ u8 cmd[4];
/* Handle memory-mapped SPI */
if (flash-memory_map)
memcpy(data, flash-memory_map + offset, len);
+ page_size = flash-page_size;
+ page_addr = offset / page_size;
+ byte_addr = offset % page_size;
+
+ cmd[0] = CMD_READ_ARRAY_SLOW;
+ for (actual = 0; actuallen; actual += chunk_len) {
+ chunk_len = min(len - actual, page_size -
byte_addr);
+
+ cmd[1] = page_addr8;
+ cmd[2] = page_addr;
+ cmd[3] = byte_addr;
+
+ ret = spi_flash_read_common(flash, cmd,
sizeof(cmd),
data + actual, chunk_len);
+ if (ret0) {
+ debug(SF: read failed);
+ break;
+ }
- cmd[0] = CMD_READ_ARRAY_FAST;
- spi_flash_addr(offset, cmd);
- cmd[4] = 0x00;
+ byte_addr += chunk_len;
+ if (byte_addr == page_size) {
+ page_addr++;
+ byte_addr = 0;
+ }
+ }
- return spi_flash_read_common(flash, cmd, sizeof(cmd),
data,
len);
+ return ret;
}
Any idea about this?
3. write (spi_flash_cmd_write_multi)
write not happening properly.
observations: only able to write single page, anything after a
page
is
not getting
written.
Workaround:
I did a write disable latch at the end of every write cycle(page
program) and enable it
again for the next loop. With this, I see I get rid of the above
issue.
@@ -117,6 +117,12 @@ int spi_flash_cmd_write_multi(struct
spi_flash
*flash, u32 offset,
if (ret)
break;
+ ret = spi_flash_cmd_write_disable(flash);
+
Re: [U-Boot] U-boot: Erase/read/write issue with S25fl256S flash device
On Mon, Jun 17, 2013 at 12:49 PM, Sourav Poddar sourav.pod...@ti.com wrote:
On Monday 17 June 2013 12:44 PM, Jagan Teki wrote:
On Mon, Jun 17, 2013 at 12:41 PM, Sourav Poddarsourav.pod...@ti.com
wrote:
On Monday 17 June 2013 12:35 PM, Jagan Teki wrote:
On Mon, Jun 17, 2013 at 12:28 PM, Sourav Poddarsourav.pod...@ti.com
wrote:
HI Jagan,
On Monday 17 June 2013 12:17 PM, Jagan Teki wrote:
Hi Sourav,
On Mon, Jun 17, 2013 at 11:44 AM, Sourav Poddarsourav.pod...@ti.com
wrote:
Hi Jagan,
On Saturday 15 June 2013 09:47 PM, Jagan Teki wrote:
On 14-06-2013 20:13, Sourav Poddar wrote:
Hi Jagan,
On Friday 14 June 2013 08:08 PM, Jagan Teki wrote:
On 14-06-2013 20:03, Sourav Poddar wrote:
Hi,
On Wednesday 12 June 2013 01:00 PM, Sourav Poddar wrote:
Hi,
I am working on qspi flash device S25FL256S at u-boot level. I
am
trying to
make use of the existing spi_flash.c framework available at
u-boot
for
erasing/reading/writing
into the flash device.
There are several issues(mentioned below), which I faced while
using
S25FL256s flash device
with my dra7xx board which has a qspi controller to which the
above
mentioned flash device is attached.
1. Erase (spi_flash_cmd_erase)
Issuing a command something like this..
sf erase 0x0 0x5
- erases only first 0x2 bytes of flash device, anything
above
that is not erase. I need to
issue separate commands after 0x2 for every 0x1
bytes.
Am i missing anything here?
2. read
sf read 8100 0 0x1
Read is not happening properly. The last few byte along the 4k
boundary always shows zero.
Above 4k bytes, read is not happening.
For ex:
DRA752 EVM # md 81000f00
81000f00:
81000f10:
81000f20:
81000f30:
81000f40:
81000f50:
81000f60:
81000f70:
81000f80:
81000f90:
81000fa0:
81000fb0:
81000fc0:
81000fd0:
81000fe0:
81000ff0: 00ff
In this dump, if you see 81000ff0 the last column shows 00
which
is
not expected. and it happens along every 4k bytes.
So, to get rid of the above issue, I switched to page read with
the
below patch[1],
which is giving me the correct result.
[1]:
@@ -147,17 +153,40 @@ int spi_flash_read_common(struct spi_flash
*flash, const u8 *cmd,
int spi_flash_cmd_read_fast(struct spi_flash *flash, u32
offset,
size_t len, void *data)
{
- u8 cmd[5];
+ unsigned long page_addr, byte_addr, page_size;
+ size_t chunk_len, actual;
+ int ret = 0;
+ u8 cmd[4];
/* Handle memory-mapped SPI */
if (flash-memory_map)
memcpy(data, flash-memory_map + offset,
len);
+ page_size = flash-page_size;
+ page_addr = offset / page_size;
+ byte_addr = offset % page_size;
+
+ cmd[0] = CMD_READ_ARRAY_SLOW;
+ for (actual = 0; actuallen; actual += chunk_len) {
+ chunk_len = min(len - actual, page_size -
byte_addr);
+
+ cmd[1] = page_addr8;
+ cmd[2] = page_addr;
+ cmd[3] = byte_addr;
+
+ ret = spi_flash_read_common(flash, cmd,
sizeof(cmd),
data + actual, chunk_len);
+ if (ret0) {
+ debug(SF: read failed);
+ break;
+ }
- cmd[0] = CMD_READ_ARRAY_FAST;
- spi_flash_addr(offset, cmd);
- cmd[4] = 0x00;
+ byte_addr += chunk_len;
+ if (byte_addr == page_size) {
+ page_addr++;
+ byte_addr = 0;
+ }
+ }
- return spi_flash_read_common(flash, cmd, sizeof(cmd),
data,
len);
+ return ret;
}
Any idea about this?
3. write (spi_flash_cmd_write_multi)
write not happening properly.
observations: only able to write single page, anything after a
page
is
not getting
written.
Workaround:
I did a write disable latch at the end of every write cycle(page
program) and enable it
again for the next loop. With this, I see I get rid of the above
issue.
@@ -117,6 +117,12 @@ int
Re: [U-Boot] U-boot: Erase/read/write issue with S25fl256S flash device
Hi Jagan,
On Monday 17 June 2013 01:04 PM, Jagan Teki wrote:
On Mon, Jun 17, 2013 at 12:49 PM, Sourav Poddarsourav.pod...@ti.com wrote:
On Monday 17 June 2013 12:44 PM, Jagan Teki wrote:
On Mon, Jun 17, 2013 at 12:41 PM, Sourav Poddarsourav.pod...@ti.com
wrote:
On Monday 17 June 2013 12:35 PM, Jagan Teki wrote:
On Mon, Jun 17, 2013 at 12:28 PM, Sourav Poddarsourav.pod...@ti.com
wrote:
HI Jagan,
On Monday 17 June 2013 12:17 PM, Jagan Teki wrote:
Hi Sourav,
On Mon, Jun 17, 2013 at 11:44 AM, Sourav Poddarsourav.pod...@ti.com
wrote:
Hi Jagan,
On Saturday 15 June 2013 09:47 PM, Jagan Teki wrote:
On 14-06-2013 20:13, Sourav Poddar wrote:
Hi Jagan,
On Friday 14 June 2013 08:08 PM, Jagan Teki wrote:
On 14-06-2013 20:03, Sourav Poddar wrote:
Hi,
On Wednesday 12 June 2013 01:00 PM, Sourav Poddar wrote:
Hi,
I am working on qspi flash device S25FL256S at u-boot level. I
am
trying to
make use of the existing spi_flash.c framework available at
u-boot
for
erasing/reading/writing
into the flash device.
There are several issues(mentioned below), which I faced while
using
S25FL256s flash device
with my dra7xx board which has a qspi controller to which the
above
mentioned flash device is attached.
1. Erase (spi_flash_cmd_erase)
Issuing a command something like this..
sf erase 0x0 0x5
- erases only first 0x2 bytes of flash device, anything
above
that is not erase. I need to
issue separate commands after 0x2 for every 0x1
bytes.
Am i missing anything here?
2. read
sf read 8100 0 0x1
Read is not happening properly. The last few byte along the 4k
boundary always shows zero.
Above 4k bytes, read is not happening.
For ex:
DRA752 EVM # md 81000f00
81000f00:
81000f10:
81000f20:
81000f30:
81000f40:
81000f50:
81000f60:
81000f70:
81000f80:
81000f90:
81000fa0:
81000fb0:
81000fc0:
81000fd0:
81000fe0:
81000ff0: 00ff
In this dump, if you see 81000ff0 the last column shows 00
which
is
not expected. and it happens along every 4k bytes.
So, to get rid of the above issue, I switched to page read with
the
below patch[1],
which is giving me the correct result.
[1]:
@@ -147,17 +153,40 @@ int spi_flash_read_common(struct spi_flash
*flash, const u8 *cmd,
int spi_flash_cmd_read_fast(struct spi_flash *flash, u32
offset,
size_t len, void *data)
{
- u8 cmd[5];
+ unsigned long page_addr, byte_addr, page_size;
+ size_t chunk_len, actual;
+ int ret = 0;
+ u8 cmd[4];
/* Handle memory-mapped SPI */
if (flash-memory_map)
memcpy(data, flash-memory_map + offset,
len);
+ page_size = flash-page_size;
+ page_addr = offset / page_size;
+ byte_addr = offset % page_size;
+
+ cmd[0] = CMD_READ_ARRAY_SLOW;
+ for (actual = 0; actual len; actual += chunk_len) {
+ chunk_len = min(len - actual, page_size -
byte_addr);
+
+ cmd[1] = page_addr 8;
+ cmd[2] = page_addr;
+ cmd[3] = byte_addr;
+
+ ret = spi_flash_read_common(flash, cmd,
sizeof(cmd),
data + actual, chunk_len);
+ if (ret 0) {
+ debug(SF: read failed);
+ break;
+ }
- cmd[0] = CMD_READ_ARRAY_FAST;
- spi_flash_addr(offset, cmd);
- cmd[4] = 0x00;
+ byte_addr += chunk_len;
+ if (byte_addr == page_size) {
+ page_addr++;
+ byte_addr = 0;
+ }
+ }
- return spi_flash_read_common(flash, cmd, sizeof(cmd),
data,
len);
+ return ret;
}
Any idea about this?
3. write (spi_flash_cmd_write_multi)
write not happening properly.
observations: only able to write single page, anything after a
page
is
not getting
written.
Workaround:
I did a write disable latch at the end of every write cycle(page
program) and enable it
again for the next loop. With this, I see I get rid of the above
issue.
@@ -117,6 +117,12 @@ int spi_flash_cmd_write_multi(struct
spi_flash
*flash, u32 offset,
Re: [U-Boot] U-boot: Erase/read/write issue with S25fl256S flash device
On Mon, Jun 17, 2013 at 1:11 PM, Sourav Poddar sourav.pod...@ti.com wrote:
Hi Jagan,
On Monday 17 June 2013 01:04 PM, Jagan Teki wrote:
On Mon, Jun 17, 2013 at 12:49 PM, Sourav Poddarsourav.pod...@ti.com
wrote:
On Monday 17 June 2013 12:44 PM, Jagan Teki wrote:
On Mon, Jun 17, 2013 at 12:41 PM, Sourav Poddarsourav.pod...@ti.com
wrote:
On Monday 17 June 2013 12:35 PM, Jagan Teki wrote:
On Mon, Jun 17, 2013 at 12:28 PM, Sourav Poddarsourav.pod...@ti.com
wrote:
HI Jagan,
On Monday 17 June 2013 12:17 PM, Jagan Teki wrote:
Hi Sourav,
On Mon, Jun 17, 2013 at 11:44 AM, Sourav
Poddarsourav.pod...@ti.com
wrote:
Hi Jagan,
On Saturday 15 June 2013 09:47 PM, Jagan Teki wrote:
On 14-06-2013 20:13, Sourav Poddar wrote:
Hi Jagan,
On Friday 14 June 2013 08:08 PM, Jagan Teki wrote:
On 14-06-2013 20:03, Sourav Poddar wrote:
Hi,
On Wednesday 12 June 2013 01:00 PM, Sourav Poddar wrote:
Hi,
I am working on qspi flash device S25FL256S at u-boot level. I
am
trying to
make use of the existing spi_flash.c framework available at
u-boot
for
erasing/reading/writing
into the flash device.
There are several issues(mentioned below), which I faced while
using
S25FL256s flash device
with my dra7xx board which has a qspi controller to which the
above
mentioned flash device is attached.
1. Erase (spi_flash_cmd_erase)
Issuing a command something like this..
sf erase 0x0 0x5
- erases only first 0x2 bytes of flash device,
anything
above
that is not erase. I need to
issue separate commands after 0x2 for every 0x1
bytes.
Am i missing anything here?
2. read
sf read 8100 0 0x1
Read is not happening properly. The last few byte along the 4k
boundary always shows zero.
Above 4k bytes, read is not happening.
For ex:
DRA752 EVM # md 81000f00
81000f00:
81000f10:
81000f20:
81000f30:
81000f40:
81000f50:
81000f60:
81000f70:
81000f80:
81000f90:
81000fa0:
81000fb0:
81000fc0:
81000fd0:
81000fe0:
81000ff0: 00ff
In this dump, if you see 81000ff0 the last column shows 00
which
is
not expected. and it happens along every 4k bytes.
So, to get rid of the above issue, I switched to page read
with
the
below patch[1],
which is giving me the correct result.
[1]:
@@ -147,17 +153,40 @@ int spi_flash_read_common(struct
spi_flash
*flash, const u8 *cmd,
int spi_flash_cmd_read_fast(struct spi_flash *flash, u32
offset,
size_t len, void *data)
{
- u8 cmd[5];
+ unsigned long page_addr, byte_addr, page_size;
+ size_t chunk_len, actual;
+ int ret = 0;
+ u8 cmd[4];
/* Handle memory-mapped SPI */
if (flash-memory_map)
memcpy(data, flash-memory_map + offset,
len);
+ page_size = flash-page_size;
+ page_addr = offset / page_size;
+ byte_addr = offset % page_size;
+
+ cmd[0] = CMD_READ_ARRAY_SLOW;
+ for (actual = 0; actual len; actual += chunk_len)
{
+ chunk_len = min(len - actual, page_size -
byte_addr);
+
+ cmd[1] = page_addr 8;
+ cmd[2] = page_addr;
+ cmd[3] = byte_addr;
+
+ ret = spi_flash_read_common(flash, cmd,
sizeof(cmd),
data + actual, chunk_len);
+ if (ret 0) {
+ debug(SF: read failed);
+ break;
+ }
- cmd[0] = CMD_READ_ARRAY_FAST;
- spi_flash_addr(offset, cmd);
- cmd[4] = 0x00;
+ byte_addr += chunk_len;
+ if (byte_addr == page_size) {
+ page_addr++;
+ byte_addr = 0;
+ }
+ }
- return spi_flash_read_common(flash, cmd, sizeof(cmd),
data,
len);
+ return ret;
}
Any idea about this?
3. write (spi_flash_cmd_write_multi)
write not happening properly.
observations: only able to write single page, anything after a
page
is
not getting
written.
Workaround:
I did a write disable latch at the end of
Re: [U-Boot] U-boot: Erase/read/write issue with S25fl256S flash device
On Monday 17 June 2013 02:09 PM, Jagan Teki wrote:
On Mon, Jun 17, 2013 at 1:11 PM, Sourav Poddarsourav.pod...@ti.com wrote:
Hi Jagan,
On Monday 17 June 2013 01:04 PM, Jagan Teki wrote:
On Mon, Jun 17, 2013 at 12:49 PM, Sourav Poddarsourav.pod...@ti.com
wrote:
On Monday 17 June 2013 12:44 PM, Jagan Teki wrote:
On Mon, Jun 17, 2013 at 12:41 PM, Sourav Poddarsourav.pod...@ti.com
wrote:
On Monday 17 June 2013 12:35 PM, Jagan Teki wrote:
On Mon, Jun 17, 2013 at 12:28 PM, Sourav Poddarsourav.pod...@ti.com
wrote:
HI Jagan,
On Monday 17 June 2013 12:17 PM, Jagan Teki wrote:
Hi Sourav,
On Mon, Jun 17, 2013 at 11:44 AM, Sourav
Poddarsourav.pod...@ti.com
wrote:
Hi Jagan,
On Saturday 15 June 2013 09:47 PM, Jagan Teki wrote:
On 14-06-2013 20:13, Sourav Poddar wrote:
Hi Jagan,
On Friday 14 June 2013 08:08 PM, Jagan Teki wrote:
On 14-06-2013 20:03, Sourav Poddar wrote:
Hi,
On Wednesday 12 June 2013 01:00 PM, Sourav Poddar wrote:
Hi,
I am working on qspi flash device S25FL256S at u-boot level. I
am
trying to
make use of the existing spi_flash.c framework available at
u-boot
for
erasing/reading/writing
into the flash device.
There are several issues(mentioned below), which I faced while
using
S25FL256s flash device
with my dra7xx board which has a qspi controller to which the
above
mentioned flash device is attached.
1. Erase (spi_flash_cmd_erase)
Issuing a command something like this..
sf erase 0x0 0x5
- erases only first 0x2 bytes of flash device,
anything
above
that is not erase. I need to
issue separate commands after 0x2 for every 0x1
bytes.
Am i missing anything here?
2. read
sf read 8100 0 0x1
Read is not happening properly. The last few byte along the 4k
boundary always shows zero.
Above 4k bytes, read is not happening.
For ex:
DRA752 EVM # md 81000f00
81000f00:
81000f10:
81000f20:
81000f30:
81000f40:
81000f50:
81000f60:
81000f70:
81000f80:
81000f90:
81000fa0:
81000fb0:
81000fc0:
81000fd0:
81000fe0:
81000ff0: 00ff
In this dump, if you see 81000ff0 the last column shows 00
which
is
not expected. and it happens along every 4k bytes.
So, to get rid of the above issue, I switched to page read
with
the
below patch[1],
which is giving me the correct result.
[1]:
@@ -147,17 +153,40 @@ int spi_flash_read_common(struct
spi_flash
*flash, const u8 *cmd,
int spi_flash_cmd_read_fast(struct spi_flash *flash, u32
offset,
size_t len, void *data)
{
- u8 cmd[5];
+ unsigned long page_addr, byte_addr, page_size;
+ size_t chunk_len, actual;
+ int ret = 0;
+ u8 cmd[4];
/* Handle memory-mapped SPI */
if (flash-memory_map)
memcpy(data, flash-memory_map + offset,
len);
+ page_size = flash-page_size;
+ page_addr = offset / page_size;
+ byte_addr = offset % page_size;
+
+ cmd[0] = CMD_READ_ARRAY_SLOW;
+ for (actual = 0; actual len; actual += chunk_len)
{
+ chunk_len = min(len - actual, page_size -
byte_addr);
+
+ cmd[1] = page_addr 8;
+ cmd[2] = page_addr;
+ cmd[3] = byte_addr;
+
+ ret = spi_flash_read_common(flash, cmd,
sizeof(cmd),
data + actual, chunk_len);
+ if (ret 0) {
+ debug(SF: read failed);
+ break;
+ }
- cmd[0] = CMD_READ_ARRAY_FAST;
- spi_flash_addr(offset, cmd);
- cmd[4] = 0x00;
+ byte_addr += chunk_len;
+ if (byte_addr == page_size) {
+ page_addr++;
+ byte_addr = 0;
+ }
+ }
- return spi_flash_read_common(flash, cmd, sizeof(cmd),
data,
len);
+ return ret;
}
Any idea about this?
3. write (spi_flash_cmd_write_multi)
write not happening properly.
observations: only able to write single page, anything after a
page
is
not getting
written.
Workaround:
I did a write disable latch at the end of every write
cycle(page
program) and enable it
again for the next loop. With this, I see I
Re: [U-Boot] U-boot: Erase/read/write issue with S25fl256S flash device
On Mon, Jun 17, 2013 at 2:15 PM, Sourav Poddar sourav.pod...@ti.com wrote:
On Monday 17 June 2013 02:09 PM, Jagan Teki wrote:
On Mon, Jun 17, 2013 at 1:11 PM, Sourav Poddarsourav.pod...@ti.com
wrote:
Hi Jagan,
On Monday 17 June 2013 01:04 PM, Jagan Teki wrote:
On Mon, Jun 17, 2013 at 12:49 PM, Sourav Poddarsourav.pod...@ti.com
wrote:
On Monday 17 June 2013 12:44 PM, Jagan Teki wrote:
On Mon, Jun 17, 2013 at 12:41 PM, Sourav Poddarsourav.pod...@ti.com
wrote:
On Monday 17 June 2013 12:35 PM, Jagan Teki wrote:
On Mon, Jun 17, 2013 at 12:28 PM, Sourav
Poddarsourav.pod...@ti.com
wrote:
HI Jagan,
On Monday 17 June 2013 12:17 PM, Jagan Teki wrote:
Hi Sourav,
On Mon, Jun 17, 2013 at 11:44 AM, Sourav
Poddarsourav.pod...@ti.com
wrote:
Hi Jagan,
On Saturday 15 June 2013 09:47 PM, Jagan Teki wrote:
On 14-06-2013 20:13, Sourav Poddar wrote:
Hi Jagan,
On Friday 14 June 2013 08:08 PM, Jagan Teki wrote:
On 14-06-2013 20:03, Sourav Poddar wrote:
Hi,
On Wednesday 12 June 2013 01:00 PM, Sourav Poddar wrote:
Hi,
I am working on qspi flash device S25FL256S at u-boot level.
I
am
trying to
make use of the existing spi_flash.c framework available at
u-boot
for
erasing/reading/writing
into the flash device.
There are several issues(mentioned below), which I faced
while
using
S25FL256s flash device
with my dra7xx board which has a qspi controller to which
the
above
mentioned flash device is attached.
1. Erase (spi_flash_cmd_erase)
Issuing a command something like this..
sf erase 0x0 0x5
- erases only first 0x2 bytes of flash device,
anything
above
that is not erase. I need to
issue separate commands after 0x2 for every
0x1
bytes.
Am i missing anything here?
2. read
sf read 8100 0 0x1
Read is not happening properly. The last few byte along the
4k
boundary always shows zero.
Above 4k bytes, read is not happening.
For ex:
DRA752 EVM # md 81000f00
81000f00:
81000f10:
81000f20:
81000f30:
81000f40:
81000f50:
81000f60:
81000f70:
81000f80:
81000f90:
81000fa0:
81000fb0:
81000fc0:
81000fd0:
81000fe0:
81000ff0: 00ff
In this dump, if you see 81000ff0 the last column shows
00
which
is
not expected. and it happens along every 4k bytes.
So, to get rid of the above issue, I switched to page read
with
the
below patch[1],
which is giving me the correct result.
[1]:
@@ -147,17 +153,40 @@ int spi_flash_read_common(struct
spi_flash
*flash, const u8 *cmd,
int spi_flash_cmd_read_fast(struct spi_flash *flash,
u32
offset,
size_t len, void *data)
{
- u8 cmd[5];
+ unsigned long page_addr, byte_addr, page_size;
+ size_t chunk_len, actual;
+ int ret = 0;
+ u8 cmd[4];
/* Handle memory-mapped SPI */
if (flash-memory_map)
memcpy(data, flash-memory_map +
offset,
len);
+ page_size = flash-page_size;
+ page_addr = offset / page_size;
+ byte_addr = offset % page_size;
+
+ cmd[0] = CMD_READ_ARRAY_SLOW;
+ for (actual = 0; actual len; actual +=
chunk_len)
{
+ chunk_len = min(len - actual, page_size -
byte_addr);
+
+ cmd[1] = page_addr 8;
+ cmd[2] = page_addr;
+ cmd[3] = byte_addr;
+
+ ret = spi_flash_read_common(flash, cmd,
sizeof(cmd),
data + actual, chunk_len);
+ if (ret 0) {
+ debug(SF: read failed);
+ break;
+ }
- cmd[0] = CMD_READ_ARRAY_FAST;
- spi_flash_addr(offset, cmd);
- cmd[4] = 0x00;
+ byte_addr += chunk_len;
+ if (byte_addr == page_size) {
+ page_addr++;
+ byte_addr = 0;
+ }
+ }
- return spi_flash_read_common(flash, cmd,
sizeof(cmd),
data,
len);
+ return ret;
}
Any idea about this?
3. write (spi_flash_cmd_write_multi)
write not happening properly.
Re: [U-Boot] U-boot: Erase/read/write issue with S25fl256S flash device
On Monday 17 June 2013 03:28 PM, Jagan Teki wrote:
On Mon, Jun 17, 2013 at 2:15 PM, Sourav Poddarsourav.pod...@ti.com wrote:
On Monday 17 June 2013 02:09 PM, Jagan Teki wrote:
On Mon, Jun 17, 2013 at 1:11 PM, Sourav Poddarsourav.pod...@ti.com
wrote:
Hi Jagan,
On Monday 17 June 2013 01:04 PM, Jagan Teki wrote:
On Mon, Jun 17, 2013 at 12:49 PM, Sourav Poddarsourav.pod...@ti.com
wrote:
On Monday 17 June 2013 12:44 PM, Jagan Teki wrote:
On Mon, Jun 17, 2013 at 12:41 PM, Sourav Poddarsourav.pod...@ti.com
wrote:
On Monday 17 June 2013 12:35 PM, Jagan Teki wrote:
On Mon, Jun 17, 2013 at 12:28 PM, Sourav
Poddarsourav.pod...@ti.com
wrote:
HI Jagan,
On Monday 17 June 2013 12:17 PM, Jagan Teki wrote:
Hi Sourav,
On Mon, Jun 17, 2013 at 11:44 AM, Sourav
Poddarsourav.pod...@ti.com
wrote:
Hi Jagan,
On Saturday 15 June 2013 09:47 PM, Jagan Teki wrote:
On 14-06-2013 20:13, Sourav Poddar wrote:
Hi Jagan,
On Friday 14 June 2013 08:08 PM, Jagan Teki wrote:
On 14-06-2013 20:03, Sourav Poddar wrote:
Hi,
On Wednesday 12 June 2013 01:00 PM, Sourav Poddar wrote:
Hi,
I am working on qspi flash device S25FL256S at u-boot level.
I
am
trying to
make use of the existing spi_flash.c framework available at
u-boot
for
erasing/reading/writing
into the flash device.
There are several issues(mentioned below), which I faced
while
using
S25FL256s flash device
with my dra7xx board which has a qspi controller to which
the
above
mentioned flash device is attached.
1. Erase (spi_flash_cmd_erase)
Issuing a command something like this..
sf erase 0x0 0x5
- erases only first 0x2 bytes of flash device,
anything
above
that is not erase. I need to
issue separate commands after 0x2 for every
0x1
bytes.
Am i missing anything here?
2. read
sf read 8100 0 0x1
Read is not happening properly. The last few byte along the
4k
boundary always shows zero.
Above 4k bytes, read is not happening.
For ex:
DRA752 EVM # md 81000f00
81000f00:
81000f10:
81000f20:
81000f30:
81000f40:
81000f50:
81000f60:
81000f70:
81000f80:
81000f90:
81000fa0:
81000fb0:
81000fc0:
81000fd0:
81000fe0:
81000ff0: 00ff
In this dump, if you see 81000ff0 the last column shows
00
which
is
not expected. and it happens along every 4k bytes.
So, to get rid of the above issue, I switched to page read
with
the
below patch[1],
which is giving me the correct result.
[1]:
@@ -147,17 +153,40 @@ int spi_flash_read_common(struct
spi_flash
*flash, const u8 *cmd,
int spi_flash_cmd_read_fast(struct spi_flash *flash,
u32
offset,
size_t len, void *data)
{
- u8 cmd[5];
+ unsigned long page_addr, byte_addr, page_size;
+ size_t chunk_len, actual;
+ int ret = 0;
+ u8 cmd[4];
/* Handle memory-mapped SPI */
if (flash-memory_map)
memcpy(data, flash-memory_map +
offset,
len);
+ page_size = flash-page_size;
+ page_addr = offset / page_size;
+ byte_addr = offset % page_size;
+
+ cmd[0] = CMD_READ_ARRAY_SLOW;
+ for (actual = 0; actual len; actual +=
chunk_len)
{
+ chunk_len = min(len - actual, page_size -
byte_addr);
+
+ cmd[1] = page_addr 8;
+ cmd[2] = page_addr;
+ cmd[3] = byte_addr;
+
+ ret = spi_flash_read_common(flash, cmd,
sizeof(cmd),
data + actual, chunk_len);
+ if (ret 0) {
+ debug(SF: read failed);
+ break;
+ }
- cmd[0] = CMD_READ_ARRAY_FAST;
- spi_flash_addr(offset, cmd);
- cmd[4] = 0x00;
+ byte_addr += chunk_len;
+ if (byte_addr == page_size) {
+ page_addr++;
+ byte_addr = 0;
+ }
+ }
- return spi_flash_read_common(flash, cmd,
sizeof(cmd),
data,
len);
+ return ret;
}
Any idea about this?
3. write (spi_flash_cmd_write_multi)
write not happening properly.
observations: only able to write single page, anything after
a
page
is
not getting
written.
Re: [U-Boot] U-boot: Erase/read/write issue with S25fl256S flash device
On 14-06-2013 20:13, Sourav Poddar wrote:
Hi Jagan,
On Friday 14 June 2013 08:08 PM, Jagan Teki wrote:
On 14-06-2013 20:03, Sourav Poddar wrote:
Hi,
On Wednesday 12 June 2013 01:00 PM, Sourav Poddar wrote:
Hi,
I am working on qspi flash device S25FL256S at u-boot level. I am
trying to
make use of the existing spi_flash.c framework available at u-boot for
erasing/reading/writing
into the flash device.
There are several issues(mentioned below), which I faced while using
S25FL256s flash device
with my dra7xx board which has a qspi controller to which the above
mentioned flash device is attached.
1. Erase (spi_flash_cmd_erase)
Issuing a command something like this..
sf erase 0x0 0x5
- erases only first 0x2 bytes of flash device, anything above
that is not erase. I need to
issue separate commands after 0x2 for every 0x1 bytes.
Am i missing anything here?
2. read
sf read 8100 0 0x1
Read is not happening properly. The last few byte along the 4k
boundary always shows zero.
Above 4k bytes, read is not happening.
For ex:
DRA752 EVM # md 81000f00
81000f00:
81000f10:
81000f20:
81000f30:
81000f40:
81000f50:
81000f60:
81000f70:
81000f80:
81000f90:
81000fa0:
81000fb0:
81000fc0:
81000fd0:
81000fe0:
81000ff0: 00ff
In this dump, if you see 81000ff0 the last column shows 00 which is
not expected. and it happens along every 4k bytes.
So, to get rid of the above issue, I switched to page read with the
below patch[1],
which is giving me the correct result.
[1]:
@@ -147,17 +153,40 @@ int spi_flash_read_common(struct spi_flash
*flash, const u8 *cmd,
int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
size_t len, void *data)
{
- u8 cmd[5];
+ unsigned long page_addr, byte_addr, page_size;
+ size_t chunk_len, actual;
+ int ret = 0;
+ u8 cmd[4];
/* Handle memory-mapped SPI */
if (flash-memory_map)
memcpy(data, flash-memory_map + offset, len);
+ page_size = flash-page_size;
+ page_addr = offset / page_size;
+ byte_addr = offset % page_size;
+
+ cmd[0] = CMD_READ_ARRAY_SLOW;
+ for (actual = 0; actual len; actual += chunk_len) {
+ chunk_len = min(len - actual, page_size - byte_addr);
+
+ cmd[1] = page_addr 8;
+ cmd[2] = page_addr;
+ cmd[3] = byte_addr;
+
+ ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
data + actual, chunk_len);
+ if (ret 0) {
+ debug(SF: read failed);
+ break;
+ }
- cmd[0] = CMD_READ_ARRAY_FAST;
- spi_flash_addr(offset, cmd);
- cmd[4] = 0x00;
+ byte_addr += chunk_len;
+ if (byte_addr == page_size) {
+ page_addr++;
+ byte_addr = 0;
+ }
+ }
- return spi_flash_read_common(flash, cmd, sizeof(cmd), data,
len);
+ return ret;
}
Any idea about this?
3. write (spi_flash_cmd_write_multi)
write not happening properly.
observations: only able to write single page, anything after a page is
not getting
written.
Workaround:
I did a write disable latch at the end of every write cycle(page
program) and enable it
again for the next loop. With this, I see I get rid of the above issue.
@@ -117,6 +117,12 @@ int spi_flash_cmd_write_multi(struct spi_flash
*flash, u32 offset,
if (ret)
break;
+ ret = spi_flash_cmd_write_disable(flash);
+ if (ret 0) {
+ printf(SF: disabling write failed\n);
+ break;
+ }
+
Have anyone seen the above mentioned issues regarding
read/write/erase? OR is there any
configurations that I might be missing ?
Any Input on this?
Please wait, I am pushing some changes tonight or so.
We will continue this thread, after testing your part with these new
changes.
I will intimate you once the push done.
--
Thanks,
Jagan.
Thanks a lot for the reply.
Sure,
Re: [U-Boot] U-boot: Erase/read/write issue with S25fl256S flash device
Hi,
On Wednesday 12 June 2013 01:00 PM, Sourav Poddar wrote:
Hi,
I am working on qspi flash device S25FL256S at u-boot level. I am
trying to
make use of the existing spi_flash.c framework available at u-boot for
erasing/reading/writing
into the flash device.
There are several issues(mentioned below), which I faced while using
S25FL256s flash device
with my dra7xx board which has a qspi controller to which the above
mentioned flash device is attached.
1. Erase (spi_flash_cmd_erase)
Issuing a command something like this..
sf erase 0x0 0x5
- erases only first 0x2 bytes of flash device, anything above
that is not erase. I need to
issue separate commands after 0x2 for every 0x1 bytes.
Am i missing anything here?
2. read
sf read 8100 0 0x1
Read is not happening properly. The last few byte along the 4k
boundary always shows zero.
Above 4k bytes, read is not happening.
For ex:
DRA752 EVM # md 81000f00
81000f00:
81000f10:
81000f20:
81000f30:
81000f40:
81000f50:
81000f60:
81000f70:
81000f80:
81000f90:
81000fa0:
81000fb0:
81000fc0:
81000fd0:
81000fe0:
81000ff0: 00ff
In this dump, if you see 81000ff0 the last column shows 00 which is
not expected. and it happens along every 4k bytes.
So, to get rid of the above issue, I switched to page read with the
below patch[1],
which is giving me the correct result.
[1]:
@@ -147,17 +153,40 @@ int spi_flash_read_common(struct spi_flash
*flash, const u8 *cmd,
int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
size_t len, void *data)
{
- u8 cmd[5];
+ unsigned long page_addr, byte_addr, page_size;
+ size_t chunk_len, actual;
+ int ret = 0;
+ u8 cmd[4];
/* Handle memory-mapped SPI */
if (flash-memory_map)
memcpy(data, flash-memory_map + offset, len);
+ page_size = flash-page_size;
+ page_addr = offset / page_size;
+ byte_addr = offset % page_size;
+
+ cmd[0] = CMD_READ_ARRAY_SLOW;
+ for (actual = 0; actual len; actual += chunk_len) {
+ chunk_len = min(len - actual, page_size - byte_addr);
+
+ cmd[1] = page_addr 8;
+ cmd[2] = page_addr;
+ cmd[3] = byte_addr;
+
+ ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
data + actual, chunk_len);
+ if (ret 0) {
+ debug(SF: read failed);
+ break;
+ }
- cmd[0] = CMD_READ_ARRAY_FAST;
- spi_flash_addr(offset, cmd);
- cmd[4] = 0x00;
+ byte_addr += chunk_len;
+ if (byte_addr == page_size) {
+ page_addr++;
+ byte_addr = 0;
+ }
+ }
- return spi_flash_read_common(flash, cmd, sizeof(cmd), data, len);
+ return ret;
}
Any idea about this?
3. write (spi_flash_cmd_write_multi)
write not happening properly.
observations: only able to write single page, anything after a page is
not getting
written.
Workaround:
I did a write disable latch at the end of every write cycle(page
program) and enable it
again for the next loop. With this, I see I get rid of the above issue.
@@ -117,6 +117,12 @@ int spi_flash_cmd_write_multi(struct spi_flash
*flash, u32 offset,
if (ret)
break;
+ ret = spi_flash_cmd_write_disable(flash);
+ if (ret 0) {
+ printf(SF: disabling write failed\n);
+ break;
+ }
+
Have anyone seen the above mentioned issues regarding
read/write/erase? OR is there any
configurations that I might be missing ?
Any Input on this?
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] U-boot: Erase/read/write issue with S25fl256S flash device
On 14-06-2013 20:03, Sourav Poddar wrote:
Hi,
On Wednesday 12 June 2013 01:00 PM, Sourav Poddar wrote:
Hi,
I am working on qspi flash device S25FL256S at u-boot level. I am
trying to
make use of the existing spi_flash.c framework available at u-boot for
erasing/reading/writing
into the flash device.
There are several issues(mentioned below), which I faced while using
S25FL256s flash device
with my dra7xx board which has a qspi controller to which the above
mentioned flash device is attached.
1. Erase (spi_flash_cmd_erase)
Issuing a command something like this..
sf erase 0x0 0x5
- erases only first 0x2 bytes of flash device, anything above
that is not erase. I need to
issue separate commands after 0x2 for every 0x1 bytes.
Am i missing anything here?
2. read
sf read 8100 0 0x1
Read is not happening properly. The last few byte along the 4k
boundary always shows zero.
Above 4k bytes, read is not happening.
For ex:
DRA752 EVM # md 81000f00
81000f00:
81000f10:
81000f20:
81000f30:
81000f40:
81000f50:
81000f60:
81000f70:
81000f80:
81000f90:
81000fa0:
81000fb0:
81000fc0:
81000fd0:
81000fe0:
81000ff0: 00ff
In this dump, if you see 81000ff0 the last column shows 00 which is
not expected. and it happens along every 4k bytes.
So, to get rid of the above issue, I switched to page read with the
below patch[1],
which is giving me the correct result.
[1]:
@@ -147,17 +153,40 @@ int spi_flash_read_common(struct spi_flash
*flash, const u8 *cmd,
int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
size_t len, void *data)
{
- u8 cmd[5];
+ unsigned long page_addr, byte_addr, page_size;
+ size_t chunk_len, actual;
+ int ret = 0;
+ u8 cmd[4];
/* Handle memory-mapped SPI */
if (flash-memory_map)
memcpy(data, flash-memory_map + offset, len);
+ page_size = flash-page_size;
+ page_addr = offset / page_size;
+ byte_addr = offset % page_size;
+
+ cmd[0] = CMD_READ_ARRAY_SLOW;
+ for (actual = 0; actual len; actual += chunk_len) {
+ chunk_len = min(len - actual, page_size - byte_addr);
+
+ cmd[1] = page_addr 8;
+ cmd[2] = page_addr;
+ cmd[3] = byte_addr;
+
+ ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
data + actual, chunk_len);
+ if (ret 0) {
+ debug(SF: read failed);
+ break;
+ }
- cmd[0] = CMD_READ_ARRAY_FAST;
- spi_flash_addr(offset, cmd);
- cmd[4] = 0x00;
+ byte_addr += chunk_len;
+ if (byte_addr == page_size) {
+ page_addr++;
+ byte_addr = 0;
+ }
+ }
- return spi_flash_read_common(flash, cmd, sizeof(cmd), data, len);
+ return ret;
}
Any idea about this?
3. write (spi_flash_cmd_write_multi)
write not happening properly.
observations: only able to write single page, anything after a page is
not getting
written.
Workaround:
I did a write disable latch at the end of every write cycle(page
program) and enable it
again for the next loop. With this, I see I get rid of the above issue.
@@ -117,6 +117,12 @@ int spi_flash_cmd_write_multi(struct spi_flash
*flash, u32 offset,
if (ret)
break;
+ ret = spi_flash_cmd_write_disable(flash);
+ if (ret 0) {
+ printf(SF: disabling write failed\n);
+ break;
+ }
+
Have anyone seen the above mentioned issues regarding
read/write/erase? OR is there any
configurations that I might be missing ?
Any Input on this?
Please wait, I am pushing some changes tonight or so.
We will continue this thread, after testing your part with these new
changes.
I will intimate you once the push done.
--
Thanks,
Jagan.
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] U-boot: Erase/read/write issue with S25fl256S flash device
Hi Jagan,
On Friday 14 June 2013 08:08 PM, Jagan Teki wrote:
On 14-06-2013 20:03, Sourav Poddar wrote:
Hi,
On Wednesday 12 June 2013 01:00 PM, Sourav Poddar wrote:
Hi,
I am working on qspi flash device S25FL256S at u-boot level. I am
trying to
make use of the existing spi_flash.c framework available at u-boot for
erasing/reading/writing
into the flash device.
There are several issues(mentioned below), which I faced while using
S25FL256s flash device
with my dra7xx board which has a qspi controller to which the above
mentioned flash device is attached.
1. Erase (spi_flash_cmd_erase)
Issuing a command something like this..
sf erase 0x0 0x5
- erases only first 0x2 bytes of flash device, anything above
that is not erase. I need to
issue separate commands after 0x2 for every 0x1 bytes.
Am i missing anything here?
2. read
sf read 8100 0 0x1
Read is not happening properly. The last few byte along the 4k
boundary always shows zero.
Above 4k bytes, read is not happening.
For ex:
DRA752 EVM # md 81000f00
81000f00:
81000f10:
81000f20:
81000f30:
81000f40:
81000f50:
81000f60:
81000f70:
81000f80:
81000f90:
81000fa0:
81000fb0:
81000fc0:
81000fd0:
81000fe0:
81000ff0: 00ff
In this dump, if you see 81000ff0 the last column shows 00 which is
not expected. and it happens along every 4k bytes.
So, to get rid of the above issue, I switched to page read with the
below patch[1],
which is giving me the correct result.
[1]:
@@ -147,17 +153,40 @@ int spi_flash_read_common(struct spi_flash
*flash, const u8 *cmd,
int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
size_t len, void *data)
{
- u8 cmd[5];
+ unsigned long page_addr, byte_addr, page_size;
+ size_t chunk_len, actual;
+ int ret = 0;
+ u8 cmd[4];
/* Handle memory-mapped SPI */
if (flash-memory_map)
memcpy(data, flash-memory_map + offset, len);
+ page_size = flash-page_size;
+ page_addr = offset / page_size;
+ byte_addr = offset % page_size;
+
+ cmd[0] = CMD_READ_ARRAY_SLOW;
+ for (actual = 0; actual len; actual += chunk_len) {
+ chunk_len = min(len - actual, page_size - byte_addr);
+
+ cmd[1] = page_addr 8;
+ cmd[2] = page_addr;
+ cmd[3] = byte_addr;
+
+ ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
data + actual, chunk_len);
+ if (ret 0) {
+ debug(SF: read failed);
+ break;
+ }
- cmd[0] = CMD_READ_ARRAY_FAST;
- spi_flash_addr(offset, cmd);
- cmd[4] = 0x00;
+ byte_addr += chunk_len;
+ if (byte_addr == page_size) {
+ page_addr++;
+ byte_addr = 0;
+ }
+ }
- return spi_flash_read_common(flash, cmd, sizeof(cmd), data,
len);
+ return ret;
}
Any idea about this?
3. write (spi_flash_cmd_write_multi)
write not happening properly.
observations: only able to write single page, anything after a page is
not getting
written.
Workaround:
I did a write disable latch at the end of every write cycle(page
program) and enable it
again for the next loop. With this, I see I get rid of the above issue.
@@ -117,6 +117,12 @@ int spi_flash_cmd_write_multi(struct spi_flash
*flash, u32 offset,
if (ret)
break;
+ ret = spi_flash_cmd_write_disable(flash);
+ if (ret 0) {
+ printf(SF: disabling write failed\n);
+ break;
+ }
+
Have anyone seen the above mentioned issues regarding
read/write/erase? OR is there any
configurations that I might be missing ?
Any Input on this?
Please wait, I am pushing some changes tonight or so.
We will continue this thread, after testing your part with these new
changes.
I will intimate you once the push done.
--
Thanks,
Jagan.
Thanks a lot for the reply.
Sure, will wait for your changes to go in.
