[PATCH 2/8] km/ls102xa: add support for u-boot POST memory test
>From production view this is standard test executed during production on
all linux based foxmc cards.
On CENT2 HW defined memory region is zero means that some DDR accesses are
done by memory_post_dataline and memory_post_addrline but pattern tests
are skipped that's why mem_regions is fast there.
On ls102x for the complete DDR region of 1GiB memory_regions_post_test
takes approx. 4min and this is too much for production, so this patch
defines only 1MiB region as compromise.
Signed-off-by: Aleksandar Gerasimovski
---
board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c | 34 +
include/configs/km/pg-wcom-ls102xa.h| 4 +++
2 files changed, 38 insertions(+)
diff --git a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c
b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c
index 69b5d21..97915f9 100644
--- a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c
+++ b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c
@@ -141,6 +141,40 @@ int ft_board_setup(void *blob, struct bd_info *bd)
return 0;
}
+#if defined(CONFIG_POST)
+int post_hotkeys_pressed(void)
+{
+ /* DIC26_SELFTEST: GPRTA0, GPA0 */
+ qrio_gpio_direction_input(QRIO_GPIO_A, 0);
+ return qrio_get_gpio(QRIO_GPIO_A, 0);
+}
+
+ulong post_word_load(void)
+{
+ /* POST word is located at the beginning of reserved physical RAM */
+ void *addr = (void *)(CONFIG_SYS_SDRAM_BASE +
+ gd->ram_size - CONFIG_KM_RESERVED_PRAM + 8);
+ return in_le32(addr);
+}
+
+void post_word_store(ulong value)
+{
+ /* POST word is located at the beginning of reserved physical RAM */
+ void *addr = (void *)(CONFIG_SYS_SDRAM_BASE +
+ gd->ram_size - CONFIG_KM_RESERVED_PRAM + 8);
+ out_le32(addr, value);
+}
+
+int arch_memory_test_prepare(u32 *vstart, u32 *size, phys_addr_t *phys_offset)
+{
+ /* Define only 1MiB range for mem_regions at the middle of the RAM */
+ /* For 1GiB range mem_regions takes approx. 4min */
+ *vstart = CONFIG_SYS_SDRAM_BASE + (gd->ram_size >> 1);
+ *size = 1 << 20;
+ return 0;
+}
+#endif
+
u8 flash_read8(void *addr)
{
return __raw_readb(addr + 1);
diff --git a/include/configs/km/pg-wcom-ls102xa.h
b/include/configs/km/pg-wcom-ls102xa.h
index 3d7519c..35bfa45 100644
--- a/include/configs/km/pg-wcom-ls102xa.h
+++ b/include/configs/km/pg-wcom-ls102xa.h
@@ -43,6 +43,10 @@
#define CONFIG_SYS_SPD_BUS_NUM 0
#define SPD_EEPROM_ADDRESS 0x54
+/* POST memory regions test */
+#define CONFIG_POST(CONFIG_SYS_POST_MEM_REGIONS)
+#define CONFIG_POST_EXTERNAL_WORD_FUNCS
+
/*
* IFC Definitions
*/
--
1.8.3.1
Re: U-Boot POST Memory Test
Thank you for your helpful response Heinrich. I have a question to further
clarify the purpose of post_bootmode_get().
You wrote,
> post_bootmode_get() tells you which type of tests should be executed.
> For tests after a watchdog reset it also returns the last executed test."
This makes sense. So, looking at the following code in post_run (post/post.c):
if (post_bootmode_get() & POST_POWERTEST) {
.
if (last < post_list_size &&
(flags & test_flags[last] & POST_ALWAYS) &&
(flags & test_flags[last] & POST_MEM)) {
last is initialized to 62 in the first line shown above; thus, the second
if-branch shown is not entered because 62 is not less than post_list_size
(which is 1). last returns the last executed test; however, I am confused
because this is the first call of post_run(), so I don't know what the "last
executed test" would be referring to.
Thus, my question is, what "last executed test" is last (and its value of 62)
representing in this case, and why is it preventing the code from entering the
shown if-branch?
Thank you again,
-Lewis
U-Boot POST Memory Test
Hello all, I am working on enabling a POST-based memory test for an ARM-based processor. I have defined CONFIG_POST CONFIG_SYS_POST_MEMORY in include/configs/.h; I have also defined CONFIG_POST_EXTERNAL_WORD_FUNCS and wrote some external word functions. U-Boot builds with no errors and works on the board; however, the memory test is not being run, and I'm trying to figure out why. Through some printf debugging I have determined that board_init_f() and board_init_r() are calling post_run(), as it should be (discussed in doc/README.POST). In trying to understand the code and what I can do to make this work, I have encountered some questions: 1. Since the memory test runs before U-Boot relocates to RAM, the memory test should be run during the post_run() call that happens in board_init_f() and not board_init_r(), correct? (I just want to clarify that I am understanding that correctly.) 1. What is the purpose of post_bootmode_get() (in post/post.c)? 1. In post_run() (in post/post.c), I noticed that an unsigned int called "last" is declared but never initialized with a value; however, "last" is then used as if it were initialized. Why is it that we can use this variable without initializing it, and what is the purpose of this variable? 1. Does memory_post_test() (as declared in post/tests.c and defined in post/drivers/memory.c) ever get called, and if so, where? 1. Ultimately, like I said, I am just trying to make the POST memory test work; if anyone has any suggestions as to what I can do to do this it would be greatly appreciated. Thank you, -Lewis
Re: U-Boot POST Memory Test
On 8/3/20 8:24 PM, Brownlie, Lewis wrote:
> Hello all,
>
> I am working on enabling a POST-based memory test for an ARM-based processor.
> I have defined CONFIG_POST CONFIG_SYS_POST_MEMORY in
> include/configs/.h; I have also defined
> CONFIG_POST_EXTERNAL_WORD_FUNCS and wrote some external word functions.
> U-Boot builds with no errors and works on the board; however, the memory test
> is not being run, and I'm trying to figure out why. Through some printf
> debugging I have determined that board_init_f() and board_init_r() are
> calling post_run(), as it should be (discussed in doc/README.POST). In
> trying to understand the code and what I can do to make this work, I have
> encountered some questions:
>
>
> 1. Since the memory test runs before U-Boot relocates to RAM, the memory
> test should be run during the post_run() call that happens in board_init_f()
> and not board_init_r(), correct? (I just want to clarify that I am
> understanding that correctly.)
The design is described in doc/README.POST.
>
>
>
> 1. What is the purpose of post_bootmode_get() (in post/post.c)?
post_bootmode_get() tells you which type of tests should be executed.
For tests after a watchdog reset it also returns the last executed test.
>
>
> 1. In post_run() (in post/post.c), I noticed that an unsigned int called
> "last" is declared but never initialized with a value; however, "last" is
> then used as if it were initialized. Why is it that we can use this variable
> without initializing it, and what is the purpose of this variable?
if (post_bootmode_get() & POST_POWERTEST) {
If the return value of post_bootmode_get contains the bit mask
POST_POWERTEST, last has been initialized.
>
>
> 1. Does memory_post_test() (as declared in post/tests.c and defined in
> post/drivers/memory.c) ever get called, and if so, where?
post_list[] defines the available tests. The memory test runs in either
of the states POST_ROM | POST_POWERON | POST_SLOWTEST | POST_PREREL.
>
>
> 1. Ultimately, like I said, I am just trying to make the POST memory test
> work; if anyone has any suggestions as to what I can do to do this it would
> be greatly appreciated.
I suggest that you try to run the memory test on qemu_arm64_defconfig.
There you can easily debug with gdb what is happening.
qemu-system-aarch64 -gdb tcp::1234 creates the debug port.
In a separate terminal:
gdb-multiarch u-boot -ex 'target remote localhost:1234'
add-symbol-file u-boot
where is the relocation address printed out in U-Boot by the
'bdinfo' command.
Best regards
Heinrich
[U-Boot] POST Memory Test Problem
Hi all, Im using a Freescale QorIQ P1020 custom board, booting from serial NOR flash (SPI), U-Boot 2014.10. It was everything OK, then I enabled POST memory test in my config file: #define CONFIG_POST CONFIG_SYS_POST_MEMORY When booting, the output is: - U-Boot 2014.10-6-gc81dc6b-dirty (Dec 22 2014 - 13:50:34) CPU0: P1020, Version: 1.1, (0x80e40011) Core: e500, Version: 5.1, (0x80212051) Clock Configuration: CPU0:800 MHz, CPU1:800 MHz, CCB:400 MHz, DDR:333.333 MHz (666.667 MT/s data rate) (Asynchronous), LBC:100 MHz L1:D-cache 32 KiB enabled I-cache 32 KiB enabled Board: P1020 Custom Board I2C: ready SPI: ready DRAM: Testing 0x - 0x3fff Remap DDR 1 GiB (DDR3, 32-bit, CL=5, ECC on) POST memory PASSED L2:256 KiB enabled ... - For a lot of u-boot commands (including booting Linux), everything works fine. But when I execute version command I got this error: - Bad trap at PC: a8fc, SR: 29200, vector=e00 NIP: A8FC XER: 2000 LR: A8FF REGS: 3ef2dc00 TRAP: 0e00 DAR: MSR: 00029200 EE: 1 PR: 0 FP: 0 ME: 1 IR/DR: 00 GPR00: A8FF 3EF2DCF0 3EF2DF14 03FD 000A 00FF GPR08: 0020 0020 0020 3EF2DCF0 3FF4F634 C9B5A0DA 3FFF05D4 3EF31A10 GPR16: 3FF8E6E8 3FF8E004 3EF31A10 3EF31A00 3EF31A30 GPR24: 3FFF0498 0001 3EF31A10 ACFF ABFF AAFF Call backtrace: Exception in kernel pc a8fc signal 0 ### ERROR ### Please RESET the board ### - Im afraid that this test is hiding another errors, because its testing the whole DDR range. And in post/tests.c the flag POST_ROM is set, but booting from NOR flash SPI we are in DDR since the beginning. Any ideas? Cheers, -- Allan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] POST Memory Test Problem
Dear Allan, In message cafxmsxy9jxw9k_lgbbc7hen66iyvk0ktfoamb41wv4nzk7v...@mail.gmail.com you wrote: Im using a Freescale QorIQ P1020 custom board, booting from serial NOR flash (SPI), U-Boot 2014.10. ... Im afraid that this test is hiding another errors, because its testing the whole DDR range. And in post/tests.c the flag POST_ROM is set, but I don't think so. I thiunk you're just misusing the test. booting from NOR flash SPI we are in DDR since the beginning. In case it is not obvious: you cannot run a memory test on the memory you are running from. You must make sure to run the POST memory test _before_ relocation to RAM. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de It's hard to make a program foolproof because fools are so ingenious. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] POST Memory Test Problem
On Mon, Dec 22, 2014 at 2:28 PM, Wolfgang Denk w...@denx.de wrote: Dear Allan, In message cafxmsxy9jxw9k_lgbbc7hen66iyvk0ktfoamb41wv4nzk7v...@mail.gmail.com you wrote: Im using a Freescale QorIQ P1020 custom board, booting from serial NOR flash (SPI), U-Boot 2014.10. ... Im afraid that this test is hiding another errors, because its testing the whole DDR range. And in post/tests.c the flag POST_ROM is set, but I don't think so. I thiunk you're just misusing the test. booting from NOR flash SPI we are in DDR since the beginning. In case it is not obvious: you cannot run a memory test on the memory you are running from. You must make sure to run the POST memory test _before_ relocation to RAM. So, is there an easy way to fix it when booting from NOR flash SPI? I thought only enabling it in the config file was enough. I changed POST_ROM to POST_RAM in post/tests.c, but I dont know if this is secure. In the past we executed mtest in the middle of DDR. Our company says that is mandatory the DDR test in initialization... Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de It's hard to make a program foolproof because fools are so ingenious. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
