[U-Boot] i.MX(6) dcache status?
Hi, now, after U-Boot v2012.07 is released, I'd like to ask what's the status the dcache support for i.MX(6)? Is it safe to enable CONFIG_SYS_DCACHE_OFF now? E.g. for the SabreLite [1]? And if so, do we have to enable CONFIG_MMC_BOUNCE_BUFFER, too? Opinions? Many thanks and best regards Dirk [1] http://git.denx.de/?p=u-boot.git;a=blob;f=include/configs/mx6qsabrelite.h;h=e42fe6b00b445e2ea0623fb682cb758fdf09c586;hb=HEAD#l238 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] i.MX(6) dcache status?
On 31.07.2012 07:56, Dirk Behme wrote: Hi, now, after U-Boot v2012.07 is released, I'd like to ask what's the status the dcache support for i.MX(6)? Is it safe to enable CONFIG_SYS_DCACHE_OFF now? Arg, inverted logic ;) I meant 'disable/remove' CONFIG_SYS_DCACHE_OFF here. I.e. is it save to _enable_ the dcache now? Dirk E.g. for the SabreLite [1]? And if so, do we have to enable CONFIG_MMC_BOUNCE_BUFFER, too? Opinions? Many thanks and best regards Dirk [1] http://git.denx.de/?p=u-boot.git;a=blob;f=include/configs/mx6qsabrelite.h;h=e42fe6b00b445e2ea0623fb682cb758fdf09c586;hb=HEAD#l238 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] kirkwood: Add support for the D-Link DNS-320
-Original Message- From: Jamie Lentin [mailto:j...@lentin.co.uk] Sent: 31 July 2012 03:26 To: u-boot@lists.denx.de Cc: Prafulla Wadaskar; albert.u.b...@aribaud.net; ub...@lukaperkov.net; Jamie Lentin Subject: [PATCH 2/2] kirkwood: Add support for the D-Link DNS-320 Extend dnskw to support the D-Link DNS-320 ShareCenter NAS also. For more information on this NAS, see:- http://jamie.lentin.co.uk/devices/dlink-dns320 http://dns323.kood.org/dns-320 http://sharecenter.dlink.com/products/DNS-320 Signed-off-by: Jamie Lentin j...@lentin.co.uk Cc: prafu...@marvell.com Cc: albert.u.b...@aribaud.net --- MAINTAINERS|4 + board/d-link/dnskw/dnskw.c |8 +- board/d-link/dnskw/dnskw.h |6 + board/d-link/dnskw/kwbimage.dns320.cfg | 207 boards.cfg |1 + include/configs/dnskw.h| 10 ++ 6 files changed, 232 insertions(+), 4 deletions(-) create mode 100644 board/d-link/dnskw/kwbimage.dns320.cfg diff --git a/MAINTAINERS b/MAINTAINERS index fd0c65c..92ede1f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -673,6 +673,10 @@ Igor Grinberg grinb...@compulab.co.il cm-t35 ARM ARMV7 (OMAP3xx Soc) +Jamie Lentin j...@lentin.co.uk + + dns320 ARM926EJS (Kirkwood SoC) + Stefan Herbrechtsmeier ste...@code.herbrechtsmeier.net dns325 ARM926EJS (Kirkwood SoC) diff --git a/board/d-link/dnskw/dnskw.c b/board/d-link/dnskw/dnskw.c index d29735c..cd6bfe9 100644 --- a/board/d-link/dnskw/dnskw.c +++ b/board/d-link/dnskw/dnskw.c @@ -58,8 +58,8 @@ int board_early_init_f(void) MPP10_UART0_TXD, MPP11_UART0_RXD, MPP12_SD_CLK, - MPP13_SD_CMD, - MPP14_SD_D0, + MPP13_UART1_TXD,/* Custom ...*/ + MPP14_UART1_RXD,/* ... controller */ Are these entries valid for both boards? If not then encapsulate with #ifdef MPP15_SD_D1, MPP16_SD_D2, MPP17_SD_D3, @@ -74,13 +74,13 @@ int board_early_init_f(void) MPP26_GPIO, /* power led */ MPP27_GPIO, /* sata0(right) error led */ MPP28_GPIO, /* sata1(left) error led */ - MPP29_GPIO, /* usb error led */ + MPP29_GPIO, /* usb error led (dns-325) */ Ditto MPP30_GPIO, MPP31_GPIO, MPP32_GPIO, MPP33_GPIO, MPP34_GPIO, /* power key */ - MPP35_GPIO, + MPP35_GPIO, /* usb error led (dns-320) */ Ditto MPP36_GPIO, MPP37_GPIO, MPP38_GPIO, diff --git a/board/d-link/dnskw/dnskw.h b/board/d-link/dnskw/dnskw.h index 4b11cb6..8886050 100644 --- a/board/d-link/dnskw/dnskw.h +++ b/board/d-link/dnskw/dnskw.h @@ -43,6 +43,12 @@ #define DNSKW_OE_VAL_HIGH0x0800 /* disable leds */ #endif /* CONFIG_BOARD_IS_DNS325 */ +/* DNS-320 specific configuration */ +#ifdef CONFIG_BOARD_IS_DNS320 +#define DNSKW_OE_VAL_LOW 0x3800 /* disable leds */ +#define DNSKW_OE_VAL_HIGH0x0808 /* disable leds */ +#endif /* CONFIG_BOARD_IS_DNS320 */ + /* PHY related */ #define MV88E1116_MAC_CTRL_REG 21 #define MV88E1116_PGADR_REG 22 diff --git a/board/d-link/dnskw/kwbimage.dns320.cfg b/board/d- link/dnskw/kwbimage.dns320.cfg new file mode 100644 index 000..5fb4052 --- /dev/null +++ b/board/d-link/dnskw/kwbimage.dns320.cfg @@ -0,0 +1,207 @@ +# +# Copyright (C) 2012 +# Jamie Lentin j...@lentin.co.uk +# +# Based on dns325 support: +# Copyright (C) 2011 +# Stefan Herbrechtsmeier ste...@code.herbrechtsmeier.net +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# +# Refer docs/README.kwimage for more details about how-to configure +# and create kirkwood boot image +# + +# Boot Media configurations +BOOT_FROMnand +NAND_ECC_MODEdefault +NAND_PAGE_SIZE 0x0800 + +#
Re: [U-Boot] [PATCH] lsxl: support power switch
-Original Message-
From: Michael Walle [mailto:mich...@walle.cc]
Sent: 31 July 2012 02:17
To: u-boot@lists.denx.de
Cc: Michael Walle; Prafulla Wadaskar
Subject: [PATCH] lsxl: support power switch
This patch restores the Linkstation's original behaviour when powering
off.
Once the (soft) power switch is turned off, linux will reboot and the
bootloader turns off HDD and USB power. Then it loops as long as the
switch
is in the off position, before continuing the boot process again.
Additionally, this patch fixes the board function set_led(LED_OFF).
Signed-off-by: Michael Walle mich...@walle.cc
Cc: Prafulla Wadaskar prafu...@marvell.com
---
board/buffalo/lsxl/lsxl.c | 22 +-
1 files changed, 21 insertions(+), 1 deletions(-)
diff --git a/board/buffalo/lsxl/lsxl.c b/board/buffalo/lsxl/lsxl.c
index fe15511..b3f31d6 100644
--- a/board/buffalo/lsxl/lsxl.c
+++ b/board/buffalo/lsxl/lsxl.c
@@ -158,7 +158,7 @@ static void set_led(int state)
{
switch (state) {
case LED_OFF:
- __set_led(0, 0, 0, 0, 0, 0);
+ __set_led(0, 0, 0, 1, 1, 1);
break;
case LED_ALARM_ON:
__set_led(0, 0, 0, 0, 1, 1);
@@ -192,6 +192,25 @@ int board_init(void)
}
#ifdef CONFIG_MISC_INIT_R
+static void check_power_switch(void)
+{
+ if (kw_gpio_get_value(GPIO_POWER_SWITCH)) {
+ /* turn off HDD and USB power */
+ kw_gpio_set_value(GPIO_HDD_POWER, 0);
+ kw_gpio_set_value(GPIO_USB_VBUS, 0);
+ set_led(LED_OFF);
+
+ /* loop until released */
+ while (kw_gpio_get_value(GPIO_POWER_SWITCH))
+ ;
Please avoid infinite loop, may you introduce timeout?
+
+ /* turn power on again */
+ kw_gpio_set_value(GPIO_HDD_POWER, 1);
+ kw_gpio_set_value(GPIO_USB_VBUS, 1);
+ set_led(LED_POWER_BLINKING);
+ }
+}
+
void check_enetaddr(void)
{
uchar enetaddr[6];
@@ -261,6 +280,7 @@ static void check_push_button(void)
int misc_init_r(void)
{
+ check_power_switch();
check_enetaddr();
check_push_button();
Ack for rest of the code.
Regards...
Prafulla . . .
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Re: [U-Boot] [PATCH v4 0/6] tegra: Add NAND flash support
On Sun, Jul 29, 2012 at 11:53:24PM -0700, Simon Glass wrote: This series adds NAND flash support to Tegra and enables it on Seaboard. Included here is a proposed device tree binding with most of the properties private to nvidia,. The binding includes information about the NAND controller as well as the connected NAND device. The Seaboard has a Hynix HY27UF4G2B. The driver supports ECC-based access and uses DMA and NAND acceleration features of the Tegra SOC to provide access at reasonable speed. There is an issue with the nand dump command, but it was easy to fix. I'll send a patch along with support on TEC which I've tested this on successfully: Tested-by: Thierry Reding thierry.red...@avionic-design.de pgpKEh86NubWG.pgp Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] cmd_nand: dump: Align data and OOB buffers
In order for cache invalidation and flushing to work properly, the data
and OOB buffers must be aligned to full cache lines.
Signed-off-by: Thierry Reding thierry.red...@avionic-design.de
---
common/cmd_nand.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/common/cmd_nand.c b/common/cmd_nand.c
index a91ccf4..4367f5a 100644
--- a/common/cmd_nand.c
+++ b/common/cmd_nand.c
@@ -48,8 +48,8 @@ static int nand_dump(nand_info_t *nand, ulong off, int
only_oob, int repeat)
last = off;
- datbuf = malloc(nand-writesize);
- oobbuf = malloc(nand-oobsize);
+ datbuf = memalign(ARCH_DMA_MINALIGN, nand-writesize);
+ oobbuf = memalign(ARCH_DMA_MINALIGN, nand-oobsize);
if (!datbuf || !oobbuf) {
puts(No memory for page buffer\n);
return 1;
--
1.7.11.3
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[U-Boot] [PATCH 2/2] tegra: Enable NAND on TEC
This commit enables NAND support on the Tamonten Evaluation Carrier and
adds the corresponding device tree nodes. Furthermore, the U-Boot
environment can now be stored in NAND.
Signed-off-by: Thierry Reding thierry.red...@avionic-design.de
---
board/avionic-design/dts/tegra20-tec.dts | 11 +++
include/configs/tec.h| 12 ++--
2 files changed, 21 insertions(+), 2 deletions(-)
diff --git a/board/avionic-design/dts/tegra20-tec.dts
b/board/avionic-design/dts/tegra20-tec.dts
index 9faebd8..bb3851b 100644
--- a/board/avionic-design/dts/tegra20-tec.dts
+++ b/board/avionic-design/dts/tegra20-tec.dts
@@ -55,4 +55,15 @@
usb@c5004000 {
status = disabled;
};
+
+ nand-controller@70008000 {
+ nvidia,wp-gpios = gpio 23 0; /* PC7 */
+ nvidia,width = 8;
+ nvidia,timing = 26 100 20 80 20 10 12 10 70;
+
+ nand@0 {
+ reg = 0;
+ compatible = hynix,hy27uf4g2b, nand-flash;
+ };
+ };
};
diff --git a/include/configs/tec.h b/include/configs/tec.h
index 9b3f88d..54fcd41 100644
--- a/include/configs/tec.h
+++ b/include/configs/tec.h
@@ -45,14 +45,22 @@
#define CONFIG_BOARD_EARLY_INIT_F
-#define CONFIG_ENV_IS_NOWHERE
-
/* SD/MMC */
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_TEGRA_MMC
#define CONFIG_CMD_MMC
+/* NAND support */
+#define CONFIG_CMD_NAND
+#define CONFIG_TEGRA_NAND
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_SYS_NAND_BASE TEGRA20_NAND_BASE
+
+/* Environment not stored */
+#define CONFIG_ENV_IS_IN_NAND
+#define CONFIG_ENV_OFFSET (SZ_512M - SZ_128K) /* 128K sector size
*/
+
/* USB host support */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_TEGRA
--
1.7.11.3
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[U-Boot] Help with u-boot
Hello Help make a u-bottles for sti7109 for mb442 motherboards and Linux to boot in 32bit mode. (now loaded in 29bit mode) Thanks in advance. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 1/7] dfu:usb: Support for g_dnl composite download gadget.
Composite USB download gadget support (g_dnl) for download functions.
This code works on top of composite gadget.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Marek Vasut ma...@denx.de
---
Changes for v2:
- G_DNL_{VENDOR_NUM, PRODUCT_NUM and MANUFACTURER} defined at
./include/configs/board.h
- Suspend and resume stub methods removed
- '\0' repleaced with plain 0
Changes for v3:
- Remove unused #includes
- Replace strncpy and strncat with strcpy and strcat. It was possible
due to new approach to g_dnl name generation (at g_dnl_register function)
- Rename the g_dnl_{init|cleanup} to g_dnl_{register|unregister}
- Replace the G_DNL_* CONFIG_G_DNL_*
---
drivers/usb/gadget/Makefile |1 +
drivers/usb/gadget/g_dnl.c | 218 +++
include/g_dnl.h | 33 +++
3 files changed, 252 insertions(+), 0 deletions(-)
create mode 100644 drivers/usb/gadget/g_dnl.c
create mode 100644 include/g_dnl.h
diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
index 87d1918..2c067c8 100644
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
@@ -29,6 +29,7 @@ LIB := $(obj)libusb_gadget.o
ifdef CONFIG_USB_GADGET
COBJS-y += epautoconf.o config.o usbstring.o
COBJS-$(CONFIG_USB_GADGET_S3C_UDC_OTG) += s3c_udc_otg.o
+COBJS-$(CONFIG_USBDOWNLOAD_GADGET) += g_dnl.o
endif
ifdef CONFIG_USB_ETHER
COBJS-y += ether.o epautoconf.o config.o usbstring.o
diff --git a/drivers/usb/gadget/g_dnl.c b/drivers/usb/gadget/g_dnl.c
new file mode 100644
index 000..a77da30
--- /dev/null
+++ b/drivers/usb/gadget/g_dnl.c
@@ -0,0 +1,218 @@
+/*
+ * g_dnl.c -- USB Downloader Gadget
+ *
+ * Copyright (C) 2012 Samsung Electronics
+ * Lukasz Majewski l.majew...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include errno.h
+#include common.h
+#include malloc.h
+
+#include mmc.h
+#include part.h
+
+#include g_dnl.h
+#include f_dfu.h
+
+#include gadget_chips.h
+#include composite.c
+
+/*
+ * One needs to define the following:
+ * CONFIG_G_DNL_VENDOR_NUM
+ * CONFIG_G_DNL_PRODUCT_NUM
+ * CONFIG_G_DNL_MANUFACTURER
+ * at e.g. ./include/configs/board.h
+ */
+
+#define STRING_MANUFACTURER 25
+#define STRING_PRODUCT 2
+#define STRING_USBDOWN 2
+#define CONFIG_USBDOWNLOADER 2
+
+#define DRIVER_VERSION usb_dnl 2.0
+
+static const char shortname[] = usb_dnl_;
+static const char product[] = USB download gadget;
+static const char manufacturer[] = CONFIG_G_DNL_MANUFACTURER;
+
+static struct usb_device_descriptor device_desc = {
+ .bLength = sizeof device_desc,
+ .bDescriptorType = USB_DT_DEVICE,
+
+ .bcdUSB = __constant_cpu_to_le16(0x0200),
+ .bDeviceClass = USB_CLASS_COMM,
+ .bDeviceSubClass = 0x02, /*0x02:CDC-modem , 0x00:CDC-serial*/
+
+ .idVendor = __constant_cpu_to_le16(CONFIG_G_DNL_VENDOR_NUM),
+ .idProduct =__constant_cpu_to_le16(CONFIG_G_DNL_PRODUCT_NUM),
+ .iProduct = STRING_PRODUCT,
+ .bNumConfigurations = 1,
+};
+
+static const struct usb_descriptor_header *otg_desc[] = {
+ (struct usb_descriptor_header *) (struct usb_otg_descriptor){
+ .bLength = sizeof(struct usb_otg_descriptor),
+ .bDescriptorType = USB_DT_OTG,
+ .bmAttributes = USB_OTG_SRP,
+ },
+ NULL,
+};
+
+/* static strings, in UTF-8 */
+static struct usb_string odin_string_defs[] = {
+ { 0, manufacturer, },
+ { 1, product, },
+};
+
+static struct usb_gadget_strings odin_string_tab = {
+ .language = 0x0409, /* en-us */
+ .strings= odin_string_defs,
+};
+
+static struct usb_gadget_strings *g_dnl_composite_strings[] = {
+ odin_string_tab,
+ NULL,
+};
+
+static int g_dnl_unbind(struct usb_composite_dev *cdev)
+{
+ debug(%s\n, __func__);
+ return 0;
+}
+
+static int g_dnl_do_config(struct usb_configuration *c)
+{
+ int ret = -1;
+ char *s = (char *) c-cdev-driver-name;
+
+ debug(%s: configuration: 0x%p composite dev: 0x%p\n,
+ __func__, c, c-cdev);
+
+ if (gadget_is_otg(c-cdev-gadget)) {
+ c-descriptors = otg_desc;
+
[U-Boot] [PATCH v3 0/7] dfu:usb: DFU support via USB Download gadget
Those patches add support for composite USB download gadget. This gadget (at least for now) is equipped with DFU download function. A separate DFU back-end and front-end have been added. Back-end is placed at ./drivers/dfu directory. The front-end is implemented as USB function. The back-end is written in a generic manner with storage device specific code separated (eMMC). DFU specification can be found at: http://wiki.openmoko.org/wiki/USB_DFU_-_The_USB_Device_Firmware_Upgrade_standard Example usage: u-boot side: dfu mmc 0 PC: dfu-util -U IMAGE.bin -a uImage (for upload) dfu-util -D uImage -a uImage (download) To list the alt settings: dfu mmc 0 list Test HW: Exynos4210 Trats board Lukasz Majewski (7): dfu:usb: Support for g_dnl composite download gadget. dfu:usb: DFU USB function (f_dfu) support for g_dnl composite gadget dfu: DFU backend implementation dfu: MMC specific routines for DFU operation dfu:cmd: Support for DFU u-boot command arm:trats: Support for USB UDC driver at TRATS board. arm:trats: Enable g_dnl composite USB gadget with embedded DFU function on TRATS Makefile|1 + board/samsung/trats/trats.c |8 + common/Makefile |1 + common/cmd_dfu.c| 81 + drivers/dfu/Makefile| 44 +++ drivers/dfu/dfu.c | 237 ++ drivers/dfu/dfu_mmc.c | 165 ++ drivers/usb/gadget/Makefile |2 + drivers/usb/gadget/f_dfu.c | 751 +++ drivers/usb/gadget/f_dfu.h | 100 ++ drivers/usb/gadget/g_dnl.c | 218 + include/configs/trats.h | 24 ++- include/dfu.h | 103 ++ include/g_dnl.h | 33 ++ 14 files changed, 1767 insertions(+), 1 deletions(-) create mode 100644 common/cmd_dfu.c create mode 100644 drivers/dfu/Makefile create mode 100644 drivers/dfu/dfu.c create mode 100644 drivers/dfu/dfu_mmc.c create mode 100644 drivers/usb/gadget/f_dfu.c create mode 100644 drivers/usb/gadget/f_dfu.h create mode 100644 drivers/usb/gadget/g_dnl.c create mode 100644 include/dfu.h create mode 100644 include/g_dnl.h -- 1.7.2.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 3/7] dfu: DFU backend implementation
New, separate driver at ./drivers/dfu has been added. It allows platform
and storage independent operation of DFU.
It has been extended to use new MMC level of command abstraction.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Marek Vasut ma...@denx.de
---
Changes for v2:
- None
Changes for v3:
- Remove unnecessary NULL and 0 initialization of dynamic variables
- Combine two puts to one
- Adding const qualifier to device and layout definitions
- Remove unnecessary casting at dfu-name passing
- Provide more meaningful names for dfu layouts and device types
- Removal of dfu_extract_{token|entity} functions and replace them
with strsep calls
---
Makefile |1 +
drivers/dfu/Makefile | 43 +
drivers/dfu/dfu.c| 237 ++
include/dfu.h| 103 ++
4 files changed, 384 insertions(+), 0 deletions(-)
create mode 100644 drivers/dfu/Makefile
create mode 100644 drivers/dfu/dfu.c
create mode 100644 include/dfu.h
diff --git a/Makefile b/Makefile
index d57c15e..bd469f4 100644
--- a/Makefile
+++ b/Makefile
@@ -271,6 +271,7 @@ LIBS += drivers/pci/libpci.o
LIBS += drivers/pcmcia/libpcmcia.o
LIBS += drivers/power/libpower.o
LIBS += drivers/spi/libspi.o
+LIBS += drivers/dfu/libdfu.o
ifeq ($(CPU),mpc83xx)
LIBS += drivers/qe/libqe.o
LIBS += arch/powerpc/cpu/mpc8xxx/ddr/libddr.o
diff --git a/drivers/dfu/Makefile b/drivers/dfu/Makefile
new file mode 100644
index 000..7736485
--- /dev/null
+++ b/drivers/dfu/Makefile
@@ -0,0 +1,43 @@
+#
+# Copyright (C) 2012 Samsung Electronics
+# Lukasz Majewski l.majew...@samsung.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)libdfu.o
+
+COBJS-$(CONFIG_DFU_FUNCTION) += dfu.o
+
+SRCS:= $(COBJS-y:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS-y))
+
+$(LIB):$(obj).depend $(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
new file mode 100644
index 000..8f48b49
--- /dev/null
+++ b/drivers/dfu/dfu.c
@@ -0,0 +1,237 @@
+/*
+ * dfu.c -- DFU back-end routines
+ *
+ * Copyright (C) 2012 Samsung Electronics
+ * author: Lukasz Majewski l.majew...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include common.h
+#include malloc.h
+#include mmc.h
+#include fat.h
+#include dfu.h
+#include linux/list.h
+#include linux/compiler.h
+
+static LIST_HEAD(dfu_list);
+static int dfu_alt_num;
+
+static int dfu_find_alt_num(char *s)
+{
+ int i = 0;
+
+ for (; *s; s++)
+ if (*s == ';')
+ i++;
+
+ return ++i;
+}
+
+static unsigned char __aligned(CONFIG_SYS_CACHELINE_SIZE)
+dfu_buf[DFU_DATA_BUF_SIZE];
+
+int dfu_write(struct dfu_entity *dfu, void *buf, int size, int blk_seq_num)
+{
+ static unsigned char *i_buf;
+ static int i_blk_seq_num;
+ long w_size = 0;
+ int ret = 0;
+
+ debug(%s: name: %s buf: 0x%p size: 0x%x p_num: 0x%x i_buf: 0x%p\n,
+ __func__, dfu-name, buf, size, blk_seq_num, i_buf);
+
+ if (blk_seq_num == 0) {
+ memset(dfu_buf, '\0', sizeof(dfu_buf));
+ i_buf = dfu_buf;
+
[U-Boot] [PATCH v3 5/7] dfu:cmd: Support for DFU u-boot command
Support for u-boot's dfu interface dev [list] command.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Marek Vasut ma...@denx.de
---
Changes for v2:
- None
Changes for v3:
- Remove unnecessary initialization to NULL of dynamic variables
- goto done added to reduce code duplication
- static definition of do_dfu()
---
common/Makefile |1 +
common/cmd_dfu.c | 81 ++
2 files changed, 82 insertions(+), 0 deletions(-)
create mode 100644 common/cmd_dfu.c
diff --git a/common/Makefile b/common/Makefile
index 483eb4d..32d44e5 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -183,6 +183,7 @@ COBJS-$(CONFIG_MENU) += menu.o
COBJS-$(CONFIG_MODEM_SUPPORT) += modem.o
COBJS-$(CONFIG_UPDATE_TFTP) += update.o
COBJS-$(CONFIG_USB_KEYBOARD) += usb_kbd.o
+COBJS-$(CONFIG_CMD_DFU) += cmd_dfu.o
endif
ifdef CONFIG_SPL_BUILD
diff --git a/common/cmd_dfu.c b/common/cmd_dfu.c
new file mode 100644
index 000..72efb60
--- /dev/null
+++ b/common/cmd_dfu.c
@@ -0,0 +1,81 @@
+/*
+ * cmd_dfu.c -- dfu command
+ *
+ * Copyright (C) 2012 Samsung Electronics
+ * authors: Andrzej Pietrasiewicz andrze...@samsung.com
+ * Lukasz Majewski l.majew...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include common.h
+#include command.h
+#include malloc.h
+#include dfu.h
+#include asm/errno.h
+#include g_dnl.h
+
+static int do_dfu(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ static char *s = dfu;
+ const char *str_env;
+ char *env_bkp;
+ int ret;
+
+ if (argc 3)
+ return CMD_RET_USAGE;
+
+ str_env = getenv(dfu_alt_info);
+ if (str_env == NULL) {
+ printf(%s: \dfu_alt_info\ env variable not defined!\n,
+ __func__);
+ return CMD_RET_FAILURE;
+ }
+
+ env_bkp = strdup(str_env);
+ ret = dfu_config_entities(env_bkp, argv[1],
+ (int)simple_strtoul(argv[2], NULL, 10));
+ if (ret)
+ return CMD_RET_FAILURE;
+
+ if (strcmp(argv[3], list) == 0) {
+ dfu_show_entities();
+ goto done;
+ }
+
+ board_usb_init();
+ g_dnl_register(s);
+ while (1) {
+ if (ctrlc())
+ goto exit;
+
+ usb_gadget_handle_interrupts();
+ }
+exit:
+ g_dnl_unregister();
+done:
+ dfu_free_entities();
+ free(env_bkp);
+
+ return CMD_RET_SUCCESS;
+}
+
+U_BOOT_CMD(dfu, CONFIG_SYS_MAXARGS, 1, do_dfu,
+ Device Firmware Upgrade,
+ interface dev [list]\n
+ - device firmware upgrade on a device dev\n
+ attached to interface interface\n
+ [list] - list available alt settings
+);
--
1.7.2.3
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[U-Boot] [PATCH v3 4/7] dfu: MMC specific routines for DFU operation
Support for MMC storage devices to work with DFU framework.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Marek Vasut ma...@denx.de
---
Changes for v2:
- None
Changes for v3:
- Provide special abstraction layer (mmc_{block|file}_{read|write})
to alleviate switch to new device model (DM)
- More verbose messages when not supported layout encountered
- Calls to strncmp() replaced with strcmp()
---
drivers/dfu/Makefile |1 +
drivers/dfu/dfu_mmc.c | 165 +
2 files changed, 166 insertions(+), 0 deletions(-)
create mode 100644 drivers/dfu/dfu_mmc.c
diff --git a/drivers/dfu/Makefile b/drivers/dfu/Makefile
index 7736485..7b717bc 100644
--- a/drivers/dfu/Makefile
+++ b/drivers/dfu/Makefile
@@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk
LIB= $(obj)libdfu.o
COBJS-$(CONFIG_DFU_FUNCTION) += dfu.o
+COBJS-$(CONFIG_DFU_MMC) += dfu_mmc.o
SRCS:= $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
diff --git a/drivers/dfu/dfu_mmc.c b/drivers/dfu/dfu_mmc.c
new file mode 100644
index 000..3909910
--- /dev/null
+++ b/drivers/dfu/dfu_mmc.c
@@ -0,0 +1,165 @@
+/*
+ * dfu.c -- DFU back-end routines
+ *
+ * Copyright (C) 2012 Samsung Electronics
+ * author: Lukasz Majewski l.majew...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include common.h
+#include malloc.h
+#include dfu.h
+
+enum dfu_mmc_op {
+ DFU_OP_READ = 1,
+ DFU_OP_WRITE,
+};
+
+static int mmc_block_op(enum dfu_mmc_op op, struct dfu_entity *dfu,
+ void *buf, long *len)
+{
+ ALLOC_CACHE_ALIGN_BUFFER(char, cmd_buf, DFU_CMD_BUF_SIZE);
+ memset(cmd_buf, '\0', sizeof(cmd_buf));
+
+ sprintf(cmd_buf, mmc %s 0x%x %x %x,
+ op == DFU_OP_READ ? read : write,
+ (unsigned int) buf,
+ dfu-data.mmc.lba_start,
+ dfu-data.mmc.lba_size);
+
+ if (op == DFU_OP_READ)
+ *len = dfu-data.mmc.lba_blk_size * dfu-data.mmc.lba_size;
+
+ debug(%s: %s 0x%p\n, __func__, cmd_buf, cmd_buf);
+ return run_command(cmd_buf, 0);
+}
+
+static inline int mmc_block_write(struct dfu_entity *dfu, void *buf, long *len)
+{
+ return mmc_block_op(DFU_OP_WRITE, dfu, buf, len);
+}
+
+static inline int mmc_block_read(struct dfu_entity *dfu, void *buf, long *len)
+{
+ return mmc_block_op(DFU_OP_READ, dfu, buf, len);
+}
+
+static int mmc_file_op(enum dfu_mmc_op op, struct dfu_entity *dfu,
+ void *buf, long *len)
+{
+ ALLOC_CACHE_ALIGN_BUFFER(char, cmd_buf, DFU_CMD_BUF_SIZE);
+ char *str_env;
+ int ret;
+
+ memset(cmd_buf, '\0', sizeof(cmd_buf));
+
+ sprintf(cmd_buf, fat%s mmc %d:%d 0x%x %s %lx,
+ op == DFU_OP_READ ? load : write,
+ dfu-data.mmc.dev, dfu-data.mmc.part,
+ (unsigned int) buf, dfu-name, *len);
+
+ debug(%s: %s 0x%p\n, __func__, cmd_buf, cmd_buf);
+
+ ret = run_command(cmd_buf, 0);
+ if (ret) {
+ puts(dfu: Read error!\n);
+ return ret;
+ }
+
+ if (dfu-layout != DFU_RAW_ADDR) {
+ str_env = getenv(filesize);
+ if (str_env == NULL) {
+ puts(dfu: Wrong file size!\n);
+ return -1;
+ }
+ *len = simple_strtoul(str_env, NULL, 16);
+ }
+
+ return ret;
+}
+
+static inline int mmc_file_write(struct dfu_entity *dfu, void *buf, long *len)
+{
+ return mmc_file_op(DFU_OP_WRITE, dfu, buf, len);
+}
+
+static inline int mmc_file_read(struct dfu_entity *dfu, void *buf, long *len)
+{
+ return mmc_file_op(DFU_OP_READ, dfu, buf, len);
+}
+
+int dfu_write_medium_mmc(struct dfu_entity *dfu, void *buf, long *len)
+{
+ int ret = -1;
+
+ switch (dfu-layout) {
+ case DFU_RAW_ADDR:
+ ret = mmc_block_write(dfu, buf, len);
+ break;
+ case DFU_FS_FAT:
+ ret = mmc_file_write(dfu, buf, len);
+ break;
+ default:
+ printf(%s: Layout (%s) not (yet) supported!\n, __func__,
+ dfu_get_layout(dfu-layout));
+ }
+
+ return ret;
+}
+
+int
[U-Boot] [PATCH v3 2/7] dfu:usb: DFU USB function (f_dfu) support for g_dnl composite gadget
Support for f_dfu USB function.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Marek Vasut ma...@denx.de
---
Changes for v2:
- Replace kzalloc and kfree with free and calloc
- Reorganization of calloc calls
- Misspelling corrected
- Redesign of DFU state machine from switch case to function pointers
- Split the dfu_handle method to separate functions for each DFU state
Changes for v3:
- Missing parenthesis added to sizeof call
---
drivers/usb/gadget/Makefile |1 +
drivers/usb/gadget/f_dfu.c | 751 +++
drivers/usb/gadget/f_dfu.h | 100 ++
3 files changed, 852 insertions(+), 0 deletions(-)
create mode 100644 drivers/usb/gadget/f_dfu.c
create mode 100644 drivers/usb/gadget/f_dfu.h
diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
index 2c067c8..5bbdd36 100644
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
@@ -30,6 +30,7 @@ ifdef CONFIG_USB_GADGET
COBJS-y += epautoconf.o config.o usbstring.o
COBJS-$(CONFIG_USB_GADGET_S3C_UDC_OTG) += s3c_udc_otg.o
COBJS-$(CONFIG_USBDOWNLOAD_GADGET) += g_dnl.o
+COBJS-$(CONFIG_DFU_FUNCTION) += f_dfu.o
endif
ifdef CONFIG_USB_ETHER
COBJS-y += ether.o epautoconf.o config.o usbstring.o
diff --git a/drivers/usb/gadget/f_dfu.c b/drivers/usb/gadget/f_dfu.c
new file mode 100644
index 000..17b656c
--- /dev/null
+++ b/drivers/usb/gadget/f_dfu.c
@@ -0,0 +1,751 @@
+/*
+ * f_dfu.c -- Device Firmware Update USB function
+ *
+ * Copyright (C) 2012 Samsung Electronics
+ * authors: Andrzej Pietrasiewicz andrze...@samsung.com
+ * Lukasz Majewski l.majew...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include errno.h
+#include common.h
+#include malloc.h
+
+#include linux/usb/ch9.h
+#include usbdescriptors.h
+#include linux/usb/gadget.h
+#include linux/usb/composite.h
+
+#include dfu.h
+#include f_dfu.h
+
+struct f_dfu {
+ struct usb_function usb_function;
+
+ struct usb_descriptor_header**function;
+ struct usb_string *strings;
+
+ /* when configured, we have one config */
+ u8 config;
+ u8 altsetting;
+ enum dfu_state dfu_state;
+ unsigned intdfu_status;
+
+ /* Send/received block number is handy for data integrity check */
+ int blk_seq_num;
+};
+
+typedef int (*dfu_state_fn) (struct f_dfu *,
+const struct usb_ctrlrequest *,
+struct usb_gadget *,
+struct usb_request *);
+
+static inline struct f_dfu *func_to_dfu(struct usb_function *f)
+{
+ return container_of(f, struct f_dfu, usb_function);
+}
+
+static const struct dfu_function_descriptor dfu_func = {
+ .bLength = sizeof dfu_func,
+ .bDescriptorType = DFU_DT_FUNC,
+ .bmAttributes = DFU_BIT_WILL_DETACH |
+ DFU_BIT_MANIFESTATION_TOLERANT |
+ DFU_BIT_CAN_UPLOAD |
+ DFU_BIT_CAN_DNLOAD,
+ .wDetachTimeOut = 0,
+ .wTransferSize =DFU_USB_BUFSIZ,
+ .bcdDFUVersion =__constant_cpu_to_le16(0x0110),
+};
+
+static struct usb_interface_descriptor dfu_intf_runtime = {
+ .bLength = sizeof dfu_intf_runtime,
+ .bDescriptorType = USB_DT_INTERFACE,
+ .bNumEndpoints =0,
+ .bInterfaceClass = USB_CLASS_APP_SPEC,
+ .bInterfaceSubClass = 1,
+ .bInterfaceProtocol = 1,
+ /* .iInterface = DYNAMIC */
+};
+
+static struct usb_descriptor_header *dfu_runtime_descs[] = {
+ (struct usb_descriptor_header *) dfu_intf_runtime,
+ NULL,
+};
+
+static struct usb_qualifier_descriptor dev_qualifier = {
+ .bLength = sizeof dev_qualifier,
+ .bDescriptorType = USB_DT_DEVICE_QUALIFIER,
+ .bcdUSB = __constant_cpu_to_le16(0x0200),
+ .bDeviceClass = USB_CLASS_VENDOR_SPEC,
+ .bNumConfigurations = 1,
+};
+
+static const char dfu_name[] = Device Firmware Upgrade;
+
+/*
+ * static strings, in
[U-Boot] [PATCH v3 6/7] arm:trats: Support for USB UDC driver at TRATS board.
Support for USB UDC driver at trats board.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Marek Vasut ma...@denx.de
Cc: Minkyu Kang mk7.k...@samsung.com
---
Changes for v2:
- replace puts to debug
---
board/samsung/trats/trats.c |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index a8b2b11..4f9cb5a 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -59,6 +59,8 @@ static int hwrevision(int rev)
return (board_rev 0xf) == rev;
}
+struct s3c_plat_otg_data s5pc210_otg_data;
+
int board_init(void)
{
gd-bd-bi_boot_params = PHYS_SDRAM_1 + 0x100;
@@ -259,6 +261,12 @@ struct s3c_plat_otg_data s5pc210_otg_data = {
.usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL,
.usb_flags = PHY0_SLEEP,
};
+
+void board_usb_init(void)
+{
+ debug(USB_udc_probe\n);
+ s3c_udc_probe(s5pc210_otg_data);
+}
#endif
static void pmic_reset(void)
--
1.7.2.3
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[U-Boot] [PATCH v3 7/7] arm:trats: Enable g_dnl composite USB gadget with embedded DFU function on TRATS
Enable the g_dnl composite USB gadget driver with embedded DFU function on it.
It now uses the composite gadget framework to support download specific
USB functions (like enabled DFU or USB Mass Storage).
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Marek Vasut ma...@denx.de
Cc: Minkyu Kang mk7.k...@samsung.com
---
Change for v2:
- Move the G_DNL_{VENDOR_NUM, PRODUCT_NUM and MANUFACTURER} definitions to
./include/configs/board.h
Changes for v3:
- None
---
include/configs/trats.h | 24 +++-
1 files changed, 23 insertions(+), 1 deletions(-)
diff --git a/include/configs/trats.h b/include/configs/trats.h
index eb269b2..75a23b0 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -94,6 +94,21 @@
#undef CONFIG_CMD_ONENAND
#undef CONFIG_CMD_MTDPARTS
#define CONFIG_CMD_MMC
+#define CONFIG_CMD_DFU
+
+/* FAT */
+#define CONFIG_CMD_FAT
+#define CONFIG_FAT_WRITE
+
+/* USB Composite download gadget - g_dnl */
+#define CONFIG_USBDOWNLOAD_GADGET
+#define CONFIG_DFU_FUNCTION
+#define CONFIG_DFU_MMC
+
+/* USB Samsung's IDs */
+#define CONFIG_G_DNL_VENDOR_NUM 0x04E8
+#define CONFIG_G_DNL_PRODUCT_NUM 0x6601
+#define CONFIG_G_DNL_MANUFACTURER Samsung
#define CONFIG_BOOTDELAY 1
#define CONFIG_ZERO_BOOTDELAY_CHECK
@@ -104,6 +119,11 @@
#define CONFIG_BOOTBLOCK 10
#define CONFIG_ENV_COMMON_BOOT ${console} ${meminfo}
+#define CONFIG_DFU_ALT \
+ dfu_alt_info= \
+ u-boot mmc 80 400; \
+ uImage fat 0 2\0 \
+
#define CONFIG_ENV_OVERWRITE
#define CONFIG_SYS_CONSOLE_INFO_QUIET
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
@@ -146,7 +166,8 @@
mmcdev=0\0 \
mmcbootpart=2\0 \
mmcrootpart=3\0 \
- opts=always_resume=1
+ opts=always_resume=1\0 \
+ CONFIG_DFU_ALT
/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP/* undef to save memory */
@@ -209,6 +230,7 @@
#define CONFIG_USB_GADGET
#define CONFIG_USB_GADGET_S3C_UDC_OTG
#define CONFIG_USB_GADGET_DUALSPEED
+#define CONFIG_USB_GADGET_VBUS_DRAW2
/* LCD */
#define CONFIG_EXYNOS_FB
--
1.7.2.3
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Re: [U-Boot] [PATCH 1/2] cmd_nand: dump: Align data and OOB buffers
+Scott
On Tue, Jul 31, 2012 at 7:21 AM, Thierry Reding
thierry.red...@avionic-design.de wrote:
In order for cache invalidation and flushing to work properly, the data
and OOB buffers must be aligned to full cache lines.
Signed-off-by: Thierry Reding thierry.red...@avionic-design.de
Acked-by: Simon Glass s...@chromium.org
---
common/cmd_nand.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/common/cmd_nand.c b/common/cmd_nand.c
index a91ccf4..4367f5a 100644
--- a/common/cmd_nand.c
+++ b/common/cmd_nand.c
@@ -48,8 +48,8 @@ static int nand_dump(nand_info_t *nand, ulong off, int
only_oob, int repeat)
last = off;
- datbuf = malloc(nand-writesize);
- oobbuf = malloc(nand-oobsize);
+ datbuf = memalign(ARCH_DMA_MINALIGN, nand-writesize);
+ oobbuf = memalign(ARCH_DMA_MINALIGN, nand-oobsize);
if (!datbuf || !oobbuf) {
puts(No memory for page buffer\n);
return 1;
--
1.7.11.3
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[U-Boot] [PATCH 1/2] add ST PSD4256G6V to table of supported legacy flashs
The BF533-EZKIT boards have this old ST flash.
Signed-off-by: Mike Frysinger vap...@gentoo.org
---
drivers/mtd/jedec_flash.c | 20
1 file changed, 20 insertions(+)
diff --git a/drivers/mtd/jedec_flash.c b/drivers/mtd/jedec_flash.c
index 2350f36..b6cb037 100644
--- a/drivers/mtd/jedec_flash.c
+++ b/drivers/mtd/jedec_flash.c
@@ -30,6 +30,7 @@
/*#define DEBUG*/
#include common.h
+#include mtd/cfi_flash.h
#include asm/processor.h
#include asm/io.h
#include asm/byteorder.h
@@ -58,6 +59,9 @@
#define AM29F032B 0x0041
#define AM29F002T 0x00B0
+/* ST - www.st.com */
+#define PSD4256G6V 0x00e9
+
/* SST */
#define SST39LF800 0x2781
#define SST39LF160 0x2782
@@ -367,6 +371,22 @@ static const struct amd_flash_info jedec_table[] = {
}
},
#endif
+#ifdef CONFIG_SYS_FLASH_LEGACY_1Mx16
+ {
+ .mfr_id = (u16)STM_MANUFACT,
+ .dev_id = 0xff00 | PSD4256G6V,
+ .name = ST PSD4256G6V,
+ .uaddr = {
+ [1] = MTD_UADDR_0x0555_0x0AAA /* x16 */
+ },
+ .DevSize= SIZE_1MiB,
+ .CmdSet = CFI_CMDSET_AMD_STANDARD,
+ .NumEraseRegions= 4,
+ .regions= {
+ ERASEINFO(0x1, 16),
+ }
+ },
+#endif
};
static inline void fill_info(flash_info_t *info, const struct amd_flash_info
*jedec_entry, ulong base)
--
1.7.9.7
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[U-Boot] [PATCH 2/2] Blackfin: bf533-ezkit: convert to CFI flash driver
Signed-off-by: Mike Frysinger vap...@gentoo.org
---
board/bf533-ezkit/Makefile|2 +-
board/bf533-ezkit/bf533-ezkit.c | 22 +-
board/bf533-ezkit/flash-defines.h | 124 --
board/bf533-ezkit/flash.c | 489 -
include/configs/bf533-ezkit.h | 14 +-
5 files changed, 26 insertions(+), 625 deletions(-)
delete mode 100644 board/bf533-ezkit/flash-defines.h
delete mode 100644 board/bf533-ezkit/flash.c
diff --git a/board/bf533-ezkit/Makefile b/board/bf533-ezkit/Makefile
index 5fb51da..505a831 100644
--- a/board/bf533-ezkit/Makefile
+++ b/board/bf533-ezkit/Makefile
@@ -29,7 +29,7 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(BOARD).o
-COBJS-y:= $(BOARD).o flash.o
+COBJS-y:= $(BOARD).o
SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
diff --git a/board/bf533-ezkit/bf533-ezkit.c b/board/bf533-ezkit/bf533-ezkit.c
index b1aa7b7..c883815 100644
--- a/board/bf533-ezkit/bf533-ezkit.c
+++ b/board/bf533-ezkit/bf533-ezkit.c
@@ -27,8 +27,8 @@
#include common.h
#include netdev.h
+#include asm/io.h
#include psd4256.h
-#include flash-defines.h
DECLARE_GLOBAL_DATA_PTR;
@@ -42,16 +42,24 @@ int checkboard(void)
/* miscellaneous platform dependent initialisations */
int misc_init_r(void)
{
- /* Set direction bits for Video en/decoder reset as output */
- *(volatile unsigned char *)(CONFIG_SYS_FLASH1_BASE + PSD_PORTA_DIR) =
- PSDA_VDEC_RST | PSDA_VENC_RST;
- /* Deactivate Video en/decoder reset lines */
- *(volatile unsigned char *)(CONFIG_SYS_FLASH1_BASE + PSD_PORTA_DOUT) =
- PSDA_VDEC_RST | PSDA_VENC_RST;
+ /* Set direction bits for Video en/decoder reset as output */
+ writeb(PSDA_VDEC_RST | PSDA_VENC_RST, 0x2020 + PSD_PORTA_DIR);
+ /* Deactivate Video en/decoder reset lines */
+ writeb(PSDA_VDEC_RST | PSDA_VENC_RST, 0x2020 + PSD_PORTA_DOUT);
return 0;
}
+#ifdef CONFIG_FLASH_CFI_LEGACY
+ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
+{
+ info-portwidth = FLASH_CFI_16BIT;
+ info-chipwidth = 2;
+ info-interface = FLASH_CFI_X16;
+ return 1;
+}
+#endif
+
#ifdef CONFIG_SMC9
int board_eth_init(bd_t *bis)
{
diff --git a/board/bf533-ezkit/flash-defines.h
b/board/bf533-ezkit/flash-defines.h
deleted file mode 100644
index eb0af94..000
diff --git a/board/bf533-ezkit/flash.c b/board/bf533-ezkit/flash.c
deleted file mode 100644
index ab808d8..000
diff --git a/include/configs/bf533-ezkit.h b/include/configs/bf533-ezkit.h
index c1a5ecd..e32ba4c 100644
--- a/include/configs/bf533-ezkit.h
+++ b/include/configs/bf533-ezkit.h
@@ -80,15 +80,21 @@
/*
- * Flash Settings
+ * Flash Settings (PSD4256)
*/
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_FLASH_CFI_LEGACY
+#define CONFIG_SYS_FLASH_LEGACY_1Mx16
#define CONFIG_SYS_FLASH_BASE 0x2000
-#define CONFIG_SYS_MAX_FLASH_BANKS 3
-#define CONFIG_SYS_MAX_FLASH_SECT 40
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_SYS_FLASH_CFI_AMD_RESET
+#define CONFIG_SYS_MAX_FLASH_BANKS 2
+#define CONFIG_SYS_MAX_FLASH_SECT 20
+#define CONFIG_SYS_FLASH_BANKS_LIST{ 0x2000, 0x2010 }
+
#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_ADDR0x2003
#define CONFIG_ENV_SECT_SIZE 0x1
-#define FLASH_TOT_SECT 40
/*
--
1.7.9.7
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Re: [U-Boot] [U-Boot-DM] List of offending drivers
On Friday 27 July 2012 00:41:45 Wolfgang Denk wrote: Marek Vasut wrote: Check the following list, it's the list of drivers scattered (misplaced) across the tree. The list is not complete and might be inaccurate. But it should give a good impression of what I'm going to break soon: board/bf533-ezkit/flash.c 1) old versions of flash drivers that predate the cfi flash implementation, so they could be replaced by the CFI driver (if there was someone to test this) yep. this driver is wicked old, and has since languished for a few reasons: - the people who wrote it originally were (are) not exactly great programmers. in fact, they were pretty terrible. - this particular board is one of the first Blackfins to see a real open source port, but the board itself isn't terribly developer friendly, so no one pays too much attention to it. - the flash does not support the CFI query command which means none of the stock CFI code would work out of the box (it does use the AMD CFI commandset though). - the flash is funky -- it's two chips in a single package which leads to quite a bit of confusion, and it also has SRAM areas on it ! - the Blackfin maintainers who took over weren't terribly familiar with the CFI spec (i would say i only have a little familiarity at a higher level). at any rate, i was able to figure out the JEDEC probe logic in Linux somewhat recently to make it work there, and so i ported that to u-boot which means we can drop this old driver (patches already posted). seems to probe/read/erase/write just fine, so ship it ;). board/bct-brettl2/gpio_cfi_flash.c board/cm-bf527/gpio_cfi_flash.c board/cm-bf537e/gpio_cfi_flash.c board/cm-bf537u/gpio_cfi_flash.c board/tcm-bf537/gpio_cfi_flash.c 2) very special versions of flash drivers dealing with board specific details that prevent the use of the CFI flash driver, in which case they should remain in the board directories. yep. these are merely glue to support the flashes on these boards that use GPIO's for additional address lines. they actually use the common CFI code already. there is a thread from a while ago discussing how to make these work better in the larger u-boot framework (NOR flashes which are not fully directly mapped), but i honestly don't think i'll ever get around to implementing that idea. i have no job that requires it, and only had a passing interest in implementing it ;). -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] Add support for Bluegiga APX4 Development Kit
Hello Stefano, Could you review the patch? Thanks! Best Regards, Lauri Hintsala On 07/09/2012 04:14 PM, Veli-Pekka Peltola wrote: This adds support for Bluegiga APX4 Development Kit. It is built around Freescale i.MX28. Currently supported features are: ethernet, I2C, MMC, RTC and USB. APX4 has only one ethernet port. Signed-off-by: Veli-Pekka Peltola veli-pekka.pelt...@bluegiga.com Signed-off-by: Lauri Hintsala lauri.hints...@bluegiga.com Cc: Stefano Babic sba...@denx.de --- Changes after v1 from last December: - Updating MAINTAINERS file which I missed last time - Started to use SPL - Increased size of environment on NAND - Better commit message Our strategy to use fuses differs from other i.MX28 based boards. We store serial number to CUST3. We don't have ethernet MAC address on fuses so our customers could use their own address range. If I have some time later this week or next week, I will do some refactorization on that so we could have generic OTP reading function. MAINTAINERS|4 + board/bluegiga/apx4devkit/Makefile | 47 +++ board/bluegiga/apx4devkit/apx4devkit.c | 150 board/bluegiga/apx4devkit/spl_boot.c | 164 ++ board/bluegiga/apx4devkit/u-boot.bd| 14 ++ boards.cfg |1 + include/configs/apx4devkit.h | 238 7 files changed, 618 insertions(+) create mode 100644 board/bluegiga/apx4devkit/Makefile create mode 100644 board/bluegiga/apx4devkit/apx4devkit.c create mode 100644 board/bluegiga/apx4devkit/spl_boot.c create mode 100644 board/bluegiga/apx4devkit/u-boot.bd create mode 100644 include/configs/apx4devkit.h diff --git a/MAINTAINERS b/MAINTAINERS index 54eeab7..5c3fc6e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -784,6 +784,10 @@ Linus Walleij linus.wall...@linaro.org integratorapvarious integratorcpvarious +Veli-Pekka Peltola veli-pekka.pelt...@bluegiga.com + + apx4devkit i.MX28 + Luka Perkov ub...@lukaperkov.net ib62x0 ARM926EJS diff --git a/board/bluegiga/apx4devkit/Makefile b/board/bluegiga/apx4devkit/Makefile new file mode 100644 index 000..68ab8f3 --- /dev/null +++ b/board/bluegiga/apx4devkit/Makefile @@ -0,0 +1,47 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, w...@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).o + +ifndef CONFIG_SPL_BUILD +COBJS := apx4devkit.o +else +COBJS := spl_boot.o +endif + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +$(LIB):$(obj).depend $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/board/bluegiga/apx4devkit/apx4devkit.c b/board/bluegiga/apx4devkit/apx4devkit.c new file mode 100644 index 000..c89c6aa --- /dev/null +++ b/board/bluegiga/apx4devkit/apx4devkit.c @@ -0,0 +1,150 @@ +/* + * Bluegiga APX4 Development Kit + * + * Copyright (C) 2012 Bluegiga Technologies Oy + * + * Authors: + * Veli-Pekka Peltola veli-pekka.pelt...@bluegiga.com + * Lauri Hintsala lauri.hints...@bluegiga.com + * + * Based on m28evk.c: + * Copyright (C) 2011 Marek Vasut marek.va...@gmail.com + * on behalf of DENX Software Engineering GmbH + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include common.h +#include asm/gpio.h +#include asm/io.h +#include
Re: [U-Boot] [PATCH] dm: mips: Import libgcc components from Linux
On Friday 27 July 2012 15:10:00 Marek Vasut wrote: Dear Mike Frysinger, On Friday 27 July 2012 14:35:25 Marek Vasut wrote: --- a/arch/mips/lib/Makefile +++ b/arch/mips/lib/Makefile @@ -34,6 +34,8 @@ else COBJS-y += bootm.o endif +COBJS-y += ashldi3.o ashrdi3.o lshrdi3.o pretty sure this belongs behind USE_PRIVATE_LIBGCC Good point ... Mike, I was always wondering what this USE_PRIVATE_LIBGCC is, can you elaborate please (pour some of your knowledge on me ;-) ) ? libgcc is a supplemental library that gcc provides that often times contains extended routines (usually written in assembly) for implementing math functions that the hardware does not provide itself in the form of dedicated instructions. most commonly, this takes the form of multiplication/divide routines. x86 tends to be fat and provide instructions like mul and div, but embedded arches like arm/blackfin/mips/etc... tend to have simpler instructions so we have to implement these in software. the problem comes in when the toolchain is built targeting an ABI/float model that differs from what we want in u-boot. Linux has long avoided this problem by always bundling the libgcc source files directly into its arch/ tree. it pulls in the bare min that it needs, and then never links with -lgcc. u-boot has taken the opposite approach: it links against -lgcc for math routines rather than keeping a copy of its own. this leads to the problem you noticed with mips, but many of us have hit it with arm. for the longest time, the party line was use a different toolchain. but that's often impractical (if not almost impossible) for many users/devs, so the compromise has been the USE_PRIVATE_LIBGCC knob. now the ABI of the libgcc that comes with your toolchain does not matter because it isn't linked in -- we just compile (for the right ABI) local copies of the math routines, and then link against those. personally, i wouldn't mind converting everyone to USE_PRIVATE_LIBGCC (and match exactly what Linux has been doing for ages), but i can live with the USE_PRIVATE_LIBGCC trade off. -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [i2c] Pull request
Hello Wolfgang,
The following changes since commit b98b611502f5e0a85a1f8e15cf46c470cb105614:
Merge branch 'next' of git://git.denx.de/u-boot (2012-07-30 20:39:52 +0200)
are available in the git repository at:
git://git.denx.de/u-boot-i2c.git master
Holger Brunck (2):
i2c: deblock i2c bus also if accessed before realocation
km/common: remove printfs for i2c deblocking code
Rajeshwari Shinde (8):
EXYNOS: CLK: Add i2c clock
EXYNOS: Add I2C base address.
EXYNOS5: define EXYNOS5_I2C_SPACING
EXYNOS: PINMUX: Add pinmux support for I2C
I2C: Move struct s3c24x0_i2c to a common place.
I2C: Modify the I2C driver for EXYNOS5
I2C: Add support for Multi channel
CONFIG: SMDK5250: I2C: Enable I2C
Troy Kisky (25):
mxc_i2c: fix i2c_imx_stop
mxc_i2c: remove ifdef of CONFIG_HARD_I2C
mxc_i2c: create tx_byte function
mxc_i2c: clear i2sr before waiting for bit
mxc_i2c: create i2c_init_transfer
mxc_i2c: call i2c_imx_stop on error in i2c_read/i2c_write
mxc_i2c.c: code i2c_probe as a 0 length i2c_write
mxc_i2c: combine i2c_imx_bus_busy and i2c_imx_trx_complete into
wait_for_sr_state
mxc_i2c: remove redundant read
mxc_i2c: place imx_start code inline
mxc_i2c: place i2c_reset code inline
mxc_i2c: don't disable controller after every transaction
mxc_i2c: change slave addr if conflicts with destination.
mxc_i2c: check for arbitration lost
mxc_i2c: add retries
mxc_i2c: add i2c_regs argument to i2c_imx_stop
mxc_i2c: prep work for multiple busses support
mxc_i2c: add bus recovery support
mxc_i2c: finish adding CONFIG_I2C_MULTI_BUS support
iomux-v3: remove include of mx6x_pins.h
i.mx: iomux-v3.h: move to imx-common include directory
i.mx: iomux-v3.c: move to imx-common directory
i.mx53: add definition for I2C3_BASE_ADDR
imx-common: add i2c.c for bus recovery support
mx6qsabrelite: add i2c multi-bus support
arch/arm/cpu/armv7/exynos/clock.c | 33 ++
arch/arm/cpu/armv7/exynos/pinmux.c | 52 +++
arch/arm/cpu/armv7/imx-common/Makefile |4 +-
arch/arm/cpu/armv7/imx-common/i2c.c| 99
arch/arm/cpu/armv7/{mx6 = imx-common}/iomux-v3.c |3 +-
arch/arm/cpu/armv7/mx5/clock.c | 20 +
arch/arm/cpu/armv7/mx6/Makefile|2 +-
arch/arm/cpu/armv7/mx6/clock.c | 20 +
arch/arm/include/asm/arch-exynos/clk.h |1 +
arch/arm/include/asm/arch-exynos/cpu.h |5 +
arch/arm/include/asm/arch-exynos/periph.h |8 +
arch/arm/include/asm/arch-mx5/clock.h |1 +
arch/arm/include/asm/arch-mx5/imx-regs.h |1 +
arch/arm/include/asm/arch-mx6/clock.h |1 +
arch/arm/include/asm/arch-mx6/mx6x_pins.h |2 +-
arch/arm/include/asm/arch-s3c24x0/s3c24x0.h| 10 -
.../asm/{arch-mx6 = imx-common}/iomux-v3.h|0
arch/arm/include/asm/imx-common/mxc_i2c.h | 42 ++
board/freescale/mx6qarm2/mx6qarm2.c|2 +-
board/freescale/mx6qsabrelite/mx6qsabrelite.c | 54 ++-
board/keymile/common/common.c |3 -
board/samsung/smdk5250/smdk5250.c | 30 ++-
common/cmd_i2c.c |1 +
drivers/i2c/mxc_i2c.c | 477 +++-
drivers/i2c/s3c24x0_i2c.c | 221 ++
drivers/i2c/s3c24x0_i2c.h | 33 ++
drivers/usb/host/ehci-mx6.c|2 +-
include/configs/mx6qsabrelite.h|6 +-
include/configs/smdk5250.h | 10 +
29 files changed, 822 insertions(+), 321 deletions(-)
create mode 100644 arch/arm/cpu/armv7/imx-common/i2c.c
rename arch/arm/cpu/armv7/{mx6 = imx-common}/iomux-v3.c (97%)
rename arch/arm/include/asm/{arch-mx6 = imx-common}/iomux-v3.h (100%)
create mode 100644 arch/arm/include/asm/imx-common/mxc_i2c.h
create mode 100644 drivers/i2c/s3c24x0_i2c.h
A MAKEALL arm with ELDK-5.2 compiled fine:
[hs@pollux u-boot-i2c]$ eldk-switch -r 5.2 armv5te
Setup for armv5te (using ELDK 5.2)
[hs@pollux u-boot-i2c]$ ./MAKEALL arm
[...]
- SUMMARY
Boards compiled: 303
--
bye,
Heiko
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Re: [U-Boot] [PATCH 1/2] COMMON: Add __stringify() function
On Saturday 28 July 2012 15:57:33 Wolfgang Denk wrote: Marek Vasut wrote: include/common.h |7 +++ 1 file changed, 7 insertions(+) We have similar things already, and we don't add dead code - you add a macro without users here. It's used in 2/2 ... what macro do you have in mind ? Then add it with the patch that uses it. As for existing use, see for example there's also MK_STR() and XMK_STR(). would be good to import linux/stringify.h (rather than adding these macros to common.h) and converting all consumers over to that. -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] building u-boot inside buildroot
On Sunday 29 July 2012 08:43:00 Sabri Altunbas wrote: I installed buildroot as my embedded linux environment. For first time I can build u-boot. But if i change a c-file and try to recompile u-boot. It doesn,t work. Buildroot doesn,t notice this changing and does nothing. this is a buildroot question. please use the buildroot lists for support. -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 6/7] arm:trats: Support for USB UDC driver at TRATS board.
On 31 July 2012 15:37, Lukasz Majewski l.majew...@samsung.com wrote: Support for USB UDC driver at trats board. Signed-off-by: Lukasz Majewski l.majew...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com Cc: Marek Vasut ma...@denx.de Cc: Minkyu Kang mk7.k...@samsung.com --- Changes for v2: - replace puts to debug --- board/samsung/trats/trats.c |8 1 files changed, 8 insertions(+), 0 deletions(-) Acked-by: Minkyu Kang mk7.k...@samsung.com Thanks. Minkyu Kang. -- from. prom. www.promsoft.net ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 7/7] arm:trats: Enable g_dnl composite USB gadget with embedded DFU function on TRATS
On 31 July 2012 15:37, Lukasz Majewski l.majew...@samsung.com wrote:
Enable the g_dnl composite USB gadget driver with embedded DFU function on it.
It now uses the composite gadget framework to support download specific
USB functions (like enabled DFU or USB Mass Storage).
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Marek Vasut ma...@denx.de
Cc: Minkyu Kang mk7.k...@samsung.com
---
Change for v2:
- Move the G_DNL_{VENDOR_NUM, PRODUCT_NUM and MANUFACTURER} definitions to
./include/configs/board.h
Changes for v3:
- None
---
include/configs/trats.h | 24 +++-
1 files changed, 23 insertions(+), 1 deletions(-)
Acked-by: Minkyu Kang mk7.k...@samsung.com
Thanks.
Minkyu Kang.
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Re: [U-Boot] [PATCH 01/17] omap3/omap4/omap5/am33xx: Use a common running_from_sdram function
Hi Tom, [snip..] diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h index 7f05cb5..c697e0b 100644 --- a/arch/arm/include/asm/arch-omap5/omap.h +++ b/arch/arm/include/asm/arch-omap5/omap.h @@ -39,11 +39,6 @@ #define OMAP54XX_L4_WKUP_BASE 0x4Ae0 #define OMAP54XX_L4_PER_BASE 0x4800 -#define OMAP54XX_DRAM_ADDR_SPACE_START 0x8000 -#define OMAP54XX_DRAM_ADDR_SPACE_END 0x -#define DRAM_ADDR_SPACE_START OMAP54XX_DRAM_ADDR_SPACE_START -#define DRAM_ADDR_SPACE_ENDOMAP54XX_DRAM_ADDR_SPACE_END - This is a problem for OMAP5, which has a trap section at 0xFF00 with in the sdram boundary. OMAP5 evm board has 2GB of memory from 0x8000 - 0x. Size of the trap section should not be included in the total sdram size. Thanks, Sricharan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] remove usb_test_unit_ready from usb_stor_read+usb_stor_write
From: Jim Shimer jamesshi...@motorola.com
---
common/usb_storage.c |4
1 file changed, 4 insertions(+)
diff --git a/common/usb_storage.c b/common/usb_storage.c
index bdc306f..c5c37a4 100644
--- a/common/usb_storage.c
+++ b/common/usb_storage.c
@@ -1074,12 +1074,14 @@ unsigned long usb_stor_read(int device, unsigned long
blknr,
buf_addr = (unsigned long)buffer;
start = blknr;
blks = blkcnt;
+#if 0
if (usb_test_unit_ready(srb, ss)) {
printf(Device NOT ready\n Request Sense returned %02X %02X
%02X\n, srb-sense_buf[2], srb-sense_buf[12],
srb-sense_buf[13]);
return 0;
}
+#endif
USB_STOR_PRINTF(\nusb_read: dev %d startblk %lx, blccnt %lx
buffer %lx\n, device, start, blks, buf_addr);
@@ -1153,12 +1155,14 @@ unsigned long usb_stor_write(int device, unsigned long
blknr,
buf_addr = (unsigned long)buffer;
start = blknr;
blks = blkcnt;
+#if 0
if (usb_test_unit_ready(srb, ss)) {
printf(Device NOT ready\n Request Sense returned %02X %02X
%02X\n, srb-sense_buf[2], srb-sense_buf[12],
srb-sense_buf[13]);
return 0;
}
+#endif
USB_STOR_PRINTF(\nusb_write: dev %d startblk %lx, blccnt %lx
buffer %lx\n, device, start, blks, buf_addr);
--
1.7.9.5
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[U-Boot] [PATCH] fix out of tree building with kallsyms
The call to SYSTEM_MAP assumes that the u-boot output is in $PWD when
it really should be in $(obj). This fixes building out of tree.
Signed-off-by: Mike Frysinger vap...@gentoo.org
---
Makefile |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Makefile b/Makefile
index eb37ea1..3605ab8 100644
--- a/Makefile
+++ b/Makefile
@@ -490,7 +490,7 @@ $(obj)u-boot: depend \
$(SUBDIR_TOOLS) $(OBJS) $(LIBBOARD) $(LIBS) $(LDSCRIPT)
$(obj)u-boot.lds
$(GEN_UBOOT)
ifeq ($(CONFIG_KALLSYMS),y)
- smap=`$(call SYSTEM_MAP,u-boot) | \
+ smap=`$(call SYSTEM_MAP,$(obj)u-boot) | \
awk '$$2 ~ /[tTwW]/ {printf $$1 $$3 000}'` ; \
$(CC) $(CFLAGS) -DSYSTEM_MAP=\$${smap}\ \
-c common/system_map.c -o $(obj)common/system_map.o
--
1.7.9.7
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Re: [U-Boot] [PATCH 1/2] add ST PSD4256G6V to table of supported legacy flashs
On Tuesday 31 July 2012 09:38:32 Mike Frysinger wrote: The BF533-EZKIT boards have this old ST flash. Signed-off-by: Mike Frysinger vap...@gentoo.org Acked-by: Stefan Roese s...@denx.de Mike, do you intend to push this via your blackfin repo? If yes, then please go ahead. Otherwise I'll queue it up for upstreaming. Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RESEND] [PATCH 0/2] kirkwood: Generalise dns325 support, include dns320
On Mon, 30 Jul 2012, Prafulla Wadaskar wrote:
Dear Jamie Lentin
-Original Message-
From: Jamie Lentin [mailto:j...@lentin.co.uk]
Sent: 31 July 2012 03:26
To: u-boot@lists.denx.de
Cc: Prafulla Wadaskar; albert.u.b...@aribaud.net;
ub...@lukaperkov.net; Jamie Lentin
Subject: [RESEND] [PATCH 0/2] kirkwood: Generalise dns325 support,
include dns320
I submitted this a while ago[0], it would be nice to see it included
if possible. It generalises the DNS325 support so that it can be used
for both the DNS320 and DNS325.
Luka Perkov stated I have no more questions regarding this patch,
not
sure if this counts as an ACK. The patch here is ~same, just rebased.
Somewhat related, I have tried using tools/kwboot to boot both NASes.
The DNS325 boots fine, however the DNS320 reports:-
Sending boot message. Please reboot the target...|
Sending boot image...
0 % [+xmodem: Bad message
UART-boot works with kwuartboot, although only when it is killed and
restarted. If I work out anything interesting will follow it up in
a separate thread.
Any feedback appreciated!
[0] http://thread.gmane.org/gmane.comp.boot-loaders.u-
boot/130234/focus=130575
Jamie Lentin (2):
kirkwood: Rename dns325 to dnskw
kirkwood: Add support for the D-Link DNS-320
MAINTAINERS|4 +
board/d-link/{dns325 = dnskw}/Makefile|2 +-
board/d-link/{dns325/dns325.c = dnskw/dnskw.c}| 18 +-
board/d-link/{dns325/dns325.h = dnskw/dnskw.h}| 30 ++-
board/d-link/dnskw/kwbimage.dns320.cfg | 207
.../kwbimage.cfg = dnskw/kwbimage.dns325.cfg} |0
boards.cfg |3 +-
include/configs/{dns325.h = dnskw.h} | 21 +-
8 files changed, 261 insertions(+), 24 deletions(-)
rename board/d-link/{dns325 = dnskw}/Makefile (98%)
rename board/d-link/{dns325/dns325.c = dnskw/dnskw.c} (90%)
rename board/d-link/{dns325/dns325.h = dnskw/dnskw.h} (65%)
create mode 100644 board/d-link/dnskw/kwbimage.dns320.cfg
Finally you will two kwbimage files for two boards being supported. BTW:
I would like to ask : what is a difference between these two files? If
it is very small, it can be handled in early_board_init().
In that case you can keep the earlier name kwbimage.cfg as it is and one file
can be avoided.
The DNS-320 has half the RAM of the DNS-325 at different timings, so the
difference is non-trivial. I'm not sure there would be a logical way to
divide it up into a common setup and changes in early_board_init(). I
could have a go if you prefer though---if there's prior art somewhere else
in u-boot please let me know and I'll have a look.
$ wc -l board/d-link/dnskw/kwbimage.dns32*
207 board/d-link/dnskw/kwbimage.dns320.cfg
208 board/d-link/dnskw/kwbimage.dns325.cfg
$ diff -u board/d-link/dnskw/kwbimage.dns32* | diffstat
kwbimage.dns325.cfg | 85
++--
1 file changed, 43 insertions(+), 42 deletions(-)
Regards...
Prafulla . . .
--
Jamie Lentin
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Re: [U-Boot] [PATCH 2/2] kirkwood: Add support for the D-Link DNS-320
On Mon, 30 Jul 2012, Prafulla Wadaskar wrote: -Original Message- From: Jamie Lentin [mailto:j...@lentin.co.uk] Sent: 31 July 2012 03:26 To: u-boot@lists.denx.de Cc: Prafulla Wadaskar; albert.u.b...@aribaud.net; ub...@lukaperkov.net; Jamie Lentin Subject: [PATCH 2/2] kirkwood: Add support for the D-Link DNS-320 Extend dnskw to support the D-Link DNS-320 ShareCenter NAS also. For more information on this NAS, see:- http://jamie.lentin.co.uk/devices/dlink-dns320 http://dns323.kood.org/dns-320 http://sharecenter.dlink.com/products/DNS-320 Signed-off-by: Jamie Lentin j...@lentin.co.uk Cc: prafu...@marvell.com Cc: albert.u.b...@aribaud.net --- MAINTAINERS|4 + board/d-link/dnskw/dnskw.c |8 +- board/d-link/dnskw/dnskw.h |6 + board/d-link/dnskw/kwbimage.dns320.cfg | 207 boards.cfg |1 + include/configs/dnskw.h| 10 ++ 6 files changed, 232 insertions(+), 4 deletions(-) create mode 100644 board/d-link/dnskw/kwbimage.dns320.cfg diff --git a/MAINTAINERS b/MAINTAINERS index fd0c65c..92ede1f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -673,6 +673,10 @@ Igor Grinberg grinb...@compulab.co.il cm-t35 ARM ARMV7 (OMAP3xx Soc) +Jamie Lentin j...@lentin.co.uk + + dns320 ARM926EJS (Kirkwood SoC) + Stefan Herbrechtsmeier ste...@code.herbrechtsmeier.net dns325 ARM926EJS (Kirkwood SoC) diff --git a/board/d-link/dnskw/dnskw.c b/board/d-link/dnskw/dnskw.c index d29735c..cd6bfe9 100644 --- a/board/d-link/dnskw/dnskw.c +++ b/board/d-link/dnskw/dnskw.c @@ -58,8 +58,8 @@ int board_early_init_f(void) MPP10_UART0_TXD, MPP11_UART0_RXD, MPP12_SD_CLK, - MPP13_SD_CMD, - MPP14_SD_D0, + MPP13_UART1_TXD,/* Custom ...*/ + MPP14_UART1_RXD,/* ... controller */ Are these entries valid for both boards? If not then encapsulate with #ifdef It seems fairly reasonable to---the DNS-325 does not make use of the SD interface. Either these pins are unattached or attached to the embedded controller in the same way, but the connection is not useful. Either way, setting them to UART does not cause any problems on the DNS-325. I could set MPP13_GPIO, MPP14_GPIO for the DNS-325 instead, or just not configure them at all (if that is an option). MPP15_SD_D1, MPP16_SD_D2, MPP17_SD_D3, @@ -74,13 +74,13 @@ int board_early_init_f(void) MPP26_GPIO, /* power led */ MPP27_GPIO, /* sata0(right) error led */ MPP28_GPIO, /* sata1(left) error led */ - MPP29_GPIO, /* usb error led */ + MPP29_GPIO, /* usb error led (dns-325) */ Ditto Unattached on the DNS-320, so same situation as above. MPP30_GPIO, MPP31_GPIO, MPP32_GPIO, MPP33_GPIO, MPP34_GPIO, /* power key */ - MPP35_GPIO, + MPP35_GPIO, /* usb error led (dns-320) */ Ditto Unattached on the DNS-325, so same situation as above. MPP36_GPIO, MPP37_GPIO, MPP38_GPIO, diff --git a/board/d-link/dnskw/dnskw.h b/board/d-link/dnskw/dnskw.h index 4b11cb6..8886050 100644 --- a/board/d-link/dnskw/dnskw.h +++ b/board/d-link/dnskw/dnskw.h @@ -43,6 +43,12 @@ #define DNSKW_OE_VAL_HIGH 0x0800 /* disable leds */ #endif /* CONFIG_BOARD_IS_DNS325 */ +/* DNS-320 specific configuration */ +#ifdef CONFIG_BOARD_IS_DNS320 +#define DNSKW_OE_VAL_LOW 0x3800 /* disable leds */ +#define DNSKW_OE_VAL_HIGH 0x0808 /* disable leds */ +#endif /* CONFIG_BOARD_IS_DNS320 */ + /* PHY related */ #define MV88E1116_MAC_CTRL_REG 21 #define MV88E1116_PGADR_REG22 diff --git a/board/d-link/dnskw/kwbimage.dns320.cfg b/board/d- link/dnskw/kwbimage.dns320.cfg new file mode 100644 index 000..5fb4052 --- /dev/null +++ b/board/d-link/dnskw/kwbimage.dns320.cfg @@ -0,0 +1,207 @@ +# +# Copyright (C) 2012 +# Jamie Lentin j...@lentin.co.uk +# +# Based on dns325 support: +# Copyright (C) 2011 +# Stefan Herbrechtsmeier ste...@code.herbrechtsmeier.net +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR
Re: [U-Boot] [PATCH 9/9] mx6qsabrelite: Add splaschscreen support
Hi Fabio, On 31.05.2012 19:24, Fabio Estevam wrote: Add splaschscreen support. It was used a Hannstar 1024 x 768 LVDS panel that can be connected to the mx6qsabrelite board. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- I understand this patch will need to be improved, but I am posting it now, so that others can possibly test it. Just fyi: On the ALKML there are IPU patches from Sascha Hauer for the kernel. Applying Sascha's patches to the kernel and this patch to U-Boot makes the kernel crash with a NULL pointer [1]. I haven't looked into the details, wild guessing is that the U-Boot patch enables some interrupts the IPU driver isn't ready to handle before he's done his own initialization. Note that this is only fyi. Best regards Dirk [1] ... imx-ipuv3 280.ipu: DI1 base: 0x02a48000 remapped to c08ee000 Unable to handle kernel NULL pointer dereference at virtual address 000c pgd = 80004000 [000c] *pgd= Internal error: Oops: 5 [#1] SMP ARM Modules linked in: CPU: 0Not tainted PC is at imx_drm_handle_vblank+0xc/0x20 LR is at ipu_irq_handler+0x1c/0xdc ... ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 4/6] tegra: fdt: Add NAND definitions to fdt
Hi Scott,
On Mon, Jul 30, 2012 at 11:49 PM, Scott Wood scottw...@freescale.com wrote:
On 07/30/2012 01:53 AM, Simon Glass wrote:
Add a flash node to handle the NAND, including memory timings and
page / block size information.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Update NAND binding to add nvidia, prefix
Changes in v3:
- Add reg property for unit address (should be used for chip select)
- Update fdt binding to make everything Nvidia-specific
Changes in v4:
- Remove fdt bindings related to page structure
board/nvidia/dts/tegra20-seaboard.dts | 10 ++
1 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/board/nvidia/dts/tegra20-seaboard.dts
b/board/nvidia/dts/tegra20-seaboard.dts
index 3352539..25a63a0 100644
--- a/board/nvidia/dts/tegra20-seaboard.dts
+++ b/board/nvidia/dts/tegra20-seaboard.dts
@@ -153,4 +153,14 @@
0x1f04008a;
linux,fn-keymap = 0x05040002;
};
+
+ nand-controller@70008000 {
+ nvidia,wp-gpios = gpio 59 0; /* PH3 */
+ nvidia,width = 8;
+ nvidia,timing = 26 100 20 80 20 10 12 10 70;
+ nand@0 {
+ reg = 0;
+ compatible = hynix,hy27uf4g2b, nand-flash;
+ };
+ };
Are #address-cells, #size-cells, and reg on the controller node provided
by an /include/?
Yes that's right, in the previous patch:
nand: nand-controller@70008000 {
#address-cells = 1;
#size-cells = 0;
compatible = nvidia,tegra20-nand;
reg = 0x70008000 0x100;
};
Regards,
Simon
-Scott
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Re: [U-Boot] [PATCH v4 3/6] tegra: fdt: Add NAND controller binding and definitions
Hi Scott,
On Tue, Jul 31, 2012 at 12:05 AM, Scott Wood scottw...@freescale.com wrote:
On 07/30/2012 01:53 AM, Simon Glass wrote:
diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi
index f95be58..d936b1e 100644
--- a/arch/arm/dts/tegra20.dtsi
+++ b/arch/arm/dts/tegra20.dtsi
@@ -204,4 +204,11 @@
compatible = nvidia,tegra20-kbc;
reg = 0x7000e200 0x0078;
};
+
+ nand: nand-controller@70008000 {
+ #address-cells = 1;
+ #size-cells = 0;
+ compatible = nvidia,tegra20-nand;
+ reg = 0x70008000 0x100;
+ };
};
diff --git a/doc/device-tree-bindings/nand/nvidia,tegra20-nand.txt
b/doc/device-tree-bindings/nand/nvidia,tegra20-nand.txt
new file mode 100644
index 000..86ae408
--- /dev/null
+++ b/doc/device-tree-bindings/nand/nvidia,tegra20-nand.txt
@@ -0,0 +1,53 @@
+NAND Flash
+--
+
+(there isn't yet a generic binding in Linux, so this describes what is in
+U-Boot. There should not be Linux-specific or U-Boot specific binding, just
+a binding that describes this hardware. But agreeing a binding in Linux in
+the absence of a driver may be beyond my powers.)
Please at least attempt to get a binding accepted in Linux, or perhaps
in a neutral repository such as devicetree.org (but point out on
devicetree-discuss that you've posted it there). The device tree is
supposed to describe the hardware, not what Linux currently uses.
+Example
+---
+
+nand-controller@0x70008000 {
+ compatible = nvidia,tegra20-nand;
+ #address-cells = 1;
+ #size-cells = 0;
+ nvidia,wp-gpios = gpio 59 0; /* PH3 */
+ nvidia,nand-width = 8;
+ nvidia,timing = 26 100 20 80 20 10 12 10 70;
+ nand@0 {
+ reg = 0;
+ compatible = hynix,hy27uf4g2b, nand-flash;
+ };
+};
Where is reg in the parent node? You're not supposed to have a unit
address without reg. Also, most bus bindings don't put 0x in the unit
address).
I see that it's OK in the actual .dtsi -- it's just the example that
needs fixing.
OK I will fix these and send a new patch.
Regards,
Simon
-Scott
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Re: [U-Boot] [PATCH v3 06/18] tegra: fdt: Add LCD definitions for Tegra
+Thierry
Hi,
On Thu, Jul 12, 2012 at 4:25 PM, Simon Glass s...@chromium.org wrote:
Add LCD definitions and also a proposed binding for LCD displays.
The PWM is as per what will likely be committed to linux-next soon.
The displaymode binding comes from a proposal here:
http://lists.freedesktop.org/archives/dri-devel/2012-July/024875.html
The panel binding is new, and fills a need to specify the panel
timings and other tegra-specific information. Should a binding appear
that allows the pwm to handle this automatically, we can revisit
this.
Any comments on this binding please? The main addition from Thierry's
one posted on LMKL is the LCD resolution selection.
Regards,
Simon
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Add nvidia prefix to device tree properties
Changes in v3:
- Add new panel binding to fit with tegra display controller binding
- Bring in proposed tegra display controller binding
- Use displaymode binding for fdt
arch/arm/dts/tegra20.dtsi | 89
doc/device-tree-bindings/video/displaymode.txt | 42 +++
doc/device-tree-bindings/video/tegra20-dc.txt | 89
3 files changed, 220 insertions(+), 0 deletions(-)
create mode 100644 doc/device-tree-bindings/video/displaymode.txt
create mode 100644 doc/device-tree-bindings/video/tegra20-dc.txt
diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi
index e7d1688..0b2ca3b 100644
--- a/arch/arm/dts/tegra20.dtsi
+++ b/arch/arm/dts/tegra20.dtsi
@@ -211,4 +211,93 @@
#pwm-cells = 2;
};
+ host1x {
+ compatible = nvidia,tegra20-host1x, simple-bus;
+ reg = 0x5000 0x00024000;
+ interrupts = 0 65 0x04 /* mpcore syncpt */
+ 0 67 0x04; /* mpcore general */
+
+ #address-cells = 1;
+ #size-cells = 1;
+
+ ranges = 0x5400 0x5400 0x0400;
+
+ /* video-encoding/decoding */
+ mpe {
+ reg = 0x5404 0x0004;
+ interrupts = 0 68 0x04;
+ };
+
+ /* video input */
+ vi {
+ reg = 0x5408 0x0004;
+ interrupts = 0 69 0x04;
+ };
+
+ /* EPP */
+ epp {
+ reg = 0x540c 0x0004;
+ interrupts = 0 70 0x04;
+ };
+
+ /* ISP */
+ isp {
+ reg = 0x5410 0x0004;
+ interrupts = 0 71 0x04;
+ };
+
+ /* 2D engine */
+ gr2d {
+ reg = 0x5414 0x0004;
+ interrupts = 0 72 0x04;
+ };
+
+ /* 3D engine */
+ gr3d {
+ reg = 0x5418 0x0004;
+ };
+
+ /* display controllers */
+ dc@5420 {
+ compatible = nvidia,tegra20-dc;
+ reg = 0x5420 0x0004;
+ interrupts = 0 73 0x04;
+
+ rgb {
+ status = disabled;
+ };
+ };
+
+ dc@5424 {
+ compatible = nvidia,tegra20-dc;
+ reg = 0x5424 0x0004;
+ interrupts = 0 74 0x04;
+
+ rgb {
+ status = disabled;
+ };
+ };
+
+ /* outputs */
+ hdmi {
+ compatible = nvidia,tegra20-hdmi;
+ reg = 0x5428 0x0004;
+ interrupts = 0 75 0x04;
+ status = disabled;
+ };
+
+ tvo {
+ compatible = nvidia,tegra20-tvo;
+ reg = 0x542c 0x0004;
+ interrupts = 0 76 0x04;
+ status = disabled;
+ };
+
+ dsi {
+ compatible = nvidia,tegra20-dsi;
+ reg = 0x5430 0x0004;
+ status = disabled;
+ };
+ };
+
};
diff --git a/doc/device-tree-bindings/video/displaymode.txt
b/doc/device-tree-bindings/video/displaymode.txt
new file mode 100644
index 000..45ca42d
--- /dev/null
+++ b/doc/device-tree-bindings/video/displaymode.txt
@@ -0,0 +1,42 @@
+videomode bindings
+==
+
+(from http://lists.freedesktop.org/archives/dri-devel/2012-July/024875.html)
+
+Required properties:
+ - xres, yres: Display resolution
+ - left-margin,
Re: [U-Boot] [PATCH v3 0/18] tegra: Add display driver and LCD support for Seaboard
Hi Thierry, On Thu, Jul 19, 2012 at 8:58 AM, Thierry Reding thierry.red...@avionic-design.de wrote: On Thu, Jul 12, 2012 at 08:25:00AM -0700, Simon Glass wrote: This series adds support for the Tegra2x's display peripheral. This supports the LCD display on Seaboard and we use this to enable console output in U-Boot on the LCD. Configuration is via the device tree. Proposed bindings are included in this series, taken from pwm bindings that should be in linux-next, a Tegra video binding that might be accepted in devicetree-discuss and a proposed video mode binding posted to dri-devel. While I agree EDID is convenient for machines I would prefer to provide a user-friendly way of selecting LCD settings as well, with EDID more as a fallback and auto-detection when available. To improve performance two optimisations are offered: 1. The LCD frame buffer is cached, with the cache being flushed after each newline sent to putc(), and in a few other situations. This dramatically increases performance (around 10x). This requires a few additions to the ARM cache support. 2. The console supports scrolling in steps of more than 1 line. This speeds up scrolling output considerably, particularly commands like 'printenv' which display a lot of output, and particular when the dcache is off. This requires a new CONFIG and a change to the console_scrollup() function. Changes in v2: - Add new patch to use const in pinmux_config_pingroup/table() - Add nvidia prefix to device tree properties - Align tegra display using new CONFIG_LCD_ALIGNMENT feature - Put the LCD cache flush logic into lcd_putc() instead of lcd_puts() - Update LCD driver to deal with new fdt bindings - Update seaboard LCD definitions for new fdt binding - Use a more generic config CONFIG_LCD_ALIGNMENT for lcd alignment - Use const where possible in funcmux Changes in v3: - Add new commit for pwm binding and node - Add new panel binding to fit with tegra display controller binding - Add probe function to read in fdt parameters in display driver - Add separate call to pwm_init() in board_init() - Adjust LCD driver to use new SOC display driver structures - Bring in proposed tegra display controller binding - Decode fdt node within the pwm driver - Fix tiny bug in mult-line lcd scrolling - Handle a cached frame buffer out of normal U-Boot memory - Introduce concept of a pwm channel, rather than separate peripherals - Move some fdt decode code from LCD driver to SOC display driver - Put the LCD cache flush logic back into lcd_puts() - Remove LPW1 pin which is not needed by display - Remove spurious newline from fdtdec_get_addr() debug output - Rename fdt config structures - Rename pwfm driver to pwm - Separate display driver and LCD driver more in fdt - Tidy up fdtdec_decode_gpios() debug output - Use displaymode binding for fdt - Use new proposed upstream pwm binding - Use new pwm binding from pre-linux-next - Use new upstream proposed LCD definitions Mayuresh Kulkarni (1): tegra: Enable display/lcd support on Seaboard Simon Glass (16): fdt: Tidy debugging, add to fdtdec_get_int/addr() fdt: Add header guard to fdtdec.h tegra: Use const for pinmux_config_pingroup/table() tegra: Add display support to funcmux tegra: fdt: Add pwm binding and node tegra: fdt: Add LCD definitions for Tegra tegra: Add support for PWM tegra: Add LCD driver tegra: Add LCD support to Nvidia boards arm: Add control over cachability of memory regions lcd: Add CONFIG_LCD_ALIGNMENT to select frame buffer alignment lcd: Add support for flushing LCD fb from dcache after update tegra: Align LCD frame buffer to section boundary tegra: Support control of cache settings for LCD tegra: fdt: Add LCD definitions for Seaboard lcd: Add CONSOLE_SCROLL_LINES option to speed console Wei Ni (1): tegra: Add SOC support for display/lcd I was able to make this work on the Medcom with the one workaround to make backlight and panel GPIOs optional and adding the corresponding DTS and configuration entries for Medcom, so: Tested-by: Thierry Reding thierry.red...@avionic-design.de Thanks, I am waiting until the binding is agreed before addressing comments and sending a new version. The display corruption does no longer seem to happen. While I haven't thoroughly reviewed, I think this is in pretty good shape. Thanks Simon. Thierry Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 0/4] DaVinci DA8xx: tidy up clock IDs
This small series of patches tidies up the clock IDs that are used to interact with the PLL controllers on the DaVinci DA8xx processors. It more clearly defines the structure and meaning of the IDs and untangles some model-specific code that can't be shared among the family. This tidying allows three bugs to be identified and resolved: - on the DA850, UART2's clock may come from ASYNC3, unlike the DA830; - the DA830 doesn't have a DDR2/mDDR PHY, or a PLL controller for it; - the DSP speed reported by bdinfo was not being initialised on the DA8xx family. Laurence Withers (4): DaVinci DA8xx: tidy up clock ID definition DaVinci DA850: UART2 clock ID comes from ASYNC3 DaVinci DA8xx: replace magic number for DDR speed DaVinci DA8xx: fix set_cpu_clk_info() arch/arm/cpu/arm926ejs/davinci/cpu.c | 22 ++ arch/arm/include/asm/arch-davinci/hardware.h | 57 +++-- 2 files changed, 57 insertions(+), 22 deletions(-) -- 1.7.2.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 2/4] DaVinci DA850: UART2 clock ID comes from ASYNC3
On the DA830, UART2's clock is derived from PLL controller 0 output 2.
On the DA850, it is in the ASYNC3 group, and may be switched between PLL
controller 0 or 1. Fix the definition of the ID to match.
Signed-off-by: Laurence Withers lwith...@guralp.com
Cc: Tom Rini tr...@ti.com
Cc: Prabhakar Lad prabhakar.cse...@gmail.com
---
Changes in v2:
- Re-ordered patch series to tidy up clock IDs before tidying up users
(set_cpu_clk_info()).
---
arch/arm/include/asm/arch-davinci/hardware.h |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/arch/arm/include/asm/arch-davinci/hardware.h
b/arch/arm/include/asm/arch-davinci/hardware.h
index dac43bb..0fce940 100644
--- a/arch/arm/include/asm/arch-davinci/hardware.h
+++ b/arch/arm/include/asm/arch-davinci/hardware.h
@@ -466,7 +466,6 @@ enum davinci_clk_ids {
DAVINCI_MDIO_CLKID = DAVINCI_PLL0_SYSCLK4,
DAVINCI_MMC_CLKID = DAVINCI_PLL0_SYSCLK2,
DAVINCI_SPI0_CLKID = DAVINCI_PLL0_SYSCLK2,
- DAVINCI_UART2_CLKID = DAVINCI_PLL0_SYSCLK2,
/* special clock ID - output of PLL multiplier */
DAVINCI_PLLM_CLKID = 0x0FF,
@@ -478,6 +477,9 @@ enum davinci_clk_ids {
DAVINCI_AUXCLK_CLKID= 0x101,
};
+#define DAVINCI_UART2_CLKID(cpu_is_da830() ? DAVINCI_PLL0_SYSCLK2 \
+ : get_async3_src())
+
#define DAVINCI_SPI1_CLKID (cpu_is_da830() ? DAVINCI_PLL0_SYSCLK2 \
: get_async3_src())
--
1.7.2.5
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[U-Boot] [PATCH v2 1/4] DaVinci DA8xx: tidy up clock ID definition
Tidy up the clock IDs defined for the DA8xx SOCs. With this new structure in
place, it is clear how to define new clock IDs, and how these map to the
numbers presented in the technical reference manual.
Signed-off-by: Laurence Withers lwith...@guralp.com
Cc: Tom Rini tr...@ti.com
Cc: Prabhakar Lad prabhakar.cse...@gmail.com
---
Changes in v2:
- Re-ordered patch series to tidy up clock IDs before tidying up users
(set_cpu_clk_info()).
---
arch/arm/include/asm/arch-davinci/hardware.h | 53 +++---
1 files changed, 39 insertions(+), 14 deletions(-)
diff --git a/arch/arm/include/asm/arch-davinci/hardware.h
b/arch/arm/include/asm/arch-davinci/hardware.h
index b145c6e..dac43bb 100644
--- a/arch/arm/include/asm/arch-davinci/hardware.h
+++ b/arch/arm/include/asm/arch-davinci/hardware.h
@@ -441,21 +441,46 @@ struct davinci_pllc_regs {
#define davinci_pllc1_regs ((struct davinci_pllc_regs
*)DAVINCI_PLL_CNTRL1_BASE)
#define DAVINCI_PLLC_DIV_MASK 0x1f
-#define ASYNC3 get_async3_src()
-#define PLL1_SYSCLK2 ((1 16) | 0x2)
-#define DAVINCI_SPI1_CLKID (cpu_is_da830() ? 2 : ASYNC3)
-/* Clock IDs */
+/*
+ * A clock ID is a 32-bit number where bit 16 represents the PLL controller
+ * (clear is PLLC0, set is PLLC1) and the low 16 bits represent the divisor,
+ * counting from 1. Clock IDs may be passed to clk_get().
+ */
+
+/* flags to select PLL controller */
+#define DAVINCI_PLLC0_FLAG (0)
+#define DAVINCI_PLLC1_FLAG (1 16)
+
enum davinci_clk_ids {
- DAVINCI_SPI0_CLKID = 2,
- DAVINCI_UART2_CLKID = 2,
- DAVINCI_MMC_CLKID = 2,
- DAVINCI_MDIO_CLKID = 4,
- DAVINCI_ARM_CLKID = 6,
- DAVINCI_PLLM_CLKID = 0xff,
- DAVINCI_PLLC_CLKID = 0x100,
- DAVINCI_AUXCLK_CLKID = 0x101
+ /*
+* Clock IDs for PLL outputs. Each may be switched on/off independently,
+* and each may map to one or more peripherals.
+*/
+ DAVINCI_PLL0_SYSCLK2= DAVINCI_PLLC0_FLAG | 2,
+ DAVINCI_PLL0_SYSCLK4= DAVINCI_PLLC0_FLAG | 4,
+ DAVINCI_PLL0_SYSCLK6= DAVINCI_PLLC0_FLAG | 6,
+ DAVINCI_PLL1_SYSCLK2= DAVINCI_PLLC1_FLAG | 2,
+
+ /* map peripherals to clock IDs */
+ DAVINCI_ARM_CLKID = DAVINCI_PLL0_SYSCLK6,
+ DAVINCI_MDIO_CLKID = DAVINCI_PLL0_SYSCLK4,
+ DAVINCI_MMC_CLKID = DAVINCI_PLL0_SYSCLK2,
+ DAVINCI_SPI0_CLKID = DAVINCI_PLL0_SYSCLK2,
+ DAVINCI_UART2_CLKID = DAVINCI_PLL0_SYSCLK2,
+
+ /* special clock ID - output of PLL multiplier */
+ DAVINCI_PLLM_CLKID = 0x0FF,
+
+ /* special clock ID - output of PLL post divisor */
+ DAVINCI_PLLC_CLKID = 0x100,
+
+ /* special clock ID - PLL bypass */
+ DAVINCI_AUXCLK_CLKID= 0x101,
};
+#define DAVINCI_SPI1_CLKID (cpu_is_da830() ? DAVINCI_PLL0_SYSCLK2 \
+ : get_async3_src())
+
int clk_get(enum davinci_clk_ids id);
/* Boot config */
@@ -570,10 +595,10 @@ static inline int cpu_is_da850(void)
return ((part_no == 0xb7d1) ? 1 : 0);
}
-static inline int get_async3_src(void)
+static inline enum davinci_clk_ids get_async3_src(void)
{
return (REG(davinci_syscfg_regs-cfgchip3) 0x10) ?
- PLL1_SYSCLK2 : 2;
+ DAVINCI_PLL1_SYSCLK2 : DAVINCI_PLL0_SYSCLK2;
}
#endif /* CONFIG_SOC_DA8XX */
--
1.7.2.5
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[U-Boot] [PATCH v2 3/4] DaVinci DA8xx: replace magic number for DDR speed
Replace a magic number for the DDR2/mDDR PHY clock ID with a proper
definition. In addition, don't request this clock ID on DA830 hardware,
which does not have a DDR2/mDDR PHY (or associated PLL controller).
Signed-off-by: Laurence Withers lwith...@guralp.com
Cc: Tom Rini tr...@ti.com
Cc: Prabhakar Lad prabhakar.cse...@gmail.com
---
Changes in v2:
- Re-ordered patch series to tidy up clock IDs before tidying up users
(set_cpu_clk_info()).
---
arch/arm/cpu/arm926ejs/davinci/cpu.c |3 ++-
arch/arm/include/asm/arch-davinci/hardware.h |2 ++
2 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/davinci/cpu.c
b/arch/arm/cpu/arm926ejs/davinci/cpu.c
index 6cb857a..41201d0 100644
--- a/arch/arm/cpu/arm926ejs/davinci/cpu.c
+++ b/arch/arm/cpu/arm926ejs/davinci/cpu.c
@@ -194,7 +194,8 @@ int set_cpu_clk_info(void)
#ifdef CONFIG_SOC_DA8XX
gd-bd-bi_arm_freq = clk_get(DAVINCI_ARM_CLKID) / 100;
/* DDR PHY uses an x2 input clock */
- gd-bd-bi_ddr_freq = clk_get(0x10001) / 100;
+ gd-bd-bi_ddr_freq = cpu_is_da830() ? 0 :
+ (clk_get(DAVINCI_DDR_CLKID) / 100);
#else
unsigned int pllbase = DAVINCI_PLL_CNTRL0_BASE;
diff --git a/arch/arm/include/asm/arch-davinci/hardware.h
b/arch/arm/include/asm/arch-davinci/hardware.h
index 0fce940..7f3dcc2 100644
--- a/arch/arm/include/asm/arch-davinci/hardware.h
+++ b/arch/arm/include/asm/arch-davinci/hardware.h
@@ -459,10 +459,12 @@ enum davinci_clk_ids {
DAVINCI_PLL0_SYSCLK2= DAVINCI_PLLC0_FLAG | 2,
DAVINCI_PLL0_SYSCLK4= DAVINCI_PLLC0_FLAG | 4,
DAVINCI_PLL0_SYSCLK6= DAVINCI_PLLC0_FLAG | 6,
+ DAVINCI_PLL1_SYSCLK1= DAVINCI_PLLC1_FLAG | 1,
DAVINCI_PLL1_SYSCLK2= DAVINCI_PLLC1_FLAG | 2,
/* map peripherals to clock IDs */
DAVINCI_ARM_CLKID = DAVINCI_PLL0_SYSCLK6,
+ DAVINCI_DDR_CLKID = DAVINCI_PLL1_SYSCLK1,
DAVINCI_MDIO_CLKID = DAVINCI_PLL0_SYSCLK4,
DAVINCI_MMC_CLKID = DAVINCI_PLL0_SYSCLK2,
DAVINCI_SPI0_CLKID = DAVINCI_PLL0_SYSCLK2,
--
1.7.2.5
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[U-Boot] [PATCH v2 4/4] DaVinci DA8xx: fix set_cpu_clk_info()
For the DA8xx family of SoCs, the set_cpu_clk_info() function was not
initialising the DSP frequency, leading to 'bdinfo' command output such as:
[...snip...]
ARM frequency = 300 MHz
DSP frequency = -536870913 MHz
DDR frequency = 300 MHz
This commit provides a separate implementation of set_cpu_clk_info() for
the DA8xx SoCs that initialises the DSP frequency to zero (since
currently the DSP is not enabled by U-Boot on any DA8xx platform). The
separate implementation is justified because there is no common code
between DA8xx and the other SoC families. It is now much easier to
understand the flow of the two separate functions.
Signed-off-by: Laurence Withers lwith...@guralp.com
Cc: Tom Rini tr...@ti.com
Cc: Hadli, Manjunath manjunath.ha...@ti.com
Cc: Heiko Schocher h...@denx.de
---
Changes in v2:
- Re-ordered patch series to tidy up clock IDs before tidying up users
(set_cpu_clk_info()).
---
arch/arm/cpu/arm926ejs/davinci/cpu.c | 23 ++-
1 files changed, 14 insertions(+), 9 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/davinci/cpu.c
b/arch/arm/cpu/arm926ejs/davinci/cpu.c
index 41201d0..b31add8 100644
--- a/arch/arm/cpu/arm926ejs/davinci/cpu.c
+++ b/arch/arm/cpu/arm926ejs/davinci/cpu.c
@@ -117,6 +117,17 @@ int clk_get(enum davinci_clk_ids id)
out:
return pll_out;
}
+
+int set_cpu_clk_info(void)
+{
+ gd-bd-bi_arm_freq = clk_get(DAVINCI_ARM_CLKID) / 100;
+ /* DDR PHY uses an x2 input clock */
+ gd-bd-bi_ddr_freq = cpu_is_da830() ? 0 :
+ (clk_get(DAVINCI_DDR_CLKID) / 100);
+ gd-bd-bi_dsp_freq = 0;
+ return 0;
+}
+
#else /* CONFIG_SOC_DA8XX */
static unsigned pll_div(volatile void *pllbase, unsigned offset)
@@ -187,17 +198,9 @@ unsigned int davinci_clk_get(unsigned int div)
return pll_sysclk_mhz(DAVINCI_PLL_CNTRL0_BASE, div) * 100;
}
#endif
-#endif /* !CONFIG_SOC_DA8XX */
int set_cpu_clk_info(void)
{
-#ifdef CONFIG_SOC_DA8XX
- gd-bd-bi_arm_freq = clk_get(DAVINCI_ARM_CLKID) / 100;
- /* DDR PHY uses an x2 input clock */
- gd-bd-bi_ddr_freq = cpu_is_da830() ? 0 :
- (clk_get(DAVINCI_DDR_CLKID) / 100);
-#else
-
unsigned int pllbase = DAVINCI_PLL_CNTRL0_BASE;
#if defined(CONFIG_SOC_DM365)
pllbase = DAVINCI_PLL_CNTRL1_BASE;
@@ -216,10 +219,12 @@ int set_cpu_clk_info(void)
pllbase = DAVINCI_PLL_CNTRL0_BASE;
#endif
gd-bd-bi_ddr_freq = pll_sysclk_mhz(pllbase, DDR_PLLDIV) / 2;
-#endif
+
return 0;
}
+#endif /* !CONFIG_SOC_DA8XX */
+
/*
* Initializes on-chip ethernet controllers.
* to override, implement board_eth_init()
--
1.7.2.5
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[U-Boot] [PATCH] Blackfin: adjust asm constraints with NMI workaround
Newer gcc versions will sometimes use a Preg when r constraints, but that'll fail if we use an Ireg in the assignment. So force the code to always use a Dreg. This also fixes early boot crashes for older Blackfin parts when compiled with gcc-4.5. This version ends up selecting the same register for the input and output variables which corrupts the output assignment triggering an exception. P2 = 0xffe02008;/* EVT2 */ R0 = RETS; CALL 1f; RTN; 1: P2 = RETS; -- BAD RETS = R0; [P2] = P2; -- BAD Signed-off-by: Mike Frysinger vap...@gentoo.org --- arch/blackfin/cpu/initcode.c |3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/blackfin/cpu/initcode.c b/arch/blackfin/cpu/initcode.c index 243f4f3..3c10adc 100644 --- a/arch/blackfin/cpu/initcode.c +++ b/arch/blackfin/cpu/initcode.c @@ -130,7 +130,8 @@ program_nmi_handler(void) %1 = RETS; /* Load addr of NMI handler */ RETS = %0; /* Restore RETS */ [%2] = %1; /* Write NMI handler */ - : =r(tmp1), =r(tmp2) : ab(EVT2) + : =d(tmp1), =d(tmp2) + : ab(EVT2) ); } -- 1.7.9.7 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] Blackfin: initcode: mark uncommon code paths as unlikely
Putting memory into self refresh only happens when doing development, not
during the normal course of things, so mark those code paths as unlikely.
Signed-off-by: Mike Frysinger vap...@gentoo.org
---
arch/blackfin/cpu/initcode.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/blackfin/cpu/initcode.c b/arch/blackfin/cpu/initcode.c
index fb3a101..243f4f3 100644
--- a/arch/blackfin/cpu/initcode.c
+++ b/arch/blackfin/cpu/initcode.c
@@ -337,13 +337,13 @@ maybe_self_refresh(ADI_BOOT_DATA *bs)
/* If external memory is enabled, put it into self refresh first. */
#if defined(EBIU_RSTCTL)
- if (bfin_read_EBIU_RSTCTL() DDR_SRESET) {
+ if (unlikely(bfin_read_EBIU_RSTCTL() DDR_SRESET)) {
serial_putc('b');
bfin_write_EBIU_RSTCTL(bfin_read_EBIU_RSTCTL() | SRREQ);
return true;
}
#elif defined(EBIU_SDGCTL)
- if (bfin_read_EBIU_SDBCTL() EBE) {
+ if (unlikely(bfin_read_EBIU_SDBCTL() EBE)) {
serial_putc('b');
bfin_write_EBIU_SDGCTL(bfin_read_EBIU_SDGCTL() | SRFS);
return true;
@@ -367,7 +367,7 @@ program_clocks(ADI_BOOT_DATA *bs, bool put_into_srfs)
serial_putc('b');
/* If we're entering self refresh, make sure it has happened. */
- if (put_into_srfs)
+ if (unlikely(put_into_srfs))
#if defined(EBIU_RSTCTL)
while (!(bfin_read_EBIU_RSTCTL() SRACK))
continue;
@@ -549,7 +549,7 @@ program_memory_controller(ADI_BOOT_DATA *bs, bool
put_into_srfs)
serial_putc('c');
/* Now that we've reprogrammed, take things out of self refresh. */
- if (put_into_srfs)
+ if (unlikely(put_into_srfs))
#if defined(EBIU_RSTCTL)
bfin_write_EBIU_RSTCTL(bfin_read_EBIU_RSTCTL() ~(SRREQ));
#elif defined(EBIU_SDGCTL)
@@ -604,7 +604,7 @@ check_hibernation(ADI_BOOT_DATA *bs, u16 vr_ctl, bool
put_into_srfs)
*
* SCKELOW is unreliable on older parts (anomaly 307)
*/
- if (ANOMALY_05000307 || vr_ctl 0x8000) {
+ if (unlikely(ANOMALY_05000307 || vr_ctl 0x8000)) {
uint32_t *hibernate_magic = 0;
__builtin_bfin_ssync(); /* make sure memory controller is done
*/
if (hibernate_magic[0] == 0xDEADBEEF) {
--
1.7.9.7
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Re: [U-Boot] [PATCH v3 06/18] tegra: fdt: Add LCD definitions for Tegra
On Tue, Jul 31, 2012 at 10:27:23AM +0100, Simon Glass wrote:
+Thierry
Hi,
On Thu, Jul 12, 2012 at 4:25 PM, Simon Glass s...@chromium.org wrote:
Add LCD definitions and also a proposed binding for LCD displays.
The PWM is as per what will likely be committed to linux-next soon.
The displaymode binding comes from a proposal here:
http://lists.freedesktop.org/archives/dri-devel/2012-July/024875.html
The panel binding is new, and fills a need to specify the panel
timings and other tegra-specific information. Should a binding appear
that allows the pwm to handle this automatically, we can revisit
this.
Any comments on this binding please? The main addition from Thierry's
one posted on LMKL is the LCD resolution selection.
There's no such thing as the panel bindings on Linux. I think nobody's
done that before, there's also no suitable software abstraction, but I
suppose that should be irrelevant for this discussion.
+Optional properties (rgb):
+ - nvidia,frame-buffer: address of frame buffer (if omitted it will be
+ calculated)
+ - This may be useful to share an address between U-Boot and Linux
and
+ avoid boot-time corruption / flicker
+
+
+The panel node describes the panel itself.
+
+Required properties (panel) :
+ - nvidia,pwm : pwm to use to set display contrast (see tegra20-pwm.txt)
+ - nvidia,panel-timings: 4 cells containing required timings in ms:
+ * delay between panel_vdd-rise and data-rise
+ * delay between data-rise and backlight_vdd-rise
+ * delay between backlight_vdd and pwm-rise
+ * delay between pwm-rise and backlight_en-rise
+
+Optional GPIO properies all have (phandle, GPIO number, flags):
+ - nvidia,backlight-enable-gpios: backlight enable GPIO
+ - nvidia,lvds-shutdown-gpios: LVDS power shutdown GPIO
+ - nvidia,backlight-vdd-gpios: backlight power GPIO
+ - nvidia,panel-vdd-gpios: panel power GPIO
+
+Example:
+
+host1x {
+ compatible = nvidia,tegra20-host1x, simple-bus;
+ reg = 0x5000 0x00024000;
+ interrupts = 0 65 0x04 /* mpcore syncpt */
+ 0 67 0x04; /* mpcore general */
+
+ #address-cells = 1;
+ #size-cells = 1;
+
+ ranges = 0x5400 0x5400 0x0400;
+
+ dc@5420 {
+ compatible = nvidia,tegra20-dc;
+ reg = 0x5420 0x0004;
+ interrupts = 0 73 0x04;
+
+ rgb {
+ status = okay;
+ /* Seaboard has 1366x768 */
+ clock = 7060;
+ xres = 1366;
+ yres = 768;
+ left-margin = 58;
+ right-margin = 58;
+ hsync-len = 58;
+ lower-margin = 4;
+ upper-margin = 4;
+ vsync-len = 4;
+ hsync-active-high;
+ nvidia,frame-buffer = 0x2f68;
+ nvidia,bits-per-pixel = 16;
+ nvidia,panel = lcd_panel;
+ };
Perhaps it would be useful to add an extra node for the mode definition,
if only to keep the data separate from that of the rgb node. I know that
there currently are no other properties, but the rgb node was supposed
to define the output or connector. If ever the same needs to be done for
any of the TVO or DSI outputs, more properties may be needed.
Furthermore the code to parse this would be more generic because you
could pass it any DT node. Of course the nvidia,-prefixed properties
wouldn't be part of that subnode because they don't define the mode as
such.
Thinking about it some more, maybe the mode information should really be
part of the panel description below.
+ };
+};
+
+lcd_panel: panel {
+ nvidia,pwm = pwm 2 0;
+ nvidia,backlight-enable-gpios = gpio 28 0; /* PD4 */
+ nvidia,lvds-shutdown-gpios = gpio 10 0; /* PB2 */
+ nvidia,backlight-vdd-gpios = gpio 176 0; /* PW0 */
+ nvidia,panel-vdd-gpios = gpio 22 0; /* PC6 */
+ nvidia,panel-timings = 4 203 17 15;
+};
If we can reach some kind of agreement on the power-sequencing code that
Alexandre (Cc'ed) is working on, then this can be replaced with a more
generic description. This also has the usual problem of being a non-
addressable top-level node...
Thierry
pgpgCdC1yM7kJ.pgp
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Re: [U-Boot] [PATCH v2] Add support for Bluegiga APX4 Development Kit
On 09/07/2012 15:14, Veli-Pekka Peltola wrote: This adds support for Bluegiga APX4 Development Kit. It is built around Freescale i.MX28. Currently supported features are: ethernet, I2C, MMC, RTC and USB. APX4 has only one ethernet port. Signed-off-by: Veli-Pekka Peltola veli-pekka.pelt...@bluegiga.com Signed-off-by: Lauri Hintsala lauri.hints...@bluegiga.com Cc: Stefano Babic sba...@denx.de --- Hi Veli-Pekka, hi Laurie, sorry for late review. And thanks for the remind ! Changes after v1 from last December: - Updating MAINTAINERS file which I missed last time - Started to use SPL - Increased size of environment on NAND - Better commit message Our strategy to use fuses differs from other i.MX28 based boards. We store serial number to CUST3. We don't have ethernet MAC address on fuses so our customers could use their own address range. If I have some time later this week or next week, I will do some refactorization on that so we could have generic OTP reading function. Well, this sounds very promising .. ;-) MAINTAINERS|4 + board/bluegiga/apx4devkit/Makefile | 47 +++ board/bluegiga/apx4devkit/apx4devkit.c | 150 board/bluegiga/apx4devkit/spl_boot.c | 164 ++ board/bluegiga/apx4devkit/u-boot.bd| 14 ++ boards.cfg |1 + include/configs/apx4devkit.h | 238 7 files changed, 618 insertions(+) create mode 100644 board/bluegiga/apx4devkit/Makefile create mode 100644 board/bluegiga/apx4devkit/apx4devkit.c create mode 100644 board/bluegiga/apx4devkit/spl_boot.c create mode 100644 board/bluegiga/apx4devkit/u-boot.bd create mode 100644 include/configs/apx4devkit.h diff --git a/MAINTAINERS b/MAINTAINERS index 54eeab7..5c3fc6e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -784,6 +784,10 @@ Linus Walleij linus.wall...@linaro.org integratorapvarious integratorcpvarious +Veli-Pekka Peltola veli-pekka.pelt...@bluegiga.com + + apx4devkit i.MX28 + Luka Perkov ub...@lukaperkov.net I thought that your entry is not sorted, but really Linus' (and Helmut's before that) are in wrong order. Your is ok. diff --git a/include/configs/apx4devkit.h b/include/configs/apx4devkit.h new file mode 100644 index 000..9e7ead5 --- /dev/null +++ b/include/configs/apx4devkit.h @@ -0,0 +1,238 @@ +/* + * Copyright (C) 2012 Bluegiga Technologies Oy + * + * Authors: + * Veli-Pekka Peltola veli-pekka.pelt...@bluegiga.com + * Lauri Hintsala lauri.hints...@bluegiga.com + * + * Based on m28evk.h: + * Copyright (C) 2011 Marek Vasut marek.va...@gmail.com + * on behalf of DENX Software Engineering GmbH + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#ifndef __CONFIG_H +#define __CONFIG_H + +#include asm/arch/regs-base.h + +/* SoC configurations */ +#define CONFIG_MX28 /* i.MX28 SoC */ +#define CONFIG_MXS_GPIO /* GPIO control */ +#define CONFIG_SYS_HZ1000/* Ticks per second */ + +#define MACH_TYPE_APX4DEVKIT 3712 +#define CONFIG_MACH_TYPE MACH_TYPE_APX4DEVKIT You do not use MACH_TYPE_APX4DEVKIT at all, you could set directly CONFIG_MACH_TYPE. But it is not an issue, and you do not need to resend a new version. I see no problems in your patch - I will push it into the -next branch. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/8] EXYNOS5: Add pinmux support for SPI
This patch adds pinmux support for SPI channels
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
arch/arm/cpu/armv7/exynos/pinmux.c| 51 -
arch/arm/include/asm/arch-exynos/periph.h |5 +++
arch/arm/include/asm/arch-exynos/pinmux.h |3 ++
3 files changed, 58 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c
b/arch/arm/cpu/armv7/exynos/pinmux.c
index 7776add..13f75e0 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -230,6 +230,49 @@ static void exynos5_i2c_config(int peripheral, int flags)
}
}
+void exynos5_spi_config(int peripheral)
+{
+ int cfg = 0, pin = 0, i;
+ struct s5p_gpio_bank *bank = NULL;
+ struct exynos5_gpio_part1 *gpio1 =
+ (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
+ struct exynos5_gpio_part2 *gpio2 =
+ (struct exynos5_gpio_part2 *) samsung_get_base_gpio_part2();
+
+ switch (peripheral) {
+ case PERIPH_ID_SPI0:
+ bank = gpio1-a2;
+ cfg = GPIO_FUNC(0x2);
+ pin = 0;
+ break;
+ case PERIPH_ID_SPI1:
+ bank = gpio1-a2;
+ cfg = GPIO_FUNC(0x2);
+ pin = 4;
+ break;
+ case PERIPH_ID_SPI2:
+ bank = gpio1-b1;
+ cfg = GPIO_FUNC(0x5);
+ pin = 1;
+ break;
+ case PERIPH_ID_SPI3:
+ bank = gpio2-f1;
+ cfg = GPIO_FUNC(0x2);
+ pin = 0;
+ break;
+ case PERIPH_ID_SPI4:
+ for (i = 2; i 4; i++)
+ s5p_gpio_cfg_pin(gpio2-f0, i, GPIO_FUNC(0x4));
+ for (i = 4; i 6; i++)
+ s5p_gpio_cfg_pin(gpio2-e0, i, GPIO_FUNC(0x4));
+ break;
+ }
+ if (peripheral != PERIPH_ID_SPI4) {
+ for (i = pin; i pin + 4; i++)
+ s5p_gpio_cfg_pin(bank, i, cfg);
+ }
+}
+
static int exynos5_pinmux_config(int peripheral, int flags)
{
switch (peripheral) {
@@ -257,11 +300,17 @@ static int exynos5_pinmux_config(int peripheral, int
flags)
case PERIPH_ID_I2C7:
exynos5_i2c_config(peripheral, flags);
break;
+ case PERIPH_ID_SPI0:
+ case PERIPH_ID_SPI1:
+ case PERIPH_ID_SPI2:
+ case PERIPH_ID_SPI3:
+ case PERIPH_ID_SPI4:
+ exynos5_spi_config(peripheral);
+ break;
default:
debug(%s: invalid peripheral %d, __func__, peripheral);
return -1;
}
-
return 0;
}
diff --git a/arch/arm/include/asm/arch-exynos/periph.h
b/arch/arm/include/asm/arch-exynos/periph.h
index b861d7d..dafc3f3 100644
--- a/arch/arm/include/asm/arch-exynos/periph.h
+++ b/arch/arm/include/asm/arch-exynos/periph.h
@@ -43,6 +43,11 @@ enum periph_id {
PERIPH_ID_SDMMC2,
PERIPH_ID_SDMMC3,
PERIPH_ID_SROMC,
+ PERIPH_ID_SPI0,
+ PERIPH_ID_SPI1,
+ PERIPH_ID_SPI2,
+ PERIPH_ID_SPI3,
+ PERIPH_ID_SPI4,
PERIPH_ID_UART0,
PERIPH_ID_UART1,
PERIPH_ID_UART2,
diff --git a/arch/arm/include/asm/arch-exynos/pinmux.h
b/arch/arm/include/asm/arch-exynos/pinmux.h
index 10ea736..57c80be 100644
--- a/arch/arm/include/asm/arch-exynos/pinmux.h
+++ b/arch/arm/include/asm/arch-exynos/pinmux.h
@@ -36,6 +36,9 @@ enum {
/* Flags for eMMC */
PINMUX_FLAG_8BIT_MODE = 1 0, /* SDMMC 8-bit mode */
+ /* Flag for SPI */
+ PINMUX_FLAG_SLAVE_MODE = 1 0, /* Slave mode */
+
/* Flags for SROM controller */
PINMUX_FLAG_BANK= 3 0, /* bank number (0-3) */
PINMUX_FLAG_16BIT = 1 2, /* 16-bit width */
--
1.7.4.4
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[U-Boot] [PATCH 0/8] EXYNOS5: Enable SPI support
This patch set adds SPI driver for EXYNOS5 and enables same.
This patchset is based on top of latest V7 I2C patches which
are merged in u-boot-i2c.
url for same:
http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/136058
Rajeshwari Shinde (8):
EXYNOS5: Add pinmux support for SPI
SPI: Add W25Q32 to Winbond SPI flash table
EXYNOS: Add clock for SPI.
EXYNOS5: Add base address for SPI.
SPI: Add SPI slave mode flag
SPI: Add SPI Driver for EXYNOS.
EXYNOS5: Enable SPI
EXYNOS5: Enable SPI booting.
arch/arm/cpu/armv7/exynos/clock.c | 122 +++
arch/arm/cpu/armv7/exynos/pinmux.c| 51 +++-
arch/arm/include/asm/arch-exynos/clk.h|4 +-
arch/arm/include/asm/arch-exynos/cpu.h|6 +
arch/arm/include/asm/arch-exynos/periph.h |5 +
arch/arm/include/asm/arch-exynos/pinmux.h |3 +
arch/arm/include/asm/arch-exynos/spi.h| 78
board/samsung/smdk5250/Makefile |2 +-
board/samsung/smdk5250/smdk5250.c |3 +
board/samsung/smdk5250/{mmc_boot.c = spl_boot.c} | 31 ++-
drivers/mtd/spi/winbond.c |8 +
drivers/spi/Makefile |1 +
drivers/spi/exynos_spi.c | 400 +
include/configs/smdk5250.h| 28 ++-
include/spi.h |1 +
15 files changed, 737 insertions(+), 6 deletions(-)
create mode 100644 arch/arm/include/asm/arch-exynos/spi.h
rename board/samsung/smdk5250/{mmc_boot.c = spl_boot.c} (66%)
create mode 100644 drivers/spi/exynos_spi.c
--
1.7.4.4
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[U-Boot] [PATCH 3/8] EXYNOS: Add clock for SPI.
This patch adds api to calculate and set the clock for SPI channels
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
arch/arm/cpu/armv7/exynos/clock.c | 122
arch/arm/include/asm/arch-exynos/clk.h |4 +-
2 files changed, 125 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c
b/arch/arm/cpu/armv7/exynos/clock.c
index de3db8e..ea5c305 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -628,6 +628,122 @@ static unsigned long exynos5_get_i2c_clk(void)
return aclk_66;
}
+/**
+ * Linearly searches for the most accurate main and fine stage clock scalars
+ * (divisors) for a specified target frequency and scalar bit sizes by checking
+ * all multiples of main_scalar_bits values. Will always return scalars up to
or
+ * slower than target.
+ *
+ * @param main_scalar_bits Number of main scalar bits, must be 0 and 32
+ * @param fine_scalar_bits Number of fine scalar bits, must be 0 and 32
+ * @param input_freq Clock frequency to be scaled in Hz
+ * @param target_freq Desired clock frequency in Hz
+ * @param best_fine_scalar Pointer to store the fine stage divisor
+ *
+ * @return best_main_scalarMain scalar for desired frequency or -1 if none
+ * found
+ */
+static int clock_calc_best_scalar(unsigned int main_scaler_bits,
+ unsigned int fine_scalar_bits, unsigned int input_rate,
+ unsigned int target_rate, unsigned int *best_fine_scalar)
+{
+ int i;
+ int best_main_scalar = -1;
+ unsigned int best_error = target_rate;
+ const unsigned int cap = (1 fine_scalar_bits) - 1;
+ const unsigned int loops = 1 main_scaler_bits;
+
+ debug(Input Rate is %u, Target is %u, Cap is %u\n, input_rate,
+ target_rate, cap);
+
+ assert(best_fine_scalar != NULL);
+ assert(main_scaler_bits = fine_scalar_bits);
+
+ *best_fine_scalar = 1;
+
+ if (input_rate == 0 || target_rate == 0)
+ return -1;
+
+ if (target_rate = input_rate)
+ return 1;
+
+ for (i = 1; i = loops; i++) {
+ const unsigned int effective_div = max(min(input_rate / i /
+ target_rate, cap), 1);
+ const unsigned int effective_rate = input_rate / i /
+ effective_div;
+ const int error = target_rate - effective_rate;
+
+ debug(%d|effdiv:%u, effrate:%u, error:%d\n, i, effective_div,
+ effective_rate, error);
+
+ if (error = 0 error = best_error) {
+ best_error = error;
+ best_main_scalar = i;
+ *best_fine_scalar = effective_div;
+ }
+ }
+
+ return best_main_scalar;
+}
+
+static int exynos5_spi_set_clock_rate(enum periph_id periph_id,
+ unsigned int rate)
+{
+ struct exynos5_clock *clk =
+ (struct exynos5_clock *)samsung_get_base_clock();
+ int main;
+ unsigned int fine;
+ unsigned shift, pre_shift;
+ unsigned mask = 0xff;
+ u32 *reg;
+
+ main = clock_calc_best_scalar(4, 8, 4, rate, fine);
+ if (main 0) {
+ debug(%s: Cannot set clock rate for periph %d,
+ __func__, periph_id);
+ return -1;
+ }
+ main = main - 1;
+ fine = fine - 1;
+
+ switch (periph_id) {
+ case PERIPH_ID_SPI0:
+ reg = clk-div_peric1;
+ shift = 0;
+ pre_shift = 8;
+ break;
+ case PERIPH_ID_SPI1:
+ reg = clk-div_peric1;
+ shift = 16;
+ pre_shift = 24;
+ break;
+ case PERIPH_ID_SPI2:
+ reg = clk-div_peric2;
+ shift = 0;
+ pre_shift = 8;
+ break;
+ case PERIPH_ID_SPI3:
+ reg = clk-sclk_div_isp;
+ shift = 0;
+ pre_shift = 4;
+ break;
+ case PERIPH_ID_SPI4:
+ reg = clk-sclk_div_isp;
+ shift = 12;
+ pre_shift = 16;
+ break;
+ default:
+ debug(%s: Unsupported peripheral ID %d\n, __func__,
+ periph_id);
+ return -1;
+ }
+ clrsetbits_le32(reg, mask shift, (main mask) shift);
+ clrsetbits_le32(reg, mask pre_shift, (fine mask) pre_shift);
+
+ return 0;
+}
+
unsigned long get_pll_clk(int pllreg)
{
if (cpu_is_exynos5())
@@ -697,3 +813,9 @@ void set_mipi_clk(void)
if (cpu_is_exynos4())
exynos4_set_mipi_clk();
}
+
+int spi_set_clock_rate(enum periph_id periph_id, unsigned int
[U-Boot] [PATCH 2/8] SPI: Add W25Q32 to Winbond SPI flash table
Daisy has a different Winbond part as compared to the SMDK.
Add the part details to the SPI flash table.
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
drivers/mtd/spi/winbond.c |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/drivers/mtd/spi/winbond.c b/drivers/mtd/spi/winbond.c
index c20faa2..b345efc 100644
--- a/drivers/mtd/spi/winbond.c
+++ b/drivers/mtd/spi/winbond.c
@@ -107,6 +107,14 @@ static const struct winbond_spi_flash_params
winbond_spi_flash_table[] = {
.nr_blocks = 256,
.name = W25Q128,
},
+ {
+ .id = 0x5014,
+ .l2_page_size = 8,
+ .pages_per_sector = 16,
+ .sectors_per_block = 16,
+ .nr_blocks = 128,
+ .name = W25Q80,
+ },
};
static int winbond_erase(struct spi_flash *flash, u32 offset, size_t len)
--
1.7.4.4
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[U-Boot] [PATCH 5/8] SPI: Add SPI slave mode flag
This patch adds a new SPI mode flags for SPI slave mode. It enables slave mode in a SPI interface, and is set/clear in spi_setup_slave() from the mode parameter. Signed-off-by: Padmavathi Venna padm...@samsung.com Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com --- include/spi.h |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/include/spi.h b/include/spi.h index 60e85db..733c395 100644 --- a/include/spi.h +++ b/include/spi.h @@ -37,6 +37,7 @@ #defineSPI_LSB_FIRST 0x08/* per-word bits-on-wire */ #defineSPI_3WIRE 0x10/* SI/SO signals shared */ #defineSPI_LOOP0x20/* loopback mode */ +#defineSPI_SLAVE 0x40/* slave mode */ /* SPI transfer flags */ #define SPI_XFER_BEGIN 0x01/* Assert CS before transfer */ -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 4/8] EXYNOS5: Add base address for SPI.
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com --- arch/arm/include/asm/arch-exynos/cpu.h |6 ++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h index 0e6ea87..89c2dd3 100644 --- a/arch/arm/include/asm/arch-exynos/cpu.h +++ b/arch/arm/include/asm/arch-exynos/cpu.h @@ -51,11 +51,13 @@ #define EXYNOS4_UART_BASE 0x1380 #define EXYNOS4_I2C_BASE 0x1386 #define EXYNOS4_ADC_BASE 0x1391 +#define EXYNOS4_SPI_BASE 0x1392 #define EXYNOS4_PWMTIMER_BASE 0x139D #define EXYNOS4_MODEM_BASE 0x13A0 #define EXYNOS4_USBPHY_CONTROL 0x10020704 #define EXYNOS4_GPIO_PART4_BASEDEVICE_NOT_AVAILABLE +#define EXYNOS4_SPI_ISP_BASE DEVICE_NOT_AVAILABLE /* EXYNOS5 */ #define EXYNOS5_I2C_SPACING0x1 @@ -80,7 +82,9 @@ #define EXYNOS5_SROMC_BASE 0x1225 #define EXYNOS5_UART_BASE 0x12C0 #define EXYNOS5_I2C_BASE 0x12C6 +#define EXYNOS5_SPI_BASE 0x12D2 #define EXYNOS5_PWMTIMER_BASE 0x12DD +#define EXYNOS5_SPI_ISP_BASE 0x131A #define EXYNOS5_GPIO_PART2_BASE0x1340 #define EXYNOS5_FIMD_BASE 0x1440 @@ -170,6 +174,8 @@ SAMSUNG_BASE(usb_ehci, USB_HOST_EHCI_BASE) SAMSUNG_BASE(usb_otg, USBOTG_BASE) SAMSUNG_BASE(watchdog, WATCHDOG_BASE) SAMSUNG_BASE(power, POWER_BASE) +SAMSUNG_BASE(spi, SPI_BASE) +SAMSUNG_BASE(spi_isp, SPI_ISP_BASE) #endif #endif /* _EXYNOS4_CPU_H */ -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 7/8] EXYNOS5: Enable SPI
This patch enables SPI driver for EXYNOS5.
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
board/samsung/smdk5250/smdk5250.c |3 +++
include/configs/smdk5250.h| 23 ++-
2 files changed, 25 insertions(+), 1 deletions(-)
diff --git a/board/samsung/smdk5250/smdk5250.c
b/board/samsung/smdk5250/smdk5250.c
index a5816e4..2848c10 100644
--- a/board/samsung/smdk5250/smdk5250.c
+++ b/board/samsung/smdk5250/smdk5250.c
@@ -63,6 +63,9 @@ static int smc9115_pre_init(void)
int board_init(void)
{
gd-bd-bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
+#ifdef CONFIG_EXYNOS_SPI
+ spi_init();
+#endif
return 0;
}
diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h
index 27dab76..29b7ac6 100644
--- a/include/configs/smdk5250.h
+++ b/include/configs/smdk5250.h
@@ -167,7 +167,7 @@
#undef CONFIG_CMD_IMLS
#define CONFIG_IDENT_STRING for SMDK5250
-#define CONFIG_ENV_IS_IN_MMC
+/*#define CONFIG_ENV_IS_IN_MMC*/
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_SECURE_BL1_ONLY
@@ -216,6 +216,27 @@
#define CONFIG_ENV_SROM_BANK 1
#endif /*CONFIG_CMD_NET*/
+/* SPI */
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_SPI_FLASH
+
+#ifdef CONFIG_SPI_FLASH
+#define CONFIG_EXYNOS_SPI
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_SPI
+#define CONFIG_SPI_FLASH_WINBOND
+#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
+#define CONFIG_SF_DEFAULT_SPEED5000
+#define EXYNOS5_SPI_NUM_CONTROLLERS5
+#endif
+
+#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_SPI_MODESPI_MODE_0
+#define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
+#define CONFIG_ENV_SPI_BUS 1
+#define CONFIG_ENV_SPI_MAX_HZ 5000
+#endif
+
/* Enable devicetree support */
#define CONFIG_OF_LIBFDT
--
1.7.4.4
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[U-Boot] [PATCH 6/8] SPI: Add SPI Driver for EXYNOS.
This patch adds SPI driver for EXYNOS.
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Padmavathi Venna padm...@samsung.com
Signed-off-by: Gabe Black gabebl...@google.com
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
arch/arm/include/asm/arch-exynos/spi.h | 78 ++
drivers/spi/Makefile |1 +
drivers/spi/exynos_spi.c | 400
3 files changed, 479 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/include/asm/arch-exynos/spi.h
create mode 100644 drivers/spi/exynos_spi.c
diff --git a/arch/arm/include/asm/arch-exynos/spi.h
b/arch/arm/include/asm/arch-exynos/spi.h
new file mode 100644
index 000..7cab1e9
--- /dev/null
+++ b/arch/arm/include/asm/arch-exynos/spi.h
@@ -0,0 +1,78 @@
+/*
+ * (C) Copyright 2012 SAMSUNG Electronics
+ * Padmavathi Venna padm...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef __ASM_ARCH_EXYNOS_COMMON_SPI_H_
+#define __ASM_ARCH_EXYNOS_COMMON_SPI_H_
+
+#ifndef __ASSEMBLY__
+
+/* SPI peripheral register map; padded to 64KB */
+struct exynos_spi {
+ unsigned intch_cfg; /* 0x00 */
+ unsigned char reserved0[4];
+ unsigned intmode_cfg; /* 0x08 */
+ unsigned intcs_reg; /* 0x0c */
+ unsigned char reserved1[4];
+ unsigned intspi_sts;/* 0x14 */
+ unsigned inttx_data;/* 0x18 */
+ unsigned intrx_data;/* 0x1c */
+ unsigned intpkt_cnt;/* 0x20 */
+ unsigned char reserved2[4];
+ unsigned char reserved3[4];
+ unsigned intfb_clk; /* 0x2c */
+ unsigned char padding[0xffd0];
+};
+
+#define EXYNOS_SPI_MAX_FREQ5000
+
+#define SPI_TIMEOUT_MS 10
+
+/* SPI_CHCFG */
+#define SPI_CH_HS_EN (1 6)
+#define SPI_CH_RST (1 5)
+#define SPI_SLAVE_MODE (1 4)
+#define SPI_CH_CPOL_L (1 3)
+#define SPI_CH_CPHA_B (1 2)
+#define SPI_RX_CH_ON (1 1)
+#define SPI_TX_CH_ON (1 0)
+
+/* SPI_MODECFG */
+#define SPI_MODE_CH_WIDTH_WORD (0x2 29)
+#define SPI_MODE_BUS_WIDTH_WORD(0x2 17)
+
+/* SPI_CSREG */
+#define SPI_SLAVE_SIG_INACT(1 0)
+
+/* SPI_STS */
+#define SPI_ST_TX_DONE (1 25)
+#define SPI_FIFO_LVL_MASK 0x1ff
+#define SPI_TX_LVL_OFFSET 6
+#define SPI_RX_LVL_OFFSET 15
+
+/* Feedback Delay */
+#define SPI_CLK_BYPASS (0 0)
+#define SPI_FB_DELAY_90(1 0)
+#define SPI_FB_DELAY_180 (2 0)
+#define SPI_FB_DELAY_270 (3 0)
+
+/* Packet Count */
+#define SPI_PACKET_CNT_EN (1 16)
+
+#endif /* __ASSEMBLY__ */
+#endif
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index c20f1f2..f15adf0 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -33,6 +33,7 @@ COBJS-$(CONFIG_ATMEL_SPI) += atmel_spi.o
COBJS-$(CONFIG_BFIN_SPI) += bfin_spi.o
COBJS-$(CONFIG_CF_SPI) += cf_spi.o
COBJS-$(CONFIG_DAVINCI_SPI) += davinci_spi.o
+COBJS-$(CONFIG_EXYNOS_SPI) += exynos_spi.o
COBJS-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o
COBJS-$(CONFIG_MPC52XX_SPI) += mpc52xx_spi.o
COBJS-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o
diff --git a/drivers/spi/exynos_spi.c b/drivers/spi/exynos_spi.c
new file mode 100644
index 000..73fb447
--- /dev/null
+++ b/drivers/spi/exynos_spi.c
@@ -0,0 +1,400 @@
+/*
+ * (C) Copyright 2012 SAMSUNG Electronics
+ * Padmavathi Venna padm...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
[U-Boot] [PATCH 8/8] EXYNOS5: Enable SPI booting.
This patch enables SPI Booting for EXYNOS5
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
board/samsung/smdk5250/Makefile |2 +-
board/samsung/smdk5250/{mmc_boot.c = spl_boot.c} | 31 +++-
include/configs/smdk5250.h|5 +++
3 files changed, 35 insertions(+), 3 deletions(-)
rename board/samsung/smdk5250/{mmc_boot.c = spl_boot.c} (66%)
diff --git a/board/samsung/smdk5250/Makefile b/board/samsung/smdk5250/Makefile
index 1474fa8..47c6a5a 100644
--- a/board/samsung/smdk5250/Makefile
+++ b/board/samsung/smdk5250/Makefile
@@ -36,7 +36,7 @@ COBJS += smdk5250.o
endif
ifdef CONFIG_SPL_BUILD
-COBJS += mmc_boot.o
+COBJS += spl_boot.o
endif
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/board/samsung/smdk5250/mmc_boot.c
b/board/samsung/smdk5250/spl_boot.c
similarity index 66%
rename from board/samsung/smdk5250/mmc_boot.c
rename to board/samsung/smdk5250/spl_boot.c
index 449a919..d8f3c1e 100644
--- a/board/samsung/smdk5250/mmc_boot.c
+++ b/board/samsung/smdk5250/spl_boot.c
@@ -23,6 +23,16 @@
#includecommon.h
#includeconfig.h
+enum boot_mode {
+ BOOT_MODE_MMC = 4,
+ BOOT_MODE_SERIAL = 20,
+ /* Boot based on Operating Mode pin settings */
+ BOOT_MODE_OM = 32,
+ BOOT_MODE_USB, /* Boot using USB download */
+};
+
+ typedef u32 (*spi_copy_func_t)(u32 offset, u32 nblock, u32 dst);
+
/*
* Copy U-boot from mmc to RAM:
* COPY_BL2_FNPTR_ADDR: Address in iRAM, which Contains
@@ -30,9 +40,26 @@
*/
void copy_uboot_to_ram(void)
{
- u32 (*copy_bl2)(u32, u32, u32) = (void *) *(u32 *)COPY_BL2_FNPTR_ADDR;
+ spi_copy_func_t spi_copy;
+ enum boot_mode bootmode;
+ u32 (*copy_bl2)(u32, u32, u32);
+
+ bootmode = readl(EXYNOS5_POWER_BASE) OM_STAT;
- copy_bl2(BL2_START_OFFSET, BL2_SIZE_BLOC_COUNT, CONFIG_SYS_TEXT_BASE);
+ switch (bootmode) {
+ case BOOT_MODE_SERIAL:
+ spi_copy = *(spi_copy_func_t *)EXYNOS_COPY_SPI_FNPTR_ADDR;
+ spi_copy(SPI_FLASH_UBOOT_POS, CONFIG_BL2_SIZE,
+ CONFIG_SYS_TEXT_BASE);
+ break;
+ case BOOT_MODE_MMC:
+ copy_bl2 = (void *) *(u32 *)COPY_BL2_FNPTR_ADDR;
+ copy_bl2(BL2_START_OFFSET, BL2_SIZE_BLOC_COUNT,
+ CONFIG_SYS_TEXT_BASE);
+ break;
+ default:
+ break;
+ }
}
void board_init_f(unsigned long bootflag)
diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h
index 29b7ac6..4b9093c 100644
--- a/include/configs/smdk5250.h
+++ b/include/configs/smdk5250.h
@@ -192,6 +192,11 @@
/* U-boot copy size from boot Media to DRAM.*/
#define BL2_START_OFFSET (CONFIG_BL2_OFFSET/512)
#define BL2_SIZE_BLOC_COUNT(CONFIG_BL2_SIZE/512)
+
+#define OM_STAT(0x1f 1)
+#define EXYNOS_COPY_SPI_FNPTR_ADDR 0x02020058
+#define SPI_FLASH_UBOOT_POS(CONFIG_SEC_FW_SIZE + CONFIG_BL1_SIZE)
+
#define CONFIG_DOS_PARTITION
#define CONFIG_IRAM_STACK 0x0205
--
1.7.4.4
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Re: [U-Boot] [RESEND] [PATCH 0/2] kirkwood: Generalise dns325 support, include dns320
-Original Message-
From: Jamie Lentin [mailto:j...@lentin.co.uk]
Sent: 31 July 2012 14:01
To: Prafulla Wadaskar
Cc: u-boot@lists.denx.de; albert.u.b...@aribaud.net;
ub...@lukaperkov.net
Subject: RE: [RESEND] [PATCH 0/2] kirkwood: Generalise dns325 support,
include dns320
On Mon, 30 Jul 2012, Prafulla Wadaskar wrote:
Dear Jamie Lentin
-Original Message-
From: Jamie Lentin [mailto:j...@lentin.co.uk]
Sent: 31 July 2012 03:26
To: u-boot@lists.denx.de
Cc: Prafulla Wadaskar; albert.u.b...@aribaud.net;
ub...@lukaperkov.net; Jamie Lentin
Subject: [RESEND] [PATCH 0/2] kirkwood: Generalise dns325 support,
include dns320
I submitted this a while ago[0], it would be nice to see it
included
if possible. It generalises the DNS325 support so that it can be
used
for both the DNS320 and DNS325.
Luka Perkov stated I have no more questions regarding this patch,
not
sure if this counts as an ACK. The patch here is ~same, just
rebased.
Somewhat related, I have tried using tools/kwboot to boot both
NASes.
The DNS325 boots fine, however the DNS320 reports:-
Sending boot message. Please reboot the target...|
Sending boot image...
0 % [+xmodem: Bad message
UART-boot works with kwuartboot, although only when it is killed
and
restarted. If I work out anything interesting will follow it up in
a separate thread.
Any feedback appreciated!
[0] http://thread.gmane.org/gmane.comp.boot-loaders.u-
boot/130234/focus=130575
Jamie Lentin (2):
kirkwood: Rename dns325 to dnskw
kirkwood: Add support for the D-Link DNS-320
MAINTAINERS|4 +
board/d-link/{dns325 = dnskw}/Makefile|2 +-
board/d-link/{dns325/dns325.c = dnskw/dnskw.c}| 18 +-
board/d-link/{dns325/dns325.h = dnskw/dnskw.h}| 30 ++-
board/d-link/dnskw/kwbimage.dns320.cfg | 207
.../kwbimage.cfg = dnskw/kwbimage.dns325.cfg} |0
boards.cfg |3 +-
include/configs/{dns325.h = dnskw.h} | 21 +-
8 files changed, 261 insertions(+), 24 deletions(-)
rename board/d-link/{dns325 = dnskw}/Makefile (98%)
rename board/d-link/{dns325/dns325.c = dnskw/dnskw.c} (90%)
rename board/d-link/{dns325/dns325.h = dnskw/dnskw.h} (65%)
create mode 100644 board/d-link/dnskw/kwbimage.dns320.cfg
Finally you will two kwbimage files for two boards being supported.
BTW:
I would like to ask : what is a difference between these two files?
If
it is very small, it can be handled in early_board_init().
In that case you can keep the earlier name kwbimage.cfg as it is and
one file can be avoided.
The DNS-320 has half the RAM of the DNS-325 at different timings, so
the
difference is non-trivial. I'm not sure there would be a logical way
to
divide it up into a common setup and changes in early_board_init(). I
could have a go if you prefer though---if there's prior art somewhere
else
in u-boot please let me know and I'll have a look.
Hi Jamie
You can create a common kwbimage.cfg that suits for both the boards (with
larger RAM size and comfortable timings for both the boards)
These configuration will be pushed on the Kirkwood registers before u-boot
image kick start. Then in early_board_init() you can tuned these register for
appropriate boards (for ex. reduce size, or tune timings etc.)
Please try to implement this if this sounds good.
Regards...
Prafulla . . .
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Re: [U-Boot] [PATCH] lsxl: support power switch
On Tue, July 31, 2012 07:59, Prafulla Wadaskar wrote:
-Original Message-
From: Michael Walle [mailto:mich...@walle.cc]
Sent: 31 July 2012 02:17
To: u-boot@lists.denx.de
Cc: Michael Walle; Prafulla Wadaskar
Subject: [PATCH] lsxl: support power switch
This patch restores the Linkstation's original behaviour when powering
off.
Once the (soft) power switch is turned off, linux will reboot and the
bootloader turns off HDD and USB power. Then it loops as long as the
switch
is in the off position, before continuing the boot process again.
Additionally, this patch fixes the board function set_led(LED_OFF).
Signed-off-by: Michael Walle mich...@walle.cc
Cc: Prafulla Wadaskar prafu...@marvell.com
---
board/buffalo/lsxl/lsxl.c | 22 +-
1 files changed, 21 insertions(+), 1 deletions(-)
diff --git a/board/buffalo/lsxl/lsxl.c b/board/buffalo/lsxl/lsxl.c
index fe15511..b3f31d6 100644
--- a/board/buffalo/lsxl/lsxl.c
+++ b/board/buffalo/lsxl/lsxl.c
@@ -158,7 +158,7 @@ static void set_led(int state)
{
switch (state) {
case LED_OFF:
-__set_led(0, 0, 0, 0, 0, 0);
+__set_led(0, 0, 0, 1, 1, 1);
break;
case LED_ALARM_ON:
__set_led(0, 0, 0, 0, 1, 1);
@@ -192,6 +192,25 @@ int board_init(void)
}
#ifdef CONFIG_MISC_INIT_R
+static void check_power_switch(void)
+{
+if (kw_gpio_get_value(GPIO_POWER_SWITCH)) {
+/* turn off HDD and USB power */
+kw_gpio_set_value(GPIO_HDD_POWER, 0);
+kw_gpio_set_value(GPIO_USB_VBUS, 0);
+set_led(LED_OFF);
+
+/* loop until released */
+while (kw_gpio_get_value(GPIO_POWER_SWITCH))
+;
Please avoid infinite loop, may you introduce timeout?
actually, thats the use case, to loop indefinitely ;) See the commit
message. The GPIO is a switch not a button. As long as it is switched to
Power Off uboot should loop.
+
+/* turn power on again */
+kw_gpio_set_value(GPIO_HDD_POWER, 1);
+kw_gpio_set_value(GPIO_USB_VBUS, 1);
+set_led(LED_POWER_BLINKING);
+}
+}
+
void check_enetaddr(void)
{
uchar enetaddr[6];
@@ -261,6 +280,7 @@ static void check_push_button(void)
int misc_init_r(void)
{
+check_power_switch();
check_enetaddr();
check_push_button();
Ack for rest of the code.
Thanks for the review.
--
michael
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[U-Boot] [PATCH 0/8 V2] EXYNOS5: Enable SPI support
This patch set adds SPI driver for EXYNOS5 and enables same.
This patchset is based on top of latest V7 I2C patches which
are merged in u-boot-i2c.
url for same:
http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/136058
Changes in V2:
- Correted the Commit message.
Rajeshwari Shinde (8):
EXYNOS5: Add pinmux support for SPI
SPI: Add W25Q32 to Winbond SPI flash table
EXYNOS: Add clock for SPI.
EXYNOS5: Add base address for SPI.
SPI: Add SPI slave mode flag
SPI: Add SPI Driver for EXYNOS.
EXYNOS5: Enable SPI
EXYNOS5: Enable SPI booting.
arch/arm/cpu/armv7/exynos/clock.c | 122 +++
arch/arm/cpu/armv7/exynos/pinmux.c| 51 +++-
arch/arm/include/asm/arch-exynos/clk.h|4 +-
arch/arm/include/asm/arch-exynos/cpu.h|6 +
arch/arm/include/asm/arch-exynos/periph.h |5 +
arch/arm/include/asm/arch-exynos/pinmux.h |3 +
arch/arm/include/asm/arch-exynos/spi.h| 78
board/samsung/smdk5250/Makefile |2 +-
board/samsung/smdk5250/smdk5250.c |3 +
board/samsung/smdk5250/{mmc_boot.c = spl_boot.c} | 31 ++-
drivers/mtd/spi/winbond.c |8 +
drivers/spi/Makefile |1 +
drivers/spi/exynos_spi.c | 400 +
include/configs/smdk5250.h| 28 ++-
include/spi.h |1 +
15 files changed, 737 insertions(+), 6 deletions(-)
create mode 100644 arch/arm/include/asm/arch-exynos/spi.h
rename board/samsung/smdk5250/{mmc_boot.c = spl_boot.c} (66%)
create mode 100644 drivers/spi/exynos_spi.c
--
1.7.4.4
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[U-Boot] [PATCH 1/8 V2] EXYNOS5: Add pinmux support for SPI
This patch adds pinmux support for SPI channels
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- None.
arch/arm/cpu/armv7/exynos/pinmux.c| 51 -
arch/arm/include/asm/arch-exynos/periph.h |5 +++
arch/arm/include/asm/arch-exynos/pinmux.h |3 ++
3 files changed, 58 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c
b/arch/arm/cpu/armv7/exynos/pinmux.c
index 7776add..13f75e0 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -230,6 +230,49 @@ static void exynos5_i2c_config(int peripheral, int flags)
}
}
+void exynos5_spi_config(int peripheral)
+{
+ int cfg = 0, pin = 0, i;
+ struct s5p_gpio_bank *bank = NULL;
+ struct exynos5_gpio_part1 *gpio1 =
+ (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
+ struct exynos5_gpio_part2 *gpio2 =
+ (struct exynos5_gpio_part2 *) samsung_get_base_gpio_part2();
+
+ switch (peripheral) {
+ case PERIPH_ID_SPI0:
+ bank = gpio1-a2;
+ cfg = GPIO_FUNC(0x2);
+ pin = 0;
+ break;
+ case PERIPH_ID_SPI1:
+ bank = gpio1-a2;
+ cfg = GPIO_FUNC(0x2);
+ pin = 4;
+ break;
+ case PERIPH_ID_SPI2:
+ bank = gpio1-b1;
+ cfg = GPIO_FUNC(0x5);
+ pin = 1;
+ break;
+ case PERIPH_ID_SPI3:
+ bank = gpio2-f1;
+ cfg = GPIO_FUNC(0x2);
+ pin = 0;
+ break;
+ case PERIPH_ID_SPI4:
+ for (i = 2; i 4; i++)
+ s5p_gpio_cfg_pin(gpio2-f0, i, GPIO_FUNC(0x4));
+ for (i = 4; i 6; i++)
+ s5p_gpio_cfg_pin(gpio2-e0, i, GPIO_FUNC(0x4));
+ break;
+ }
+ if (peripheral != PERIPH_ID_SPI4) {
+ for (i = pin; i pin + 4; i++)
+ s5p_gpio_cfg_pin(bank, i, cfg);
+ }
+}
+
static int exynos5_pinmux_config(int peripheral, int flags)
{
switch (peripheral) {
@@ -257,11 +300,17 @@ static int exynos5_pinmux_config(int peripheral, int
flags)
case PERIPH_ID_I2C7:
exynos5_i2c_config(peripheral, flags);
break;
+ case PERIPH_ID_SPI0:
+ case PERIPH_ID_SPI1:
+ case PERIPH_ID_SPI2:
+ case PERIPH_ID_SPI3:
+ case PERIPH_ID_SPI4:
+ exynos5_spi_config(peripheral);
+ break;
default:
debug(%s: invalid peripheral %d, __func__, peripheral);
return -1;
}
-
return 0;
}
diff --git a/arch/arm/include/asm/arch-exynos/periph.h
b/arch/arm/include/asm/arch-exynos/periph.h
index b861d7d..dafc3f3 100644
--- a/arch/arm/include/asm/arch-exynos/periph.h
+++ b/arch/arm/include/asm/arch-exynos/periph.h
@@ -43,6 +43,11 @@ enum periph_id {
PERIPH_ID_SDMMC2,
PERIPH_ID_SDMMC3,
PERIPH_ID_SROMC,
+ PERIPH_ID_SPI0,
+ PERIPH_ID_SPI1,
+ PERIPH_ID_SPI2,
+ PERIPH_ID_SPI3,
+ PERIPH_ID_SPI4,
PERIPH_ID_UART0,
PERIPH_ID_UART1,
PERIPH_ID_UART2,
diff --git a/arch/arm/include/asm/arch-exynos/pinmux.h
b/arch/arm/include/asm/arch-exynos/pinmux.h
index 10ea736..57c80be 100644
--- a/arch/arm/include/asm/arch-exynos/pinmux.h
+++ b/arch/arm/include/asm/arch-exynos/pinmux.h
@@ -36,6 +36,9 @@ enum {
/* Flags for eMMC */
PINMUX_FLAG_8BIT_MODE = 1 0, /* SDMMC 8-bit mode */
+ /* Flag for SPI */
+ PINMUX_FLAG_SLAVE_MODE = 1 0, /* Slave mode */
+
/* Flags for SROM controller */
PINMUX_FLAG_BANK= 3 0, /* bank number (0-3) */
PINMUX_FLAG_16BIT = 1 2, /* 16-bit width */
--
1.7.4.4
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[U-Boot] [PATCH 3/8 V2] EXYNOS: Add clock for SPI.
This patch adds api to calculate and set the clock for SPI channels
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- None
arch/arm/cpu/armv7/exynos/clock.c | 122
arch/arm/include/asm/arch-exynos/clk.h |4 +-
2 files changed, 125 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c
b/arch/arm/cpu/armv7/exynos/clock.c
index de3db8e..ea5c305 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -628,6 +628,122 @@ static unsigned long exynos5_get_i2c_clk(void)
return aclk_66;
}
+/**
+ * Linearly searches for the most accurate main and fine stage clock scalars
+ * (divisors) for a specified target frequency and scalar bit sizes by checking
+ * all multiples of main_scalar_bits values. Will always return scalars up to
or
+ * slower than target.
+ *
+ * @param main_scalar_bits Number of main scalar bits, must be 0 and 32
+ * @param fine_scalar_bits Number of fine scalar bits, must be 0 and 32
+ * @param input_freq Clock frequency to be scaled in Hz
+ * @param target_freq Desired clock frequency in Hz
+ * @param best_fine_scalar Pointer to store the fine stage divisor
+ *
+ * @return best_main_scalarMain scalar for desired frequency or -1 if none
+ * found
+ */
+static int clock_calc_best_scalar(unsigned int main_scaler_bits,
+ unsigned int fine_scalar_bits, unsigned int input_rate,
+ unsigned int target_rate, unsigned int *best_fine_scalar)
+{
+ int i;
+ int best_main_scalar = -1;
+ unsigned int best_error = target_rate;
+ const unsigned int cap = (1 fine_scalar_bits) - 1;
+ const unsigned int loops = 1 main_scaler_bits;
+
+ debug(Input Rate is %u, Target is %u, Cap is %u\n, input_rate,
+ target_rate, cap);
+
+ assert(best_fine_scalar != NULL);
+ assert(main_scaler_bits = fine_scalar_bits);
+
+ *best_fine_scalar = 1;
+
+ if (input_rate == 0 || target_rate == 0)
+ return -1;
+
+ if (target_rate = input_rate)
+ return 1;
+
+ for (i = 1; i = loops; i++) {
+ const unsigned int effective_div = max(min(input_rate / i /
+ target_rate, cap), 1);
+ const unsigned int effective_rate = input_rate / i /
+ effective_div;
+ const int error = target_rate - effective_rate;
+
+ debug(%d|effdiv:%u, effrate:%u, error:%d\n, i, effective_div,
+ effective_rate, error);
+
+ if (error = 0 error = best_error) {
+ best_error = error;
+ best_main_scalar = i;
+ *best_fine_scalar = effective_div;
+ }
+ }
+
+ return best_main_scalar;
+}
+
+static int exynos5_spi_set_clock_rate(enum periph_id periph_id,
+ unsigned int rate)
+{
+ struct exynos5_clock *clk =
+ (struct exynos5_clock *)samsung_get_base_clock();
+ int main;
+ unsigned int fine;
+ unsigned shift, pre_shift;
+ unsigned mask = 0xff;
+ u32 *reg;
+
+ main = clock_calc_best_scalar(4, 8, 4, rate, fine);
+ if (main 0) {
+ debug(%s: Cannot set clock rate for periph %d,
+ __func__, periph_id);
+ return -1;
+ }
+ main = main - 1;
+ fine = fine - 1;
+
+ switch (periph_id) {
+ case PERIPH_ID_SPI0:
+ reg = clk-div_peric1;
+ shift = 0;
+ pre_shift = 8;
+ break;
+ case PERIPH_ID_SPI1:
+ reg = clk-div_peric1;
+ shift = 16;
+ pre_shift = 24;
+ break;
+ case PERIPH_ID_SPI2:
+ reg = clk-div_peric2;
+ shift = 0;
+ pre_shift = 8;
+ break;
+ case PERIPH_ID_SPI3:
+ reg = clk-sclk_div_isp;
+ shift = 0;
+ pre_shift = 4;
+ break;
+ case PERIPH_ID_SPI4:
+ reg = clk-sclk_div_isp;
+ shift = 12;
+ pre_shift = 16;
+ break;
+ default:
+ debug(%s: Unsupported peripheral ID %d\n, __func__,
+ periph_id);
+ return -1;
+ }
+ clrsetbits_le32(reg, mask shift, (main mask) shift);
+ clrsetbits_le32(reg, mask pre_shift, (fine mask) pre_shift);
+
+ return 0;
+}
+
unsigned long get_pll_clk(int pllreg)
{
if (cpu_is_exynos5())
@@ -697,3 +813,9 @@ void set_mipi_clk(void)
if (cpu_is_exynos4())
exynos4_set_mipi_clk();
}
+
+int spi_set_clock_rate(enum
[U-Boot] [PATCH 2/8 V2] SPI: Add W25Q32 to Winbond SPI flash table
SMDK EVT1 has a different Winbond part added its part details
to the SPI flash table.
Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- Corrected the commit message.
drivers/mtd/spi/winbond.c |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/drivers/mtd/spi/winbond.c b/drivers/mtd/spi/winbond.c
index c20faa2..b345efc 100644
--- a/drivers/mtd/spi/winbond.c
+++ b/drivers/mtd/spi/winbond.c
@@ -107,6 +107,14 @@ static const struct winbond_spi_flash_params
winbond_spi_flash_table[] = {
.nr_blocks = 256,
.name = W25Q128,
},
+ {
+ .id = 0x5014,
+ .l2_page_size = 8,
+ .pages_per_sector = 16,
+ .sectors_per_block = 16,
+ .nr_blocks = 128,
+ .name = W25Q80,
+ },
};
static int winbond_erase(struct spi_flash *flash, u32 offset, size_t len)
--
1.7.4.4
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[U-Boot] [PATCH 4/8 V2] EXYNOS5: Add base address for SPI.
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com --- Changes in V2: - None arch/arm/include/asm/arch-exynos/cpu.h |6 ++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h index 0e6ea87..89c2dd3 100644 --- a/arch/arm/include/asm/arch-exynos/cpu.h +++ b/arch/arm/include/asm/arch-exynos/cpu.h @@ -51,11 +51,13 @@ #define EXYNOS4_UART_BASE 0x1380 #define EXYNOS4_I2C_BASE 0x1386 #define EXYNOS4_ADC_BASE 0x1391 +#define EXYNOS4_SPI_BASE 0x1392 #define EXYNOS4_PWMTIMER_BASE 0x139D #define EXYNOS4_MODEM_BASE 0x13A0 #define EXYNOS4_USBPHY_CONTROL 0x10020704 #define EXYNOS4_GPIO_PART4_BASEDEVICE_NOT_AVAILABLE +#define EXYNOS4_SPI_ISP_BASE DEVICE_NOT_AVAILABLE /* EXYNOS5 */ #define EXYNOS5_I2C_SPACING0x1 @@ -80,7 +82,9 @@ #define EXYNOS5_SROMC_BASE 0x1225 #define EXYNOS5_UART_BASE 0x12C0 #define EXYNOS5_I2C_BASE 0x12C6 +#define EXYNOS5_SPI_BASE 0x12D2 #define EXYNOS5_PWMTIMER_BASE 0x12DD +#define EXYNOS5_SPI_ISP_BASE 0x131A #define EXYNOS5_GPIO_PART2_BASE0x1340 #define EXYNOS5_FIMD_BASE 0x1440 @@ -170,6 +174,8 @@ SAMSUNG_BASE(usb_ehci, USB_HOST_EHCI_BASE) SAMSUNG_BASE(usb_otg, USBOTG_BASE) SAMSUNG_BASE(watchdog, WATCHDOG_BASE) SAMSUNG_BASE(power, POWER_BASE) +SAMSUNG_BASE(spi, SPI_BASE) +SAMSUNG_BASE(spi_isp, SPI_ISP_BASE) #endif #endif /* _EXYNOS4_CPU_H */ -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 5/8] SPI: Add SPI slave mode flag
This patch adds a new SPI mode flags for SPI slave mode. It enables slave mode in a SPI interface, and is set/clear in spi_setup_slave() from the mode parameter. Signed-off-by: Padmavathi Venna padm...@samsung.com Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com --- Changes in V2: - None. include/spi.h |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/include/spi.h b/include/spi.h index 60e85db..733c395 100644 --- a/include/spi.h +++ b/include/spi.h @@ -37,6 +37,7 @@ #defineSPI_LSB_FIRST 0x08/* per-word bits-on-wire */ #defineSPI_3WIRE 0x10/* SI/SO signals shared */ #defineSPI_LOOP0x20/* loopback mode */ +#defineSPI_SLAVE 0x40/* slave mode */ /* SPI transfer flags */ #define SPI_XFER_BEGIN 0x01/* Assert CS before transfer */ -- 1.7.4.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 6/8 V2] SPI: Add SPI Driver for EXYNOS.
This patch adds SPI driver for EXYNOS.
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Padmavathi Venna padm...@samsung.com
Signed-off-by: Gabe Black gabebl...@google.com
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- None.
arch/arm/include/asm/arch-exynos/spi.h | 78 ++
drivers/spi/Makefile |1 +
drivers/spi/exynos_spi.c | 400
3 files changed, 479 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/include/asm/arch-exynos/spi.h
create mode 100644 drivers/spi/exynos_spi.c
diff --git a/arch/arm/include/asm/arch-exynos/spi.h
b/arch/arm/include/asm/arch-exynos/spi.h
new file mode 100644
index 000..7cab1e9
--- /dev/null
+++ b/arch/arm/include/asm/arch-exynos/spi.h
@@ -0,0 +1,78 @@
+/*
+ * (C) Copyright 2012 SAMSUNG Electronics
+ * Padmavathi Venna padm...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef __ASM_ARCH_EXYNOS_COMMON_SPI_H_
+#define __ASM_ARCH_EXYNOS_COMMON_SPI_H_
+
+#ifndef __ASSEMBLY__
+
+/* SPI peripheral register map; padded to 64KB */
+struct exynos_spi {
+ unsigned intch_cfg; /* 0x00 */
+ unsigned char reserved0[4];
+ unsigned intmode_cfg; /* 0x08 */
+ unsigned intcs_reg; /* 0x0c */
+ unsigned char reserved1[4];
+ unsigned intspi_sts;/* 0x14 */
+ unsigned inttx_data;/* 0x18 */
+ unsigned intrx_data;/* 0x1c */
+ unsigned intpkt_cnt;/* 0x20 */
+ unsigned char reserved2[4];
+ unsigned char reserved3[4];
+ unsigned intfb_clk; /* 0x2c */
+ unsigned char padding[0xffd0];
+};
+
+#define EXYNOS_SPI_MAX_FREQ5000
+
+#define SPI_TIMEOUT_MS 10
+
+/* SPI_CHCFG */
+#define SPI_CH_HS_EN (1 6)
+#define SPI_CH_RST (1 5)
+#define SPI_SLAVE_MODE (1 4)
+#define SPI_CH_CPOL_L (1 3)
+#define SPI_CH_CPHA_B (1 2)
+#define SPI_RX_CH_ON (1 1)
+#define SPI_TX_CH_ON (1 0)
+
+/* SPI_MODECFG */
+#define SPI_MODE_CH_WIDTH_WORD (0x2 29)
+#define SPI_MODE_BUS_WIDTH_WORD(0x2 17)
+
+/* SPI_CSREG */
+#define SPI_SLAVE_SIG_INACT(1 0)
+
+/* SPI_STS */
+#define SPI_ST_TX_DONE (1 25)
+#define SPI_FIFO_LVL_MASK 0x1ff
+#define SPI_TX_LVL_OFFSET 6
+#define SPI_RX_LVL_OFFSET 15
+
+/* Feedback Delay */
+#define SPI_CLK_BYPASS (0 0)
+#define SPI_FB_DELAY_90(1 0)
+#define SPI_FB_DELAY_180 (2 0)
+#define SPI_FB_DELAY_270 (3 0)
+
+/* Packet Count */
+#define SPI_PACKET_CNT_EN (1 16)
+
+#endif /* __ASSEMBLY__ */
+#endif
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index c20f1f2..f15adf0 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -33,6 +33,7 @@ COBJS-$(CONFIG_ATMEL_SPI) += atmel_spi.o
COBJS-$(CONFIG_BFIN_SPI) += bfin_spi.o
COBJS-$(CONFIG_CF_SPI) += cf_spi.o
COBJS-$(CONFIG_DAVINCI_SPI) += davinci_spi.o
+COBJS-$(CONFIG_EXYNOS_SPI) += exynos_spi.o
COBJS-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o
COBJS-$(CONFIG_MPC52XX_SPI) += mpc52xx_spi.o
COBJS-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o
diff --git a/drivers/spi/exynos_spi.c b/drivers/spi/exynos_spi.c
new file mode 100644
index 000..73fb447
--- /dev/null
+++ b/drivers/spi/exynos_spi.c
@@ -0,0 +1,400 @@
+/*
+ * (C) Copyright 2012 SAMSUNG Electronics
+ * Padmavathi Venna padm...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place,
[U-Boot] [PATCH 8/8 V2] EXYNOS5: Enable SPI booting.
This patch enables SPI Booting for EXYNOS5
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- None.
board/samsung/smdk5250/Makefile |2 +-
board/samsung/smdk5250/{mmc_boot.c = spl_boot.c} | 31 +++-
include/configs/smdk5250.h|5 +++
3 files changed, 35 insertions(+), 3 deletions(-)
rename board/samsung/smdk5250/{mmc_boot.c = spl_boot.c} (66%)
diff --git a/board/samsung/smdk5250/Makefile b/board/samsung/smdk5250/Makefile
index 1474fa8..47c6a5a 100644
--- a/board/samsung/smdk5250/Makefile
+++ b/board/samsung/smdk5250/Makefile
@@ -36,7 +36,7 @@ COBJS += smdk5250.o
endif
ifdef CONFIG_SPL_BUILD
-COBJS += mmc_boot.o
+COBJS += spl_boot.o
endif
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/board/samsung/smdk5250/mmc_boot.c
b/board/samsung/smdk5250/spl_boot.c
similarity index 66%
rename from board/samsung/smdk5250/mmc_boot.c
rename to board/samsung/smdk5250/spl_boot.c
index 449a919..d8f3c1e 100644
--- a/board/samsung/smdk5250/mmc_boot.c
+++ b/board/samsung/smdk5250/spl_boot.c
@@ -23,6 +23,16 @@
#includecommon.h
#includeconfig.h
+enum boot_mode {
+ BOOT_MODE_MMC = 4,
+ BOOT_MODE_SERIAL = 20,
+ /* Boot based on Operating Mode pin settings */
+ BOOT_MODE_OM = 32,
+ BOOT_MODE_USB, /* Boot using USB download */
+};
+
+ typedef u32 (*spi_copy_func_t)(u32 offset, u32 nblock, u32 dst);
+
/*
* Copy U-boot from mmc to RAM:
* COPY_BL2_FNPTR_ADDR: Address in iRAM, which Contains
@@ -30,9 +40,26 @@
*/
void copy_uboot_to_ram(void)
{
- u32 (*copy_bl2)(u32, u32, u32) = (void *) *(u32 *)COPY_BL2_FNPTR_ADDR;
+ spi_copy_func_t spi_copy;
+ enum boot_mode bootmode;
+ u32 (*copy_bl2)(u32, u32, u32);
+
+ bootmode = readl(EXYNOS5_POWER_BASE) OM_STAT;
- copy_bl2(BL2_START_OFFSET, BL2_SIZE_BLOC_COUNT, CONFIG_SYS_TEXT_BASE);
+ switch (bootmode) {
+ case BOOT_MODE_SERIAL:
+ spi_copy = *(spi_copy_func_t *)EXYNOS_COPY_SPI_FNPTR_ADDR;
+ spi_copy(SPI_FLASH_UBOOT_POS, CONFIG_BL2_SIZE,
+ CONFIG_SYS_TEXT_BASE);
+ break;
+ case BOOT_MODE_MMC:
+ copy_bl2 = (void *) *(u32 *)COPY_BL2_FNPTR_ADDR;
+ copy_bl2(BL2_START_OFFSET, BL2_SIZE_BLOC_COUNT,
+ CONFIG_SYS_TEXT_BASE);
+ break;
+ default:
+ break;
+ }
}
void board_init_f(unsigned long bootflag)
diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h
index 29b7ac6..4b9093c 100644
--- a/include/configs/smdk5250.h
+++ b/include/configs/smdk5250.h
@@ -192,6 +192,11 @@
/* U-boot copy size from boot Media to DRAM.*/
#define BL2_START_OFFSET (CONFIG_BL2_OFFSET/512)
#define BL2_SIZE_BLOC_COUNT(CONFIG_BL2_SIZE/512)
+
+#define OM_STAT(0x1f 1)
+#define EXYNOS_COPY_SPI_FNPTR_ADDR 0x02020058
+#define SPI_FLASH_UBOOT_POS(CONFIG_SEC_FW_SIZE + CONFIG_BL1_SIZE)
+
#define CONFIG_DOS_PARTITION
#define CONFIG_IRAM_STACK 0x0205
--
1.7.4.4
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[U-Boot] [PATCH 7/8 V2] EXYNOS5: Enable SPI
This patch enables SPI driver for EXYNOS5.
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- None.
board/samsung/smdk5250/smdk5250.c |3 +++
include/configs/smdk5250.h| 23 ++-
2 files changed, 25 insertions(+), 1 deletions(-)
diff --git a/board/samsung/smdk5250/smdk5250.c
b/board/samsung/smdk5250/smdk5250.c
index a5816e4..2848c10 100644
--- a/board/samsung/smdk5250/smdk5250.c
+++ b/board/samsung/smdk5250/smdk5250.c
@@ -63,6 +63,9 @@ static int smc9115_pre_init(void)
int board_init(void)
{
gd-bd-bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
+#ifdef CONFIG_EXYNOS_SPI
+ spi_init();
+#endif
return 0;
}
diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h
index 27dab76..29b7ac6 100644
--- a/include/configs/smdk5250.h
+++ b/include/configs/smdk5250.h
@@ -167,7 +167,7 @@
#undef CONFIG_CMD_IMLS
#define CONFIG_IDENT_STRING for SMDK5250
-#define CONFIG_ENV_IS_IN_MMC
+/*#define CONFIG_ENV_IS_IN_MMC*/
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_SECURE_BL1_ONLY
@@ -216,6 +216,27 @@
#define CONFIG_ENV_SROM_BANK 1
#endif /*CONFIG_CMD_NET*/
+/* SPI */
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_SPI_FLASH
+
+#ifdef CONFIG_SPI_FLASH
+#define CONFIG_EXYNOS_SPI
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_SPI
+#define CONFIG_SPI_FLASH_WINBOND
+#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
+#define CONFIG_SF_DEFAULT_SPEED5000
+#define EXYNOS5_SPI_NUM_CONTROLLERS5
+#endif
+
+#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_SPI_MODESPI_MODE_0
+#define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
+#define CONFIG_ENV_SPI_BUS 1
+#define CONFIG_ENV_SPI_MAX_HZ 5000
+#endif
+
/* Enable devicetree support */
#define CONFIG_OF_LIBFDT
--
1.7.4.4
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Re: [U-Boot] [PATCH v2] Add support for Bluegiga APX4 Development Kit
On 07/31/2012 01:26 PM, Stefano Babic wrote: I see no problems in your patch - I will push it into the -next branch. Thanks, We'll continue developing. Lauri ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] lsxl: support power switch
-Original Message-
From: Michael Walle [mailto:mich...@walle.cc]
Sent: 31 July 2012 16:22
To: Prafulla Wadaskar
Cc: Michael Walle; u-boot@lists.denx.de
Subject: RE: [PATCH] lsxl: support power switch
On Tue, July 31, 2012 07:59, Prafulla Wadaskar wrote:
-Original Message-
From: Michael Walle [mailto:mich...@walle.cc]
Sent: 31 July 2012 02:17
To: u-boot@lists.denx.de
Cc: Michael Walle; Prafulla Wadaskar
Subject: [PATCH] lsxl: support power switch
This patch restores the Linkstation's original behaviour when
powering
off.
Once the (soft) power switch is turned off, linux will reboot and
the
bootloader turns off HDD and USB power. Then it loops as long as
the
switch
is in the off position, before continuing the boot process again.
Additionally, this patch fixes the board function set_led(LED_OFF).
Signed-off-by: Michael Walle mich...@walle.cc
Cc: Prafulla Wadaskar prafu...@marvell.com
---
board/buffalo/lsxl/lsxl.c | 22 +-
1 files changed, 21 insertions(+), 1 deletions(-)
diff --git a/board/buffalo/lsxl/lsxl.c b/board/buffalo/lsxl/lsxl.c
index fe15511..b3f31d6 100644
--- a/board/buffalo/lsxl/lsxl.c
+++ b/board/buffalo/lsxl/lsxl.c
@@ -158,7 +158,7 @@ static void set_led(int state)
{
switch (state) {
case LED_OFF:
- __set_led(0, 0, 0, 0, 0, 0);
+ __set_led(0, 0, 0, 1, 1, 1);
break;
case LED_ALARM_ON:
__set_led(0, 0, 0, 0, 1, 1);
@@ -192,6 +192,25 @@ int board_init(void)
}
#ifdef CONFIG_MISC_INIT_R
+static void check_power_switch(void)
+{
+ if (kw_gpio_get_value(GPIO_POWER_SWITCH)) {
+ /* turn off HDD and USB power */
+ kw_gpio_set_value(GPIO_HDD_POWER, 0);
+ kw_gpio_set_value(GPIO_USB_VBUS, 0);
+ set_led(LED_OFF);
+
+ /* loop until released */
+ while (kw_gpio_get_value(GPIO_POWER_SWITCH))
+ ;
Please avoid infinite loop, may you introduce timeout?
actually, thats the use case, to loop indefinitely ;) See the commit
message. The GPIO is a switch not a button. As long as it is switched
to
Power Off uboot should loop.
Okay got it.
Ack for this patch.
Regards...
Prafulla . . .
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Re: [U-Boot] [PATCH v2] Add support for Bluegiga APX4 Development Kit
On 09/07/2012 15:14, Veli-Pekka Peltola wrote: This adds support for Bluegiga APX4 Development Kit. It is built around Freescale i.MX28. Currently supported features are: ethernet, I2C, MMC, RTC and USB. APX4 has only one ethernet port. Signed-off-by: Veli-Pekka Peltola veli-pekka.pelt...@bluegiga.com Signed-off-by: Lauri Hintsala lauri.hints...@bluegiga.com Cc: Stefano Babic sba...@denx.de --- Applied to u-boot-imx, -next branch, thanks. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] i.MX(6) dcache status?
Dear Dirk Behme, On 31.07.2012 07:56, Dirk Behme wrote: Hi, now, after U-Boot v2012.07 is released, I'd like to ask what's the status the dcache support for i.MX(6)? Is it safe to enable CONFIG_SYS_DCACHE_OFF now? Arg, inverted logic ;) I meant 'disable/remove' CONFIG_SYS_DCACHE_OFF here. I.e. is it save to _enable_ the dcache now? Try it, it might work. Dirk E.g. for the SabreLite [1]? And if so, do we have to enable CONFIG_MMC_BOUNCE_BUFFER, too? You very likely do need it, yes. Opinions? Many thanks and best regards Dirk [1] http://git.denx.de/?p=u-boot.git;a=blob;f=include/configs/mx6qsabrelite.h ;h=e42fe6b00b445e2ea0623fb682cb758fdf09c586;hb=HEAD#l238 Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 5/8] SPI: Add SPI slave mode flag
On Tuesday 31 July 2012 06:42:37 Rajeshwari Shinde wrote: This patch adds a new SPI mode flags for SPI slave mode. It enables slave mode in a SPI interface, and is set/clear in spi_setup_slave() from the mode parameter. there is no such functionality in the current SPI API. if you want to propose that, you should start a dedicated patch series for it. so NAK this for now. -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] add ST PSD4256G6V to table of supported legacy flashs
On Tuesday 31 July 2012 04:50:17 Stefan Roese wrote: On Tuesday 31 July 2012 09:38:32 Mike Frysinger wrote: The BF533-EZKIT boards have this old ST flash. Signed-off-by: Mike Frysinger vap...@gentoo.org Acked-by: Stefan Roese s...@denx.de Mike, do you intend to push this via your blackfin repo? If yes, then please go ahead. Otherwise I'll queue it up for upstreaming. will do, thanks! -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] i.MX35PDK: Starting U-Boot from serial NOR-Flash
On Thu, Jul 26, 2012 at 10:32 PM, Fabio Estevam feste...@gmail.com wrote: Hi Michael, Hi Fabio, good to hear from you. On Tue, Jul 10, 2012 at 4:08 PM, Hornung, Michael mhorn...@init-ka.de wrote: gd-bd-bi_baudrate = gd-baudrate; /* Ram ist board specific, so move it to board code ... */ - dram_init_banksize(); - display_dram_config(); /* and display it */ + //dram_init_banksize(); + //display_dram_config();/* and display it */ Hmmm... it doesn't sound like a good idea to remove such lines. Have you had any progress on this? Unfortunately I had no time to look into the matter any further, but I'll try again this week. I am back to the office and can try to help you on this. Thank you so much, I'll be going on asking questions, soon. Regards, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot With best regards Michael Hornung ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] COMMON: Add __stringify() function
Dear Mike Frysinger, On Saturday 28 July 2012 15:57:33 Wolfgang Denk wrote: Marek Vasut wrote: include/common.h |7 +++ 1 file changed, 7 insertions(+) We have similar things already, and we don't add dead code - you add a macro without users here. It's used in 2/2 ... what macro do you have in mind ? Then add it with the patch that uses it. As for existing use, see for example there's also MK_STR() and XMK_STR(). Grunt ... how do you find those? Or is it that you just happened to run over them? would be good to import linux/stringify.h (rather than adding these macros to common.h) and converting all consumers over to that. I wonder, what's the gain? -mike Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] COMMON: Add __stringify() function
On Tuesday 31 July 2012 09:55:55 Marek Vasut wrote: Dear Mike Frysinger, On Saturday 28 July 2012 15:57:33 Wolfgang Denk wrote: Marek Vasut wrote: include/common.h |7 +++ 1 file changed, 7 insertions(+) We have similar things already, and we don't add dead code - you add a macro without users here. It's used in 2/2 ... what macro do you have in mind ? Then add it with the patch that uses it. As for existing use, see for example there's also MK_STR() and XMK_STR(). Grunt ... how do you find those? Or is it that you just happened to run over them? these are the ones we use in Blackfin boards that i happened to stumble across when reading some common code would be good to import linux/stringify.h (rather than adding these macros to common.h) and converting all consumers over to that. I wonder, what's the gain? one less way we're different from linux for importing code -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] COMMON: Add __stringify() function
Dear Mike Frysinger, On Tuesday 31 July 2012 09:55:55 Marek Vasut wrote: Dear Mike Frysinger, On Saturday 28 July 2012 15:57:33 Wolfgang Denk wrote: Marek Vasut wrote: include/common.h |7 +++ 1 file changed, 7 insertions(+) We have similar things already, and we don't add dead code - you add a macro without users here. It's used in 2/2 ... what macro do you have in mind ? Then add it with the patch that uses it. As for existing use, see for example there's also MK_STR() and XMK_STR(). Grunt ... how do you find those? Or is it that you just happened to run over them? these are the ones we use in Blackfin boards that i happened to stumble across when reading some common code Ugh ... makes you feel like Indy, discovering gems in crazy places and fighting hordes of evil code ... would be good to import linux/stringify.h (rather than adding these macros to common.h) and converting all consumers over to that. I wonder, what's the gain? one less way we're different from linux for importing code Not that that macro is ever gonna change, but so be it. -mike Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] COMMON: Add __stringify() function
On Tuesday 31 July 2012 10:08:51 Marek Vasut wrote: Dear Mike Frysinger, On Tuesday 31 July 2012 09:55:55 Marek Vasut wrote: Dear Mike Frysinger, would be good to import linux/stringify.h (rather than adding these macros to common.h) and converting all consumers over to that. I wonder, what's the gain? one less way we're different from linux for importing code Not that that macro is ever gonna change, but so be it. i meant #include's, not the API itself. you're right that likely this API will never change. -mike signature.asc Description: This is a digitally signed message part. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Building u-boot for iMX28 and getting error in mkimage of missing command line parameter CONFIG_IMX_CONFIG
That did it! Thanks. Bill On 7/30/2012 3:59 PM, Fabio Estevam wrote: On Mon, Jul 30, 2012 at 3:53 PM, Billbsou...@techsi.com wrote: Progress! I switched all the references from ttyAMA0... to ttyAM0. Also changed netargs too. Now it starts to boot linux but hangs right after the line of: mxs_cpu_init: cpufreq init finished. Please remove cpufreq from your kernel config. You can use this patch: https://github.com/Freescale/meta-fsl-arm/blob/denzil/recipes-kernel/linux/linux-imx-2.6.35.3/mx28-removecpufreq.patch Regards, Fabio Estevam -- William (Bill) L. Sousan, Ph.D. (w) 402.331.4977 ext. 4002 bsou...@techsi.com Technical Support Inc. 11253 John Galt Blvd Omaha, NE 68137 www.techsi.com 8(a) SDB Certified, ISO 9001:2008 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Pull request u-boot-blackfin.git (sf branch)
The following changes since commit b98b611502f5e0a85a1f8e15cf46c470cb105614: Merge branch 'next' of git://git.denx.de/u-boot (2012-07-30 20:39:52 +0200) are available in the git repository at: git://www.denx.de/git/u-boot-blackfin.git sf for you to fetch changes up to b54d1f26ff216ef08307b7652647cc92124c2be1: sf: stmicro: add geometrical info for N25Q256 from Micron (2012-04-08 10:55:55 +) Gerlando Falauto (1): cmd_sf: add size checking to spi flash commands Jérôme Carretero (1): sf: stmicro: add geometrical info for N25Q256 from Micron Mike Frysinger (5): sf: inline data constants sf: unify erase commands sf: eon: drop duplicate id sf: sst: inline duplicate write enable helper funcs sf: unify status register writing (and thus block unlocking) common/cmd_sf.c | 14 ++ drivers/mtd/spi/eon.c| 35 ++- drivers/mtd/spi/macronix.c | 82 ++ drivers/mtd/spi/spansion.c | 24 ++ drivers/mtd/spi/spi_flash.c | 35 +-- drivers/mtd/spi/spi_flash_internal.h | 10 - drivers/mtd/spi/sst.c| 66 +++ drivers/mtd/spi/stmicro.c| 28 drivers/mtd/spi/winbond.c| 55 ++- 9 files changed, 85 insertions(+), 264 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 01/17] omap3/omap4/omap5/am33xx: Use a common running_from_sdram function
On 07/31/2012 01:33 AM, R, Sricharan wrote: Hi Tom, [snip..] diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h index 7f05cb5..c697e0b 100644 --- a/arch/arm/include/asm/arch-omap5/omap.h +++ b/arch/arm/include/asm/arch-omap5/omap.h @@ -39,11 +39,6 @@ #define OMAP54XX_L4_WKUP_BASE 0x4Ae0 #define OMAP54XX_L4_PER_BASE 0x4800 -#define OMAP54XX_DRAM_ADDR_SPACE_START 0x8000 -#define OMAP54XX_DRAM_ADDR_SPACE_END 0x -#define DRAM_ADDR_SPACE_START OMAP54XX_DRAM_ADDR_SPACE_START -#define DRAM_ADDR_SPACE_ENDOMAP54XX_DRAM_ADDR_SPACE_END - This is a problem for OMAP5, which has a trap section at 0xFF00 with in the sdram boundary. OMAP5 evm board has 2GB of memory from 0x8000 - 0x. Size of the trap section should not be included in the total sdram size. But it's not sdram size. What happens when you're executing at the trap section, or rather, where are you executing code from? -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 01/17] omap3/omap4/omap5/am33xx: Use a common running_from_sdram function
Hi Tom, On Tue, Jul 31, 2012 at 8:43 PM, Tom Rini tr...@ti.com wrote: On 07/31/2012 01:33 AM, R, Sricharan wrote: Hi Tom, [snip..] diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h index 7f05cb5..c697e0b 100644 --- a/arch/arm/include/asm/arch-omap5/omap.h +++ b/arch/arm/include/asm/arch-omap5/omap.h @@ -39,11 +39,6 @@ #define OMAP54XX_L4_WKUP_BASE 0x4Ae0 #define OMAP54XX_L4_PER_BASE 0x4800 -#define OMAP54XX_DRAM_ADDR_SPACE_START 0x8000 -#define OMAP54XX_DRAM_ADDR_SPACE_END 0x -#define DRAM_ADDR_SPACE_START OMAP54XX_DRAM_ADDR_SPACE_START -#define DRAM_ADDR_SPACE_ENDOMAP54XX_DRAM_ADDR_SPACE_END - This is a problem for OMAP5, which has a trap section at 0xFF00 with in the sdram boundary. OMAP5 evm board has 2GB of memory from 0x8000 - 0x. Size of the trap section should not be included in the total sdram size. But it's not sdram size. What happens when you're executing at the trap section, or rather, where are you executing code from? When we execute at trap section address, the system aborts. EMIF returns a exception. This is to catch the unmapped tiler entries. So total size of sdram size calculated should subtract the size of trap section if that falls with in the sdram boundary, as in case of omap5. This is taken care in omap_sdram_size function. But with this change the trap section will go un-noticed. Thanks, Sricharan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] early_malloc outline
Hello all! In u-boot-dm mailinglist we had a discussion about implementation of early_malloc (not only) for U-Boot Driver Model. The intention is to have a simple malloc() function in the early stage of init before relocation and before RAM is up and running. There was an experimental patch that added the early heap to GD structure. In the following discussion Graeme Russ pointed out that there is a pre-console buffer which does the similar thing. And we should not explode GD by adding the early heap (which is going to be few hundreds of bytes long) into it. He suggested to create an independent area locked in cache lines for early heap in order to allow split GD and early heap into more non-contiguous blocks. Pavel Hermann said that we would have to copy data twice (first before the RAM is up and running and caches are still off and second after RAM and dlmalloc is initialized). Marek Vasut said (earlier in the discussion) that we do not need to care about few hundred of bytes, especially after copying them into RAM. And Wolfgang Denk resisted. He also pointed out that there are other possibilities where early memory may be allocated - on-chip-memory, external SRAM and others and these should be kept in mind including existing size restrictions. (I apologize for eventual misinterpretation and I am sorry that we do not have a link to the u-boot-dm mailinglist archive nor GMANE. But I can eventually Fwd. needed pieces of the discussion.) We would like to hear opinions on the early_malloc idea to find a broadly acceptable solution. Can/should we use some existing mechanism? Or would it be considered a viable option to choose different beginning address for early heap, use it (in architecture-specific way) and keep the pointer to the beginning in GD. Then copy the early heap to memory before caches are flushed and in case of DM copy again data from early heap to new destinations that has been obtained through malloc() when it is initialized? Tomas -- Tomáš Hlaváček tmshl...@gmail.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] cmd_nand: dump: Align data and OOB buffers
On 07/31/2012 12:21 AM, Thierry Reding wrote:
In order for cache invalidation and flushing to work properly, the data
and OOB buffers must be aligned to full cache lines.
Signed-off-by: Thierry Reding thierry.red...@avionic-design.de
You probably want to CC the NAND maintainer, Scott Wood (I have here) so
he can ack this or apply it.
---
common/cmd_nand.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/common/cmd_nand.c b/common/cmd_nand.c
index a91ccf4..4367f5a 100644
--- a/common/cmd_nand.c
+++ b/common/cmd_nand.c
@@ -48,8 +48,8 @@ static int nand_dump(nand_info_t *nand, ulong off, int
only_oob, int repeat)
last = off;
- datbuf = malloc(nand-writesize);
- oobbuf = malloc(nand-oobsize);
+ datbuf = memalign(ARCH_DMA_MINALIGN, nand-writesize);
+ oobbuf = memalign(ARCH_DMA_MINALIGN, nand-oobsize);
if (!datbuf || !oobbuf) {
puts(No memory for page buffer\n);
return 1;
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Re: [U-Boot] [PATCH 2/2] tegra: Enable NAND on TEC
On 07/31/2012 12:21 AM, Thierry Reding wrote: This commit enables NAND support on the Tamonten Evaluation Carrier and adds the corresponding device tree nodes. Furthermore, the U-Boot environment can now be stored in NAND. diff --git a/include/configs/tec.h b/include/configs/tec.h +/* Environment not stored */ +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_OFFSET(SZ_512M - SZ_128K) /* 128K sector size */ I guess you also need to update the comment;-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 01/17] omap3/omap4/omap5/am33xx: Use a common running_from_sdram function
On 07/31/2012 08:27 AM, R, Sricharan wrote: Hi Tom, On Tue, Jul 31, 2012 at 8:43 PM, Tom Rini tr...@ti.com wrote: On 07/31/2012 01:33 AM, R, Sricharan wrote: Hi Tom, [snip..] diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h index 7f05cb5..c697e0b 100644 --- a/arch/arm/include/asm/arch-omap5/omap.h +++ b/arch/arm/include/asm/arch-omap5/omap.h @@ -39,11 +39,6 @@ #define OMAP54XX_L4_WKUP_BASE 0x4Ae0 #define OMAP54XX_L4_PER_BASE 0x4800 -#define OMAP54XX_DRAM_ADDR_SPACE_START 0x8000 -#define OMAP54XX_DRAM_ADDR_SPACE_END 0x -#define DRAM_ADDR_SPACE_START OMAP54XX_DRAM_ADDR_SPACE_START -#define DRAM_ADDR_SPACE_ENDOMAP54XX_DRAM_ADDR_SPACE_END - This is a problem for OMAP5, which has a trap section at 0xFF00 with in the sdram boundary. OMAP5 evm board has 2GB of memory from 0x8000 - 0x. Size of the trap section should not be included in the total sdram size. But it's not sdram size. What happens when you're executing at the trap section, or rather, where are you executing code from? When we execute at trap section address, the system aborts. EMIF returns a exception. This is to catch the unmapped tiler entries. So total size of sdram size calculated should subtract the size of trap section if that falls with in the sdram boundary, as in case of omap5. This is taken care in omap_sdram_size function. But with this change the trap section will go un-noticed. So you're saying the problem is that 0xFF... needs to be included in DRAM_ADDR_SPACE on omap5? -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 01/17] omap3/omap4/omap5/am33xx: Use a common running_from_sdram function
Correct. DRAM_ADDR_SPACE_END should be 0x for OMAP5. Thanks, Sricharan On Tue, Jul 31, 2012 at 9:12 PM, Tom Rini tr...@ti.com wrote: On 07/31/2012 08:27 AM, R, Sricharan wrote: Hi Tom, On Tue, Jul 31, 2012 at 8:43 PM, Tom Rini tr...@ti.com wrote: On 07/31/2012 01:33 AM, R, Sricharan wrote: Hi Tom, [snip..] diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h index 7f05cb5..c697e0b 100644 --- a/arch/arm/include/asm/arch-omap5/omap.h +++ b/arch/arm/include/asm/arch-omap5/omap.h @@ -39,11 +39,6 @@ #define OMAP54XX_L4_WKUP_BASE 0x4Ae0 #define OMAP54XX_L4_PER_BASE 0x4800 -#define OMAP54XX_DRAM_ADDR_SPACE_START 0x8000 -#define OMAP54XX_DRAM_ADDR_SPACE_END 0x -#define DRAM_ADDR_SPACE_START OMAP54XX_DRAM_ADDR_SPACE_START -#define DRAM_ADDR_SPACE_ENDOMAP54XX_DRAM_ADDR_SPACE_END - This is a problem for OMAP5, which has a trap section at 0xFF00 with in the sdram boundary. OMAP5 evm board has 2GB of memory from 0x8000 - 0x. Size of the trap section should not be included in the total sdram size. But it's not sdram size. What happens when you're executing at the trap section, or rather, where are you executing code from? When we execute at trap section address, the system aborts. EMIF returns a exception. This is to catch the unmapped tiler entries. So total size of sdram size calculated should subtract the size of trap section if that falls with in the sdram boundary, as in case of omap5. This is taken care in omap_sdram_size function. But with this change the trap section will go un-noticed. So you're saying the problem is that 0xFF... needs to be included in DRAM_ADDR_SPACE on omap5? -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/2] bcm: Add GPIO driver
Hello Stephen,
On 7/15/2012 10:53 PM, Stephen Warren wrote:
On 07/11/2012 02:37 PM, Vikram Narayanan wrote:
Driver for BCM2835 SoC. This gives the basic functionality of
setting/clearing the output.
diff --git a/arch/arm/include/asm/arch-bcm2835/gpio.h
b/arch/arm/include/asm/arch-bcm2835/gpio.h
+#define BCM2835_GPIO_BASE 0x7E20
+#define BCM2835_NUM_GPIOS 53
For consistency, that might be better as BCM2835_GPIO_COUNT, but not a
big deal.
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
COBJS-$(CONFIG_DA8XX_GPIO)+= da8xx_gpio.o
COBJS-$(CONFIG_ALTERA_PIO)+= altera_pio.o
COBJS-$(CONFIG_MPC83XX_GPIO) += mpc83xx_gpio.o
+COBJS-$(CONFIG_BCM2835_GPIO) += gpio_bcm2835.o
It looks like the name bcm2835_gpio.c would be more consistent with
existing drivers, but not a big deal.
diff --git a/drivers/gpio/gpio_bcm2835.c b/drivers/gpio/gpio_bcm2835.c
Linux kernel follows this naming, to be exact, it should've been
gpio-bcm2835.c. Having a thought in mind that one day the namings would
be made consistent with the kernel. That is the reason for this naming,
but isn't a big deal to change it.
+inline int gpio_is_valid(unsigned gpio)
+{
+ return (gpio BCM2835_NUM_GPIOS) ? 0 : 1;
Presumably gpio==0 is a valid GPIO, so that should be= not. It'd be
simpler to write it as:
return gpio BCM2835_NUM_GPIOS;
+int gpio_request(unsigned gpio, const char *label)
+{
+ return (gpio_is_valid(gpio)) ? 1 : 0;
Why not just return gpio_is_valid_(gpio) directly?
+int gpio_direction_input(unsigned gpio)
+ val = readl(reg-gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
+ val= ~(BCM2835_GPIO_FSEL_MASK BCM2835_GPIO_FSEL_SHIFT(gpio));
Even if BCM2835_GPIO_OUTPUT==0, it seems better to | it in here for
documentation purposes, so add:
val |= (BCM2835_GPIO_INPUT BCM2835_GPIO_FSEL_SHIFT(gpio));
Otherwise, there's not much point creating the #define BCM2835_GPIO_INPUT.
+int gpio_direction_output(unsigned gpio, int value)
+{
+ struct bcm_gpio_regs *reg = (struct bcm_gpio_regs *)BCM2835_GPIO_BASE;
+ unsigned val;
+
+ val = readl(reg-gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
+ val= ~(BCM2835_GPIO_FSEL_MASK BCM2835_GPIO_FSEL_SHIFT(gpio));
+ val |= (BCM2835_GPIO_OUTPUT BCM2835_GPIO_FSEL_SHIFT(gpio));
+ writel(val, reg-gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
This (setting the direction) should happen after the following to set
the value:
+ if (value)
+ gpio_set_value(gpio, value);
That way, when the GPIO is set to output, the correct value will
immediately be driven onto the GPIO, so a glitch may be avoided.
+int gpio_get_value(unsigned gpio)
+ return (val BCM2835_GPIO_COMMON_MASK(gpio)) 0x1;
Agree for all the above. Will get reflected in the v3.
Shouldn't that be BCM2835_GPIO_COMMON_SHIFT not BCM2835_GPIO_COMMON_MASK?
If you'd like to have naming consistency FSEL_SHIFT/COMMON_SHIFT, then
it shall be COMMON_SHIFT.
But it doesn't do any shifting like the FSEL_SHIFT, rather it does only
masking of bits. So, it makes more sense for me to name it as MASK and
not SHIFT.
~Vikram
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[U-Boot] [PATCH] tegra: harmony: fix comments for environment config options
From: Stephen Warren swar...@nvidia.com The environment is now stored in NAND, so update the comment to say so, rather than saying it's not stored. Signed-off-by: Stephen Warren swar...@nvidia.com --- Tom, feel free to just squash this into my patch that added environment support to Harmony if you want. include/configs/harmony.h |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/include/configs/harmony.h b/include/configs/harmony.h index 85059b9..69857dd 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -68,7 +68,7 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE TEGRA20_NAND_BASE -/* Environment not stored */ +/* Environment in NAND (which is 512M), aligned to start of last sector */ #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_OFFSET (SZ_512M - SZ_128K) /* 128K sector size */ -- 1.7.0.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/2] bcm: Add GPIO driver
On 07/31/2012 09:46 AM, Vikram Narayanan wrote: On 7/15/2012 10:53 PM, Stephen Warren wrote: On 07/11/2012 02:37 PM, Vikram Narayanan wrote: Driver for BCM2835 SoC. This gives the basic functionality of setting/clearing the output. diff --git a/arch/arm/include/asm/arch-bcm2835/gpio.h b/arch/arm/include/asm/arch-bcm2835/gpio.h One more comment on the patch subject; it probably should be gpio: bcm2835: not bcm: since (a) it's in the GPIO directory and (b) the GPIO module is specifically for a BCM2835, and probably doesn't apply to any/all Broadcom devices. diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile COBJS-$(CONFIG_DA8XX_GPIO)+= da8xx_gpio.o COBJS-$(CONFIG_ALTERA_PIO)+= altera_pio.o COBJS-$(CONFIG_MPC83XX_GPIO)+= mpc83xx_gpio.o +COBJS-$(CONFIG_BCM2835_GPIO)+= gpio_bcm2835.o It looks like the name bcm2835_gpio.c would be more consistent with existing drivers, but not a big deal. diff --git a/drivers/gpio/gpio_bcm2835.c b/drivers/gpio/gpio_bcm2835.c Linux kernel follows this naming, to be exact, it should've been gpio-bcm2835.c. Having a thought in mind that one day the namings would be made consistent with the kernel. That is the reason for this naming, but isn't a big deal to change it. Hmmm. It seems better to be internally consistent with U-Boot rather than keeping (onyl part of) U-Boot consistent with the kernel... Shouldn't that be BCM2835_GPIO_COMMON_SHIFT not BCM2835_GPIO_COMMON_MASK? If you'd like to have naming consistency FSEL_SHIFT/COMMON_SHIFT, then it shall be COMMON_SHIFT. But it doesn't do any shifting like the FSEL_SHIFT, rather it does only masking of bits. So, it makes more sense for me to name it as MASK and not SHIFT. The full quote you're replying to was: +int gpio_get_value(unsigned gpio) +return (val BCM2835_GPIO_COMMON_MASK(gpio)) 0x1; Shouldn't that be BCM2835_GPIO_COMMON_SHIFT not BCM2835_GPIO_COMMON_MASK? ... so that macro is being used as a shift not as a mask. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] tegra: harmony: fix comments for environment config options
Stephen/Thierry, -Original Message- From: Stephen Warren [mailto:swar...@wwwdotorg.org] Sent: Tuesday, July 31, 2012 8:47 AM To: Tom Warren Cc: Thierry Reding; U-Boot Mailing List; Stephen Warren Subject: [PATCH] tegra: harmony: fix comments for environment config options From: Stephen Warren swar...@nvidia.com The environment is now stored in NAND, so update the comment to say so, rather than saying it's not stored. Signed-off-by: Stephen Warren swar...@nvidia.com --- Tom, feel free to just squash this into my patch that added environment support to Harmony if you want. I'll just fix the 'not stored' comment in both harmony and tec when I apply those patches to /next, if that's OK with you two. Tom -- nvpublic include/configs/harmony.h |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/include/configs/harmony.h b/include/configs/harmony.h index 85059b9..69857dd 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -68,7 +68,7 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE TEGRA20_NAND_BASE -/* Environment not stored */ +/* Environment in NAND (which is 512M), aligned to start of last sector +*/ #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_OFFSET(SZ_512M - SZ_128K) /* 128K sector size */ -- 1.7.0.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] net: Make netconsole src and dest ports configurable
It is desirable to use different port numbers for sending and receiving
packets with netconsole in the case where you have more than one device
on the local subnet with netconsole enabled for broadcast. When they
use the same port for both, any output from one will look like input to
the other. This is typlically not desirable.
This patch allows the input and output ports to be specified separately
in the environment.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
Cc: Mike Frysinger vap...@gentoo.org
---
doc/README.NetConsole|3 +++
drivers/net/netconsole.c | 29 -
tools/netconsole | 18 +++---
3 files changed, 34 insertions(+), 16 deletions(-)
diff --git a/doc/README.NetConsole b/doc/README.NetConsole
index c8bcb90..070e86a 100644
--- a/doc/README.NetConsole
+++ b/doc/README.NetConsole
@@ -11,6 +11,9 @@ port of the destination. The format is ip_addr:port. If
port is
omitted, the value of is used. If the env var doesn't exist, the
broadcast address and port are used. If it is set to an IP
address of 0 (or 0.0.0.0) then no messages are sent to the network.
+The source / listening port can be configured separately by setting
+the 'ncinport' environment variable and the destination port can be
+configured by setting the 'ncoutport' environment variable.
For example, if your server IP is 192.168.1.1, you could use:
diff --git a/drivers/net/netconsole.c b/drivers/net/netconsole.c
index 14243b8..86f5301 100644
--- a/drivers/net/netconsole.c
+++ b/drivers/net/netconsole.c
@@ -36,7 +36,8 @@ static int output_recursion;
static int net_timeout;
static uchar nc_ether[6]; /* server enet address */
static IPaddr_t nc_ip; /* server ip */
-static short nc_port; /* source/target port */
+static short nc_out_port; /* target output port */
+static short nc_in_port; /* source input port */
static const char *output_packet; /* used by first send udp */
static int output_packet_len;
@@ -71,7 +72,7 @@ void NcStart(void)
net_set_arp_handler(nc_wait_arp_handler);
pkt = (uchar *)NetTxPacket + NetEthHdrSize() + IP_UDP_HDR_SIZE;
memcpy(pkt, output_packet, output_packet_len);
- NetSendUDPPacket(nc_ether, nc_ip, nc_port, nc_port,
+ NetSendUDPPacket(nc_ether, nc_ip, nc_out_port, nc_in_port,
output_packet_len);
}
}
@@ -80,7 +81,7 @@ int nc_input_packet(uchar *pkt, unsigned dest, unsigned src,
unsigned len)
{
int end, chunk;
- if (dest != nc_port || !len)
+ if (dest != nc_in_port || !len)
return 0; /* not for us */
debug_cond(DEBUG_DEV_PKT, input: \%*.*s\\n, len, len, pkt);
@@ -139,7 +140,7 @@ static void nc_send_packet(const char *buf, int len)
memcpy(pkt, buf, len);
ether = nc_ether;
ip = nc_ip;
- NetSendUDPPacket(ether, ip, nc_port, nc_port, len);
+ NetSendUDPPacket(ether, ip, nc_out_port, nc_in_port, len);
if (inited)
eth_halt();
@@ -148,20 +149,30 @@ static void nc_send_packet(const char *buf, int len)
static int nc_start(void)
{
int netmask, our_ip;
+ char *p;
- nc_port = ; /* default port */
+ nc_out_port = ; /* default port */
+ nc_in_port = nc_out_port;
if (getenv(ncip)) {
- char *p;
nc_ip = getenv_IPaddr(ncip);
if (!nc_ip)
return -1; /* ncip is 0.0.0.0 */
p = strchr(getenv(ncip), ':');
- if (p != NULL)
- nc_port = simple_strtoul(p + 1, NULL, 10);
+ if (p != NULL) {
+ nc_out_port = simple_strtoul(p + 1, NULL, 10);
+ nc_in_port = nc_out_port;
+ }
} else
- nc_ip = ~0; /* ncip is not set */
+ nc_ip = ~0; /* ncip is not set, so broadcast */
+
+ p = getenv(ncoutport);
+ if (p != NULL)
+ nc_out_port = simple_strtoul(p, NULL, 10);
+ p = getenv(ncinport);
+ if (p != NULL)
+ nc_in_port = simple_strtoul(p, NULL, 10);
our_ip = getenv_IPaddr(ipaddr);
netmask = getenv_IPaddr(netmask);
diff --git a/tools/netconsole b/tools/netconsole
index c8109bb..1a0ef22 100755
--- a/tools/netconsole
+++ b/tools/netconsole
@@ -2,7 +2,7 @@
usage() {
(
- echo Usage: $0 board IP [board port]
+ echo Usage: $0 board-IP [board-port [board-in-port]]
echo
echo If port is not specified, '' will be used
[ -z $* ] exit 0
@@ -24,9 +24,13 @@ while [ -n $1 ] ; do
done
ip=$1
-port=${2:-}
+board_out_port=${2:-}
+board_in_port=${3:-${board_out_port}}
-if [ -z ${ip} ] || [ -n $3 ] ; then
+echo Board out port: ${board_out_port}
+echo Board in port: ${board_in_port}
+
+if [ -z ${ip} ] || [ -n $4 ] ; then
usage
[U-Boot] [PATCH v2] net: Make the netconsole buffer size configurable
Allow a board to configure a larger buffer for netconsole, but leave
the default.
Signed-off-by: Joe Hershberger joe.hershber...@ni.com
Cc: Mike Frysinger vap...@gentoo.org
---
doc/README.NetConsole|2 ++
drivers/net/netconsole.c |8 ++--
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/doc/README.NetConsole b/doc/README.NetConsole
index c8bcb90..73543e5 100644
--- a/doc/README.NetConsole
+++ b/doc/README.NetConsole
@@ -6,6 +6,8 @@ serial and network input/output devices by adjusting the
'stdin' and
set either of these variables to nc. Input and output can be
switched independently.
+CONFIG_NETCONSOLE_BUFFER_SIZE - Override the default buffer size
+
We use an environment variable 'ncip' to set the IP address and the
port of the destination. The format is ip_addr:port. If port is
omitted, the value of is used. If the env var doesn't exist, the
diff --git a/drivers/net/netconsole.c b/drivers/net/netconsole.c
index 14243b8..c68ca4f 100644
--- a/drivers/net/netconsole.c
+++ b/drivers/net/netconsole.c
@@ -28,7 +28,11 @@
DECLARE_GLOBAL_DATA_PTR;
-static char input_buffer[512];
+#ifndef CONFIG_NETCONSOLE_BUFFER_SIZE
+#define CONFIG_NETCONSOLE_BUFFER_SIZE 512
+#endif
+
+static char input_buffer[CONFIG_NETCONSOLE_BUFFER_SIZE];
static int input_size; /* char count in input buffer */
static int input_offset; /* offset to valid chars in input buffer */
static int input_recursion;
@@ -203,7 +207,7 @@ static void nc_puts(const char *s)
len = strlen(s);
while (len) {
- int send_len = min(len, 512);
+ int send_len = min(len, sizeof(input_buffer));
nc_send_packet(s, send_len);
len -= send_len;
s += send_len;
--
1.6.0.2
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Re: [U-Boot] [PATCH v2 1/2] bcm: Add GPIO driver
On 7/31/2012 9:22 PM, Stephen Warren wrote: On 07/31/2012 09:46 AM, Vikram Narayanan wrote: On 7/15/2012 10:53 PM, Stephen Warren wrote: On 07/11/2012 02:37 PM, Vikram Narayanan wrote: Driver for BCM2835 SoC. This gives the basic functionality of setting/clearing the output. diff --git a/arch/arm/include/asm/arch-bcm2835/gpio.h b/arch/arm/include/asm/arch-bcm2835/gpio.h One more comment on the patch subject; it probably should be gpio: bcm2835: not bcm: since (a) it's in the GPIO directory and (b) the GPIO module is specifically for a BCM2835, and probably doesn't apply to any/all Broadcom devices. Linux kernel follows this naming, to be exact, it should've been gpio-bcm2835.c. Having a thought in mind that one day the namings would be made consistent with the kernel. That is the reason for this naming, but isn't a big deal to change it. Hmmm. It seems better to be internally consistent with U-Boot rather than keeping (onyl part of) U-Boot consistent with the kernel... Yes. Shouldn't that be BCM2835_GPIO_COMMON_SHIFT not BCM2835_GPIO_COMMON_MASK? If you'd like to have naming consistency FSEL_SHIFT/COMMON_SHIFT, then it shall be COMMON_SHIFT. But it doesn't do any shifting like the FSEL_SHIFT, rather it does only masking of bits. So, it makes more sense for me to name it as MASK and not SHIFT. The full quote you're replying to was: +int gpio_get_value(unsigned gpio) + return (val BCM2835_GPIO_COMMON_MASK(gpio)) 0x1; Shouldn't that be BCM2835_GPIO_COMMON_SHIFT not BCM2835_GPIO_COMMON_MASK? ... so that macro is being used as a shift not as a mask. Naming isn't really a problem for me. If you want it to be SHIFT, I'd go with it. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [u-boot-arm/next RESEND PATCH 0/3] OMAP3: igep00x0: add nand flash and SPL support
On Mon, Jul 30, 2012 at 7:06 PM, Tom Rini tr...@ti.com wrote: On Sat, Jul 28, 2012 at 01:19:31PM +0200, Javier Martinez Canillas wrote: IGEP-based boards can have two different flash memories, a OneNAND or a NAND device. Since u-boot still lacks of a device model to be the able to look at run-time which memory type is available on a the board, a built time config option is needed to choose which memory to use. This is a resend of a patch-set that adds both a config option for the nand memory type and SPL support to IGEP-based boards. The patch-set is composed of the following patches: [u-boot-arm/next RESEND PATCH 1/3] OMAP3: igep00x0: Add config [u-boot-arm/next RESEND PATCH 2/3] OMAP3: mem: Add Numonyx OneNAND [u-boot-arm/next RESEND PATCH 3/3] OMAP3: igep00x0: add SPL support This all looks good, barring comments from someone else, I'll pick this up Friday or so. -- Tom Perfect, thanks a lot Tom! Best regards, Javier ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 06/18] tegra: fdt: Add LCD definitions for Tegra
On 07/31/2012 03:27 AM, Simon Glass wrote: On Thu, Jul 12, 2012 at 4:25 PM, Simon Glass s...@chromium.org wrote: Add LCD definitions and also a proposed binding for LCD displays. The PWM is as per what will likely be committed to linux-next soon. The displaymode binding comes from a proposal here: http://lists.freedesktop.org/archives/dri-devel/2012-July/024875.html The panel binding is new, and fills a need to specify the panel timings and other tegra-specific information. Should a binding appear that allows the pwm to handle this automatically, we can revisit this. Any comments on this binding please? The main addition from Thierry's one posted on LMKL is the LCD resolution selection. I have some concerns about the way the mode is represented in the binding; the timing parameters are quite different to how e.g. an EDID DTD would represent them, which I think will lead to conversion mistakes when writing the DT. I'm trying to get along of Sascha's original email so I can join in on that discussion. diff --git a/doc/device-tree-bindings/video/tegra20-dc.txt b/doc/device-tree-bindings/video/tegra20-dc.txt +Optional properties (rgb): + - nvidia,frame-buffer: address of frame buffer (if omitted it will be + calculated) + - This may be useful to share an address between U-Boot and Linux and + avoid boot-time corruption / flicker Why can't the display driver read this out of the display registers, instead of requiring the same information to be passed using DT too? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] cmd_nand: dump: Align data and OOB buffers
On 07/31/2012 10:40 AM, Stephen Warren wrote:
On 07/31/2012 12:21 AM, Thierry Reding wrote:
In order for cache invalidation and flushing to work properly, the data
and OOB buffers must be aligned to full cache lines.
Signed-off-by: Thierry Reding thierry.red...@avionic-design.de
You probably want to CC the NAND maintainer, Scott Wood (I have here) so
he can ack this or apply it.
---
common/cmd_nand.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/common/cmd_nand.c b/common/cmd_nand.c
index a91ccf4..4367f5a 100644
--- a/common/cmd_nand.c
+++ b/common/cmd_nand.c
@@ -48,8 +48,8 @@ static int nand_dump(nand_info_t *nand, ulong off, int
only_oob, int repeat)
last = off;
-datbuf = malloc(nand-writesize);
-oobbuf = malloc(nand-oobsize);
+datbuf = memalign(ARCH_DMA_MINALIGN, nand-writesize);
+oobbuf = memalign(ARCH_DMA_MINALIGN, nand-oobsize);
if (!datbuf || !oobbuf) {
puts(No memory for page buffer\n);
return 1;
Acked-by: Scott Wood scottw...@freescale.com
...though I'm still not fond of the idea that every user of an API has
to know whether DMA might be used on the buffer.
-Scott
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Re: [U-Boot] [PATCH] env_nand: align NAND buffers
On 07/31/2012 10:59 AM, Tom Warren wrote: Scott, -Original Message- From: Scott Wood [mailto:scottw...@freescale.com] Sent: Monday, July 30, 2012 4:01 PM To: Stephen Warren Cc: Tom Warren; Simon Glass; U-Boot Mailing List; Stephen Warren Subject: Re: [PATCH] env_nand: align NAND buffers On 07/30/2012 12:38 PM, Stephen Warren wrote: From: Stephen Warren swar...@nvidia.com This allows cache flush/invalidate operations to succeed on the buffers. Signed-off-by: Stephen Warren swar...@nvidia.com --- common/env_nand.c | 10 +- 1 files changed, 5 insertions(+), 5 deletions(-) Acked-by: Scott Wood scottw...@freescale.com I'm assuming you want it to go with the Tegra patches and not via my tree. I'm fine with taking the env_nand and cmd_nand changes thru the Tegra tree. Let me know if that's OK with you. It's OK with me. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 5/7] dfu:cmd: Support for DFU u-boot command
On 07/31/2012 12:37 AM, Lukasz Majewski wrote: Support for u-boot's dfu interface dev [list] command. +U_BOOT_CMD(dfu, CONFIG_SYS_MAXARGS, 1, do_dfu, + Device Firmware Upgrade, + interface dev [list]\n + - device firmware upgrade on a device dev\n + attached to interface interface\n + [list] - list available alt settings +); Hmm. Is there any way to make this work without specifying interface dev, or to allow specifying multiple interface dev entries? On a system with all of eMMC, NAND, and SPI, I'd like to just run dfu as the U-Boot command, and have the host specify which of those devices it wants to download to using the DFU protocol. So, if flashing a bunch of devices, there is no need to interact with U-Boot over both serial and USB in order to invoke the dfu command multiple times. Somewhat related to this, it looks like the eMMC support doesn't allow the HW partition to be specified; it would be nice to expose alt settings for all of: a) Each individual HW partition (boot0/1 if present, general0/1/2/3 if present, the user area, maybe the replay block) b) Perhaps also a linearized view of the raw eMMC (LBAs 0..boot_size-1 write to boot 0, LBAs boot_size..(2*boot_size)-1 write to boot1, LBAs 2*boot_size..end_of_device write to user area for example). ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] kirkwood: Add support for the D-Link DNS-320
Am 31.07.2012 11:01, schrieb Jamie Lentin: On Mon, 30 Jul 2012, Prafulla Wadaskar wrote: -Original Message- From: Jamie Lentin [mailto:j...@lentin.co.uk] Sent: 31 July 2012 03:26 To: u-boot@lists.denx.de Cc: Prafulla Wadaskar; albert.u.b...@aribaud.net; ub...@lukaperkov.net; Jamie Lentin Subject: [PATCH 2/2] kirkwood: Add support for the D-Link DNS-320 Extend dnskw to support the D-Link DNS-320 ShareCenter NAS also. For more information on this NAS, see:- http://jamie.lentin.co.uk/devices/dlink-dns320 http://dns323.kood.org/dns-320 http://sharecenter.dlink.com/products/DNS-320 Signed-off-by: Jamie Lentin j...@lentin.co.uk Cc: prafu...@marvell.com Cc: albert.u.b...@aribaud.net --- MAINTAINERS|4 + board/d-link/dnskw/dnskw.c |8 +- board/d-link/dnskw/dnskw.h |6 + board/d-link/dnskw/kwbimage.dns320.cfg | 207 boards.cfg |1 + include/configs/dnskw.h| 10 ++ 6 files changed, 232 insertions(+), 4 deletions(-) create mode 100644 board/d-link/dnskw/kwbimage.dns320.cfg diff --git a/MAINTAINERS b/MAINTAINERS index fd0c65c..92ede1f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -673,6 +673,10 @@ Igor Grinberg grinb...@compulab.co.il cm-t35ARM ARMV7 (OMAP3xx Soc) +Jamie Lentin j...@lentin.co.uk + +dns320ARM926EJS (Kirkwood SoC) + Stefan Herbrechtsmeier ste...@code.herbrechtsmeier.net dns325ARM926EJS (Kirkwood SoC) diff --git a/board/d-link/dnskw/dnskw.c b/board/d-link/dnskw/dnskw.c index d29735c..cd6bfe9 100644 --- a/board/d-link/dnskw/dnskw.c +++ b/board/d-link/dnskw/dnskw.c @@ -58,8 +58,8 @@ int board_early_init_f(void) MPP10_UART0_TXD, MPP11_UART0_RXD, MPP12_SD_CLK, -MPP13_SD_CMD, -MPP14_SD_D0, +MPP13_UART1_TXD,/* Custom ...*/ +MPP14_UART1_RXD,/* ... controller */ Are these entries valid for both boards? If not then encapsulate with #ifdef It seems fairly reasonable to---the DNS-325 does not make use of the SD interface. Either these pins are unattached or attached to the embedded controller in the same way, but the connection is not useful. Either way, setting them to UART does not cause any problems on the DNS-325. The DNS-325 has no SD interface. The SD configuration is only the default configuration for this pins (compare to other boards). Maybe we should change all other SD pins to GPIO to make clear that they are unused. I could set MPP13_GPIO, MPP14_GPIO for the DNS-325 instead, or just not configure them at all (if that is an option). As MMP14 has a internal pull-up you can configure it as input MPP14_UART1_RXD even if it is not connected on the board. MPP15_SD_D1, MPP16_SD_D2, MPP17_SD_D3, @@ -74,13 +74,13 @@ int board_early_init_f(void) MPP26_GPIO,/* power led */ MPP27_GPIO,/* sata0(right) error led */ MPP28_GPIO,/* sata1(left) error led */ -MPP29_GPIO,/* usb error led */ +MPP29_GPIO,/* usb error led (dns-325) */ Ditto Unattached on the DNS-320, so same situation as above. MPP30_GPIO, MPP31_GPIO, MPP32_GPIO, MPP33_GPIO, MPP34_GPIO,/* power key */ -MPP35_GPIO, +MPP35_GPIO,/* usb error led (dns-320) */ Ditto Unattached on the DNS-325, so same situation as above. MPP36_GPIO, MPP37_GPIO, MPP38_GPIO, diff --git a/board/d-link/dnskw/dnskw.h b/board/d-link/dnskw/dnskw.h index 4b11cb6..8886050 100644 --- a/board/d-link/dnskw/dnskw.h +++ b/board/d-link/dnskw/dnskw.h @@ -43,6 +43,12 @@ #define DNSKW_OE_VAL_HIGH0x0800/* disable leds */ #endif /* CONFIG_BOARD_IS_DNS325 */ +/* DNS-320 specific configuration */ +#ifdef CONFIG_BOARD_IS_DNS320 +#define DNSKW_OE_VAL_LOW0x3800/* disable leds */ +#define DNSKW_OE_VAL_HIGH0x0808/* disable leds */ +#endif /* CONFIG_BOARD_IS_DNS320 */ + /* PHY related */ #define MV88E1116_MAC_CTRL_REG21 #define MV88E1116_PGADR_REG22 diff --git a/board/d-link/dnskw/kwbimage.dns320.cfg b/board/d- link/dnskw/kwbimage.dns320.cfg new file mode 100644 index 000..5fb4052 --- /dev/null +++ b/board/d-link/dnskw/kwbimage.dns320.cfg @@ -0,0 +1,207 @@ +# +# Copyright (C) 2012 +# Jamie Lentin j...@lentin.co.uk +# +# Based on dns325 support: +# Copyright (C) 2011 +# Stefan Herbrechtsmeier ste...@code.herbrechtsmeier.net +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be
