[PATCH v1 1/3] configs: Enable RTC pcf2131 support

2023-05-29 Thread Joy Zou
Enable CONFIG_RTC_PCF2131 configs to support pcf2131.

Disable CONFIG_RTC_EMULATION configs. The default rtc0 change into
pcf2131.

Signed-off-by: Joy Zou 
---
 configs/imx93_11x11_evk_defconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/configs/imx93_11x11_evk_defconfig 
b/configs/imx93_11x11_evk_defconfig
index 4f8777161e..ccb6999369 100644
--- a/configs/imx93_11x11_evk_defconfig
+++ b/configs/imx93_11x11_evk_defconfig
@@ -13,6 +13,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx93-11x11-evk"
 CONFIG_SPL_TEXT_BASE=0x2049A000
 CONFIG_TARGET_IMX93_11X11_EVK=y
 CONFIG_SYS_PROMPT="u-boot=> "
+CONFIG_RTC_PCF2131=y
 CONFIG_SPL_SERIAL=y
 CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL_STACK=0x2051ddd0
@@ -107,7 +108,6 @@ CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_DM_RTC=y
-CONFIG_RTC_EMULATION=y
 CONFIG_DM_SERIAL=y
 CONFIG_FSL_LPUART=y
 CONFIG_ULP_WATCHDOG=y
-- 
2.37.1



[PATCH v1 0/3] Add pcf2131 rtc support

2023-05-29 Thread Joy Zou
The patchset supports pcf2131 rtc.
For the details, please check the patch commit log.

Joy Zou (3):
  configs: Enable RTC pcf2131 support
  imx: imx93_evk: add rtc pcf2131
  drivers: rtc: add pcf2131 rtc driver

 arch/arm/dts/imx93-11x11-evk-u-boot.dtsi |   8 +
 arch/arm/dts/imx93-11x11-evk.dts |  25 +++
 arch/arm/dts/imx93.dtsi  |   2 +-
 configs/imx93_11x11_evk_defconfig|   2 +-
 drivers/rtc/Kconfig  |  10 ++
 drivers/rtc/Makefile |   1 +
 drivers/rtc/pcf2131.c| 189 +++
 7 files changed, 235 insertions(+), 2 deletions(-)
 create mode 100644 drivers/rtc/pcf2131.c

-- 
2.37.1



[PATCH v1 2/3] imx: imx93_evk: add rtc pcf2131

2023-05-29 Thread Joy Zou
support rtc pcf2131 for imx93.

Signed-off-by: Joy Zou 
---
 arch/arm/dts/imx93-11x11-evk-u-boot.dtsi |  8 
 arch/arm/dts/imx93-11x11-evk.dts | 25 
 arch/arm/dts/imx93.dtsi  |  2 +-
 3 files changed, 34 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi 
b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
index 89e64344c6..4165a9b6b1 100644
--- a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
@@ -113,6 +113,10 @@
bootph-pre-ram;
 };
 
+ {
+   u-boot,dm-spl;
+};
+
 &{/soc@0/bus@4400/i2c@4435/pmic@25} {
bootph-pre-ram;
 };
@@ -125,6 +129,10 @@
bootph-pre-ram;
 };
 
+_lpi2c3 {
+   u-boot,dm-spl;
+};
+
  {
phy-reset-gpios = < 16 GPIO_ACTIVE_LOW>;
phy-reset-duration = <15>;
diff --git a/arch/arm/dts/imx93-11x11-evk.dts b/arch/arm/dts/imx93-11x11-evk.dts
index b3a5a3d71e..421041757e 100644
--- a/arch/arm/dts/imx93-11x11-evk.dts
+++ b/arch/arm/dts/imx93-11x11-evk.dts
@@ -244,6 +244,24 @@
};
 };
 
+ {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   clock-frequency = <40>;
+   pinctrl-names = "default", "sleep";
+   pinctrl-0 = <_lpi2c3>;
+   pinctrl-1 = <_lpi2c3>;
+   status = "okay";
+
+   pcf2131: rtc@53 {
+   compatible = "nxp,pcf2131";
+   reg = <0x53>;
+   interrupt-parent = <>;
+   interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
+   status = "okay";
+   };
+};
+
  { /* console */
pinctrl-names = "default";
pinctrl-0 = <_uart1>;
@@ -461,6 +479,13 @@
>;
};
 
+   pinctrl_lpi2c3: lpi2c3grp {
+   fsl,pins = <
+   MX93_PAD_GPIO_IO28__LPI2C3_SDA  
0x4b9e
+   MX93_PAD_GPIO_IO29__LPI2C3_SCL  
0x4b9e
+   >;
+   };
+
pinctrl_pcal6524: pcal6524grp {
fsl,pins = <
MX93_PAD_CCM_CLKO2__GPIO3_IO27  0x31e
diff --git a/arch/arm/dts/imx93.dtsi b/arch/arm/dts/imx93.dtsi
index 28026ccecc..ac4b81c02f 100644
--- a/arch/arm/dts/imx93.dtsi
+++ b/arch/arm/dts/imx93.dtsi
@@ -319,7 +319,7 @@
reg = <0x4253 0x1>;
interrupts = ;
clocks = < IMX93_CLK_LPI2C3_GATE>,
-< IMX93_CLK_LPI2C3_GATE>;
+< IMX93_CLK_BUS_WAKEUP>;
clock-names = "per", "ipg";
status = "disabled";
};
-- 
2.37.1



[PATCH v1 3/3] drivers: rtc: add pcf2131 rtc driver

2023-05-29 Thread Joy Zou
Adding support for pcf2131 RTC chip.

The pcf2131 is similar to the pcf2127. The driver support rtc register
read/write by using rtc cmd and rtc date set/get by using date cmd.

Signed-off-by: Joy Zou 
---
 drivers/rtc/Kconfig   |  10 +++
 drivers/rtc/Makefile  |   1 +
 drivers/rtc/pcf2131.c | 189 ++
 3 files changed, 200 insertions(+)
 create mode 100644 drivers/rtc/pcf2131.c

diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 23173139e0..507dc6cbcb 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -64,6 +64,16 @@ config RTC_PCF2127
  has a selectable I2C-bus or SPI-bus, a backup battery switch-over 
circuit, a
  programmable watchdog function, a timestamp function, and many other 
features.
 
+config RTC_PCF2131
+   bool "Enable PCF2131 driver"
+   depends on DM_RTC
+   help
+ The PCF2131 is a CMOS Real Time Clock (RTC) and calendar with an 
integrated
+ Temperature Compensated Crystal (Xtal) Oscillator (TCXO) and a 32.768 
kHz quartz
+ crystal optimized for very high accuracy and very low power 
consumption. The PCF2127
+ has a selectable I2C-bus or SPI-bus, a backup battery switch-over 
circuit, a
+ programmable watchdog function, a timestamp function, and many other 
features.
+
 config RTC_DS1307
bool "Enable DS1307 driver"
depends on DM_RTC
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 308fab8da9..722f2be98f 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_RTC_MV) += mvrtc.o
 obj-$(CONFIG_RTC_MXS) += mxsrtc.o
 obj-$(CONFIG_RTC_PCF8563) += pcf8563.o
 obj-$(CONFIG_RTC_PCF2127) += pcf2127.o
+obj-$(CONFIG_RTC_PCF2131) += pcf2131.o
 obj-$(CONFIG_RTC_PL031) += pl031.o
 obj-$(CONFIG_RTC_PT7C4338) += pt7c4338.o
 obj-$(CONFIG_RTC_RV3028) += rv3028.o
diff --git a/drivers/rtc/pcf2131.c b/drivers/rtc/pcf2131.c
new file mode 100644
index 00..8b9c17a2c8
--- /dev/null
+++ b/drivers/rtc/pcf2131.c
@@ -0,0 +1,189 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * The NXP PCF2131 RTC uboot driver.
+ * Copyright 2023 NXP
+ * Date & Time support for PCF2131 RTC
+ */
+
+/*  #define DEBUG   */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define PCF2131_REG_CTRL1   0x00
+#define PCF2131_BIT_CTRL1_STOP  BIT(5)
+#define PCF2131_BIT_CTRL1_100TH_S_DIS   BIT(4)
+#define PCF2131_REG_CTRL2   0x01
+#define PCF2131_REG_CTRL3   0x02
+#define PCF2131_REG_SR_RESET0x05
+#define PCF2131_SR_VAL_Clr_Pres 0xa4
+#define PCF2131_REG_SC  0x07
+#define PCF2131_REG_MN  0x08
+#define PCF2131_REG_HR  0x09
+#define PCF2131_REG_DM  0x0a
+#define PCF2131_REG_DW  0x0b
+#define PCF2131_REG_MO  0x0c
+#define PCF2131_REG_YR  0x0d
+
+static int pcf2131_rtc_read(struct udevice *dev, uint offset, u8 *buffer, uint 
len)
+{
+   struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
+   struct i2c_msg msg;
+   int ret;
+
+   /* Set the address of the start register to be read */
+   ret = dm_i2c_write(dev, offset, NULL, 0);
+   if (ret < 0)
+   return ret;
+
+   /* Read register's data */
+   msg.addr = chip->chip_addr;
+   msg.flags |= I2C_M_RD;
+   msg.len = len;
+   msg.buf = buffer;
+
+   return dm_i2c_xfer(dev, , 1);
+}
+
+static int pcf2131_rtc_lock(struct udevice *dev)
+{
+   int ret = 0;
+   uchar buf[6] = { PCF2131_REG_CTRL1 };
+
+   ret = pcf2131_rtc_read(dev, PCF2131_REG_CTRL1, buf, sizeof(buf));
+   if (ret < 0)
+   return ret;
+
+   buf[PCF2131_REG_CTRL1] |= PCF2131_BIT_CTRL1_STOP;
+   ret = dm_i2c_write(dev, PCF2131_REG_CTRL1, [PCF2131_REG_CTRL1], 1);
+   if (ret < 0)
+   return ret;
+
+   buf[PCF2131_REG_SR_RESET] = PCF2131_SR_VAL_Clr_Pres;
+   ret = dm_i2c_write(dev, PCF2131_REG_SR_RESET, 
[PCF2131_REG_SR_RESET], 1);
+   return ret;
+}
+
+static int pcf2131_rtc_unlock(struct udevice *dev)
+{
+   int ret = 0;
+   uchar buf[6] = { PCF2131_REG_CTRL1 };
+
+   ret = pcf2131_rtc_read(dev, PCF2131_REG_CTRL1, buf, sizeof(buf));
+   if (ret < 0)
+   return ret;
+
+   buf[PCF2131_REG_CTRL1] &= ~PCF2131_BIT_CTRL1_STOP;
+   ret = dm_i2c_write(dev, PCF2131_REG_CTRL1, [PCF2131_REG_CTRL1], 1);
+   return ret;
+}
+
+static int pcf2131_rtc_write(struct udevice *dev, uint offset,
+const u8 *buffer, uint len)
+{
+   int ret = 0;
+
+   ret = pcf2131_rtc_lock(dev);
+   if (ret < 0)
+   return ret;
+
+   ret = dm_i2c_write(dev, offset, buffer, len);
+   if (ret < 0)
+   return ret;
+
+   ret = pcf2131_rtc_unlock(dev);
+   return ret;
+}
+
+static int pcf2131_rtc_s

RE: [PATCH v1 2/3] imx: imx93_evk: add rtc pcf2131

2023-06-02 Thread Joy Zou

> -Original Message-
> From: Peng Fan (OSS) 
> Sent: 2023年5月31日 9:37
> To: Joy Zou ; Peng Fan ; Ye Li
> ; sba...@denx.de; feste...@gmail.com; s...@chromium.org;
> sap...@gmail.com; judge.pack...@gmail.com
> Cc: dl-uboot-imx ; u-boot@lists.denx.de
> Subject: Re: [PATCH v1 2/3] imx: imx93_evk: add rtc pcf2131
> 
> 
> 
> On 5/30/2023 9:41 AM, Joy Zou wrote:
> > Caution: This is an external email. Please take care when clicking
> > links or opening attachments. When in doubt, report the message using
> > the 'Report this email' button
> >
> >
> > support rtc pcf2131 for imx93.
> >
> > Signed-off-by: Joy Zou 
> > ---
> >   arch/arm/dts/imx93-11x11-evk-u-boot.dtsi |  8 
> >   arch/arm/dts/imx93-11x11-evk.dts | 25
> 
> >   arch/arm/dts/imx93.dtsi  |  2 +-
> >   3 files changed, 34 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
> > b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
> > index 89e64344c6..4165a9b6b1 100644
> > --- a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
> > +++ b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
> > @@ -113,6 +113,10 @@
> >  bootph-pre-ram;
> >   };
> >
> > + {
> > +   u-boot,dm-spl;
> > +};
> 
> Do you need rtc in SPL stage or only in U-Boot proper?
only in U-Boot proper.
> 
> > +
> >   &{/soc@0/bus@4400/i2c@4435/pmic@25} {
> >  bootph-pre-ram;
> >   };
> > @@ -125,6 +129,10 @@
> >  bootph-pre-ram;
> >   };
> >
> > +_lpi2c3 {
> > +   u-boot,dm-spl;
> > +};
> 
> Ditto.
only in U-Boot proper.
> 
> > +
> >{
> >  phy-reset-gpios = < 16 GPIO_ACTIVE_LOW>;
> >  phy-reset-duration = <15>;
> > diff --git a/arch/arm/dts/imx93-11x11-evk.dts
> > b/arch/arm/dts/imx93-11x11-evk.dts
> > index b3a5a3d71e..421041757e 100644
> > --- a/arch/arm/dts/imx93-11x11-evk.dts
> > +++ b/arch/arm/dts/imx93-11x11-evk.dts
> > @@ -244,6 +244,24 @@
> >  };
> >   };
> >
> > + {
> > +   #address-cells = <1>;
> > +   #size-cells = <0>;
> > +   clock-frequency = <40>;
> > +   pinctrl-names = "default", "sleep";
> > +   pinctrl-0 = <_lpi2c3>;
> > +   pinctrl-1 = <_lpi2c3>;
> > +   status = "okay";
> > +
> > +   pcf2131: rtc@53 {
> > +   compatible = "nxp,pcf2131";
> > +   reg = <0x53>;
> > +   interrupt-parent = <>;
> > +   interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
> > +   status = "okay";
> > +   };
> > +};
> > +
> >{ /* console */
> >  pinctrl-names = "default";
> >  pinctrl-0 = <_uart1>; @@ -461,6 +479,13 @@
> >  >;
> >  };
> >
> > +   pinctrl_lpi2c3: lpi2c3grp {
> > +   fsl,pins = <
> > +   MX93_PAD_GPIO_IO28__LPI2C3_SDA
> 0x4b9e
> > +   MX93_PAD_GPIO_IO29__LPI2C3_SCL
> 0x4b9e
> > +   >;
> > +   };
> > +
> >  pinctrl_pcal6524: pcal6524grp {
> >  fsl,pins = <
> >  MX93_PAD_CCM_CLKO2__GPIO3_IO27
> 0x31e
> > diff --git a/arch/arm/dts/imx93.dtsi b/arch/arm/dts/imx93.dtsi index
> > 28026ccecc..ac4b81c02f 100644
> > --- a/arch/arm/dts/imx93.dtsi
> > +++ b/arch/arm/dts/imx93.dtsi
> > @@ -319,7 +319,7 @@
> >  reg = <0x4253 0x1>;
> >  interrupts =  IRQ_TYPE_LEVEL_HIGH>;
> >  clocks = <
> IMX93_CLK_LPI2C3_GATE>,
> > -<
> IMX93_CLK_LPI2C3_GATE>;
> > +<
> IMX93_CLK_BUS_WAKEUP>;
> 
> What is this change for?
Because the lpi2c3 ipg clk only need bus_wakeup_clk_root according to the imx93 
RM.
Thanks peng!
BR
Joy Zou
> 
> Regards,
> Peng.
> >  clock-names = "per", "ipg";
> >  status = "disabled";
> >  };
> > --
> > 2.37.1
> >


RE: [PATCH v1 0/3] Add pcf2131 rtc support

2023-06-02 Thread Joy Zou

> -Original Message-
> From: Peng Fan (OSS) 
> Sent: 2023年5月31日 9:38
> To: Joy Zou ; Peng Fan ; Ye Li
> ; sba...@denx.de; feste...@gmail.com; s...@chromium.org;
> sap...@gmail.com; judge.pack...@gmail.com
> Cc: dl-uboot-imx ; u-boot@lists.denx.de
> Subject: Re: [PATCH v1 0/3] Add pcf2131 rtc support
> 
> 
> 
> On 5/30/2023 9:41 AM, Joy Zou wrote:
> > Caution: This is an external email. Please take care when clicking
> > links or opening attachments. When in doubt, report the message using
> > the 'Report this email' button
> >
> >
> > The patchset supports pcf2131 rtc.
> > For the details, please check the patch commit log.
> >
> > Joy Zou (3):
> >configs: Enable RTC pcf2131 support
> >imx: imx93_evk: add rtc pcf2131
> >drivers: rtc: add pcf2131 rtc driver
> 
> Please reorder your patches, with drivers as 1st, imx as 2nd, configs as 3rd 
> to
> avoid bisect issue.
Have reordered the patchset.
Thanks peng!
BR
Joy Zou
> 
> Thanks,
> Peng.
> 
> >
> >   arch/arm/dts/imx93-11x11-evk-u-boot.dtsi |   8 +
> >   arch/arm/dts/imx93-11x11-evk.dts |  25 +++
> >   arch/arm/dts/imx93.dtsi  |   2 +-
> >   configs/imx93_11x11_evk_defconfig|   2 +-
> >   drivers/rtc/Kconfig  |  10 ++
> >   drivers/rtc/Makefile |   1 +
> >   drivers/rtc/pcf2131.c| 189
> +++
> >   7 files changed, 235 insertions(+), 2 deletions(-)
> >   create mode 100644 drivers/rtc/pcf2131.c
> >
> > --
> > 2.37.1
> >


[PATCH v2 3/3] configs: Enable RTC pcf2131 support

2023-06-02 Thread Joy Zou
Enable CONFIG_RTC_PCF2131 configs to support pcf2131.

Disable CONFIG_RTC_EMULATION configs. The default rtc0 change into
pcf2131.

Signed-off-by: Joy Zou 
---
 configs/imx93_11x11_evk_defconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/configs/imx93_11x11_evk_defconfig 
b/configs/imx93_11x11_evk_defconfig
index 4f8777161e..ccb6999369 100644
--- a/configs/imx93_11x11_evk_defconfig
+++ b/configs/imx93_11x11_evk_defconfig
@@ -13,6 +13,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx93-11x11-evk"
 CONFIG_SPL_TEXT_BASE=0x2049A000
 CONFIG_TARGET_IMX93_11X11_EVK=y
 CONFIG_SYS_PROMPT="u-boot=> "
+CONFIG_RTC_PCF2131=y
 CONFIG_SPL_SERIAL=y
 CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL_STACK=0x2051ddd0
@@ -107,7 +108,6 @@ CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_DM_RTC=y
-CONFIG_RTC_EMULATION=y
 CONFIG_DM_SERIAL=y
 CONFIG_FSL_LPUART=y
 CONFIG_ULP_WATCHDOG=y
-- 
2.37.1



RE: [PATCH v1 3/3] drivers: rtc: add pcf2131 rtc driver

2023-06-02 Thread Joy Zou

> -Original Message-
> From: Peng Fan (OSS) 
> Sent: 2023年5月31日 9:35
> To: Joy Zou ; Peng Fan ; Ye Li
> ; sba...@denx.de; feste...@gmail.com; s...@chromium.org;
> sap...@gmail.com; judge.pack...@gmail.com
> Cc: dl-uboot-imx ; u-boot@lists.denx.de
> Subject: Re: [PATCH v1 3/3] drivers: rtc: add pcf2131 rtc driver
> 
> 
> 
> On 5/30/2023 9:41 AM, Joy Zou wrote:
> > Caution: This is an external email. Please take care when clicking
> > links or opening attachments. When in doubt, report the message using
> > the 'Report this email' button
> >
> >
> > Adding support for pcf2131 RTC chip.
> >
> > The pcf2131 is similar to the pcf2127. The driver support rtc register
> > read/write by using rtc cmd and rtc date set/get by using date cmd.
> >
> > Signed-off-by: Joy Zou 
> > ---
> >   drivers/rtc/Kconfig   |  10 +++
> >   drivers/rtc/Makefile  |   1 +
> >   drivers/rtc/pcf2131.c | 189
> ++
> >   3 files changed, 200 insertions(+)
> >   create mode 100644 drivers/rtc/pcf2131.c
> >
> > diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index
> > 23173139e0..507dc6cbcb 100644
> > --- a/drivers/rtc/Kconfig
> > +++ b/drivers/rtc/Kconfig
> > @@ -64,6 +64,16 @@ config RTC_PCF2127
> >has a selectable I2C-bus or SPI-bus, a backup battery
> switch-over circuit, a
> >programmable watchdog function, a timestamp function, and
> many other features.
> >
> > +config RTC_PCF2131
> > +   bool "Enable PCF2131 driver"
> > +   depends on DM_RTC
> > +   help
> > + The PCF2131 is a CMOS Real Time Clock (RTC) and calendar with
> an integrated
> > + Temperature Compensated Crystal (Xtal) Oscillator (TCXO) and a
> 32.768 kHz quartz
> > + crystal optimized for very high accuracy and very low power
> consumption. The PCF2127
> > + has a selectable I2C-bus or SPI-bus, a backup battery switch-over
> circuit, a
> > + programmable watchdog function, a timestamp function, and
> many other features.
> > +
> >   config RTC_DS1307
> >  bool "Enable DS1307 driver"
> >  depends on DM_RTC
> > diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index
> > 308fab8da9..722f2be98f 100644
> > --- a/drivers/rtc/Makefile
> > +++ b/drivers/rtc/Makefile
> > @@ -27,6 +27,7 @@ obj-$(CONFIG_RTC_MV) += mvrtc.o
> >   obj-$(CONFIG_RTC_MXS) += mxsrtc.o
> >   obj-$(CONFIG_RTC_PCF8563) += pcf8563.o
> >   obj-$(CONFIG_RTC_PCF2127) += pcf2127.o
> > +obj-$(CONFIG_RTC_PCF2131) += pcf2131.o
> >   obj-$(CONFIG_RTC_PL031) += pl031.o
> >   obj-$(CONFIG_RTC_PT7C4338) += pt7c4338.o
> >   obj-$(CONFIG_RTC_RV3028) += rv3028.o diff --git
> > a/drivers/rtc/pcf2131.c b/drivers/rtc/pcf2131.c new file mode 100644
> > index 00..8b9c17a2c8
> > --- /dev/null
> > +++ b/drivers/rtc/pcf2131.c
> > @@ -0,0 +1,189 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * The NXP PCF2131 RTC uboot driver.
> > + * Copyright 2023 NXP
> > + * Date & Time support for PCF2131 RTC  */
> > +
> > +/*  #define DEBUG   */
> 
> Drop this line.
Okay. Have dropped in patch v2.
> 
> > +
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +
> > +#define PCF2131_REG_CTRL1   0x00
> > +#define PCF2131_BIT_CTRL1_STOP  BIT(5)
> > +#define PCF2131_BIT_CTRL1_100TH_S_DIS   BIT(4)
> > +#define PCF2131_REG_CTRL2   0x01
> > +#define PCF2131_REG_CTRL3   0x02
> > +#define PCF2131_REG_SR_RESET0x05
> > +#define PCF2131_SR_VAL_Clr_Pres 0xa4
> > +#define PCF2131_REG_SC  0x07
> > +#define PCF2131_REG_MN  0x08
> > +#define PCF2131_REG_HR  0x09
> > +#define PCF2131_REG_DM  0x0a
> > +#define PCF2131_REG_DW  0x0b
> > +#define PCF2131_REG_MO  0x0c
> > +#define PCF2131_REG_YR  0x0d
> > +
> > +static int pcf2131_rtc_read(struct udevice *dev, uint offset, u8
> > +*buffer, uint len) {
> > +   struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
> > +   struct i2c_msg msg;
> > +   int ret;
> > +
> > +   /* Set the address of the start register to be read */
> > +   ret = dm_i2c_write(dev, offset, NULL, 0);
> > +   if (ret < 0)
> > +   return ret;
> &

[PATCH v2 1/3] drivers: rtc: add pcf2131 rtc driver

2023-06-02 Thread Joy Zou
Adding support for pcf2131 RTC chip.

The pcf2131 is similar to the pcf2127. The driver support rtc register
read/write by using rtc cmd and rtc date set/get by using date cmd.

Signed-off-by: Joy Zou 
---
Changes in v1:
1. delete the unnecessary initialization in v2.
2. retrun directly function insteand of redundancy return ret in v2.
3. delete the unnecessary comment line.
---
 drivers/rtc/Kconfig   |  10 +++
 drivers/rtc/Makefile  |   1 +
 drivers/rtc/pcf2131.c | 184 ++
 3 files changed, 195 insertions(+)
 create mode 100644 drivers/rtc/pcf2131.c

diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 23173139e0..507dc6cbcb 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -64,6 +64,16 @@ config RTC_PCF2127
  has a selectable I2C-bus or SPI-bus, a backup battery switch-over 
circuit, a
  programmable watchdog function, a timestamp function, and many other 
features.
 
+config RTC_PCF2131
+   bool "Enable PCF2131 driver"
+   depends on DM_RTC
+   help
+ The PCF2131 is a CMOS Real Time Clock (RTC) and calendar with an 
integrated
+ Temperature Compensated Crystal (Xtal) Oscillator (TCXO) and a 32.768 
kHz quartz
+ crystal optimized for very high accuracy and very low power 
consumption. The PCF2127
+ has a selectable I2C-bus or SPI-bus, a backup battery switch-over 
circuit, a
+ programmable watchdog function, a timestamp function, and many other 
features.
+
 config RTC_DS1307
bool "Enable DS1307 driver"
depends on DM_RTC
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 308fab8da9..722f2be98f 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_RTC_MV) += mvrtc.o
 obj-$(CONFIG_RTC_MXS) += mxsrtc.o
 obj-$(CONFIG_RTC_PCF8563) += pcf8563.o
 obj-$(CONFIG_RTC_PCF2127) += pcf2127.o
+obj-$(CONFIG_RTC_PCF2131) += pcf2131.o
 obj-$(CONFIG_RTC_PL031) += pl031.o
 obj-$(CONFIG_RTC_PT7C4338) += pt7c4338.o
 obj-$(CONFIG_RTC_RV3028) += rv3028.o
diff --git a/drivers/rtc/pcf2131.c b/drivers/rtc/pcf2131.c
new file mode 100644
index 00..c3f16b07bb
--- /dev/null
+++ b/drivers/rtc/pcf2131.c
@@ -0,0 +1,184 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * The NXP PCF2131 RTC uboot driver.
+ * Copyright 2023 NXP
+ * Date & Time support for PCF2131 RTC
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define PCF2131_REG_CTRL1   0x00
+#define PCF2131_BIT_CTRL1_STOP  BIT(5)
+#define PCF2131_BIT_CTRL1_100TH_S_DIS   BIT(4)
+#define PCF2131_REG_CTRL2   0x01
+#define PCF2131_REG_CTRL3   0x02
+#define PCF2131_REG_SR_RESET0x05
+#define PCF2131_SR_VAL_Clr_Pres 0xa4
+#define PCF2131_REG_SC  0x07
+#define PCF2131_REG_MN  0x08
+#define PCF2131_REG_HR  0x09
+#define PCF2131_REG_DM  0x0a
+#define PCF2131_REG_DW  0x0b
+#define PCF2131_REG_MO  0x0c
+#define PCF2131_REG_YR  0x0d
+
+static int pcf2131_rtc_read(struct udevice *dev, uint offset, u8 *buffer, uint 
len)
+{
+   struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
+   struct i2c_msg msg;
+   int ret;
+
+   /* Set the address of the start register to be read */
+   ret = dm_i2c_write(dev, offset, NULL, 0);
+   if (ret < 0)
+   return ret;
+
+   /* Read register's data */
+   msg.addr = chip->chip_addr;
+   msg.flags |= I2C_M_RD;
+   msg.len = len;
+   msg.buf = buffer;
+
+   return dm_i2c_xfer(dev, , 1);
+}
+
+static int pcf2131_rtc_lock(struct udevice *dev)
+{
+   int ret = 0;
+   uchar buf[6] = { PCF2131_REG_CTRL1 };
+
+   ret = pcf2131_rtc_read(dev, PCF2131_REG_CTRL1, buf, sizeof(buf));
+   if (ret < 0)
+   return ret;
+
+   buf[PCF2131_REG_CTRL1] |= PCF2131_BIT_CTRL1_STOP;
+   ret = dm_i2c_write(dev, PCF2131_REG_CTRL1, [PCF2131_REG_CTRL1], 1);
+   if (ret < 0)
+   return ret;
+
+   buf[PCF2131_REG_SR_RESET] = PCF2131_SR_VAL_Clr_Pres;
+
+   return dm_i2c_write(dev, PCF2131_REG_SR_RESET, 
[PCF2131_REG_SR_RESET], 1);
+}
+
+static int pcf2131_rtc_unlock(struct udevice *dev)
+{
+   int ret = 0;
+   uchar buf[6] = { PCF2131_REG_CTRL1 };
+
+   ret = pcf2131_rtc_read(dev, PCF2131_REG_CTRL1, buf, sizeof(buf));
+   if (ret < 0)
+   return ret;
+
+   buf[PCF2131_REG_CTRL1] &= ~PCF2131_BIT_CTRL1_STOP;
+   return dm_i2c_write(dev, PCF2131_REG_CTRL1, [PCF2131_REG_CTRL1], 1);
+}
+
+static int pcf2131_rtc_write(struct udevice *dev, uint offset,
+const u8 *buffer, uint len)
+{
+   int ret = 0;
+
+   ret = pcf2131_rtc_lock(dev);
+   if (ret < 0)
+   return ret;
+
+   ret = dm_i2c_write(dev, offset, buffer, len);
+   if (ret <

[PATCH v2 2/3] imx: imx93_evk: add rtc pcf2131

2023-06-02 Thread Joy Zou
support rtc pcf2131 for imx93.

Signed-off-by: Joy Zou 
---
Changes in v1:
1. use the flag bootph-pre-ram instead of uboot,dm-spl.
---
 arch/arm/dts/imx93-11x11-evk-u-boot.dtsi |  8 
 arch/arm/dts/imx93-11x11-evk.dts | 25 
 arch/arm/dts/imx93.dtsi  |  2 +-
 3 files changed, 34 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi 
b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
index 89e64344c6..800393e250 100644
--- a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
@@ -113,6 +113,10 @@
bootph-pre-ram;
 };
 
+ {
+   bootph-pre-ram;
+};
+
 &{/soc@0/bus@4400/i2c@4435/pmic@25} {
bootph-pre-ram;
 };
@@ -125,6 +129,10 @@
bootph-pre-ram;
 };
 
+_lpi2c3 {
+   bootph-pre-ram;
+};
+
  {
phy-reset-gpios = < 16 GPIO_ACTIVE_LOW>;
phy-reset-duration = <15>;
diff --git a/arch/arm/dts/imx93-11x11-evk.dts b/arch/arm/dts/imx93-11x11-evk.dts
index b3a5a3d71e..421041757e 100644
--- a/arch/arm/dts/imx93-11x11-evk.dts
+++ b/arch/arm/dts/imx93-11x11-evk.dts
@@ -244,6 +244,24 @@
};
 };
 
+ {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   clock-frequency = <40>;
+   pinctrl-names = "default", "sleep";
+   pinctrl-0 = <_lpi2c3>;
+   pinctrl-1 = <_lpi2c3>;
+   status = "okay";
+
+   pcf2131: rtc@53 {
+   compatible = "nxp,pcf2131";
+   reg = <0x53>;
+   interrupt-parent = <>;
+   interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
+   status = "okay";
+   };
+};
+
  { /* console */
pinctrl-names = "default";
pinctrl-0 = <_uart1>;
@@ -461,6 +479,13 @@
>;
};
 
+   pinctrl_lpi2c3: lpi2c3grp {
+   fsl,pins = <
+   MX93_PAD_GPIO_IO28__LPI2C3_SDA  
0x4b9e
+   MX93_PAD_GPIO_IO29__LPI2C3_SCL  
0x4b9e
+   >;
+   };
+
pinctrl_pcal6524: pcal6524grp {
fsl,pins = <
MX93_PAD_CCM_CLKO2__GPIO3_IO27  0x31e
diff --git a/arch/arm/dts/imx93.dtsi b/arch/arm/dts/imx93.dtsi
index 28026ccecc..ac4b81c02f 100644
--- a/arch/arm/dts/imx93.dtsi
+++ b/arch/arm/dts/imx93.dtsi
@@ -319,7 +319,7 @@
reg = <0x4253 0x1>;
interrupts = ;
clocks = < IMX93_CLK_LPI2C3_GATE>,
-< IMX93_CLK_LPI2C3_GATE>;
+< IMX93_CLK_BUS_WAKEUP>;
clock-names = "per", "ipg";
status = "disabled";
};
-- 
2.37.1



[PATCH v2 0/3] Add pcf2131 rtc support

2023-06-02 Thread Joy Zou
The patchset supports pcf2131 rtc.
For the details, please check the patch commit log.

Joy Zou (3):
  drivers: rtc: add pcf2131 rtc driver
  imx: imx93_evk: add rtc pcf2131
  configs: Enable RTC pcf2131 support

 arch/arm/dts/imx93-11x11-evk-u-boot.dtsi |   8 +
 arch/arm/dts/imx93-11x11-evk.dts |  25 +++
 arch/arm/dts/imx93.dtsi  |   2 +-
 configs/imx93_11x11_evk_defconfig|   2 +-
 drivers/rtc/Kconfig  |  10 ++
 drivers/rtc/Makefile |   1 +
 drivers/rtc/pcf2131.c| 184 +++
 7 files changed, 230 insertions(+), 2 deletions(-)
 create mode 100644 drivers/rtc/pcf2131.c

-- 
2.37.1



[PATCH v1 4/4] configs: enable pmic regulator pca9450

2023-06-05 Thread Joy Zou
support pmci regulator pca9450.

Signed-off-by: Joy Zou 
---
 configs/imx93_11x11_evk_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/imx93_11x11_evk_defconfig 
b/configs/imx93_11x11_evk_defconfig
index 4f8777161e..985b4d8638 100644
--- a/configs/imx93_11x11_evk_defconfig
+++ b/configs/imx93_11x11_evk_defconfig
@@ -103,6 +103,8 @@ CONFIG_SPL_PINCTRL=y
 CONFIG_PINCTRL_IMX93=y
 CONFIG_DM_PMIC=y
 CONFIG_SPL_DM_PMIC_PCA9450=y
+CONFIG_DM_PMIC_PCA9450=y
+CONFIG_DM_REGULATOR_PCA9450=y
 CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
-- 
2.37.1



[PATCH v1 1/4] power: pmic: Modify the BUCK1 voltage range

2023-06-05 Thread Joy Zou
The new pmic trimed BUCK1. So need to modify the range.
The default value of Toff_Deb is used to distinguish the old and new pmic.

Signed-off-by: Joy Zou 
---
 drivers/power/regulator/pca9450.c | 29 -
 include/power/pca9450.h   |  2 ++
 2 files changed, 30 insertions(+), 1 deletion(-)

diff --git a/drivers/power/regulator/pca9450.c 
b/drivers/power/regulator/pca9450.c
index 7ca20d1f7f..f0b92ca037 100644
--- a/drivers/power/regulator/pca9450.c
+++ b/drivers/power/regulator/pca9450.c
@@ -72,6 +72,10 @@ static struct pca9450_vrange pca9450_buck123_vranges[] = {
PCA_RANGE(60, 12500, 0, 0x7f),
 };
 
+static struct pca9450_vrange pca9450_trim_buck13_vranges[] = {
+   PCA_RANGE(65, 12500, 0, 0x7f),
+};
+
 static struct pca9450_vrange pca9450_buck456_vranges[] = {
PCA_RANGE(60, 25000, 0, 0x70),
PCA_RANGE(340, 0, 0x71, 0x7f),
@@ -106,12 +110,18 @@ static struct pca9450_plat pca9450_reg_data[] = {
PCA_DATA("BUCK1", PCA9450_BUCK1CTRL, HW_STATE_CONTROL,
 PCA9450_BUCK1OUT_DVS0, PCA9450_DVS_BUCK_RUN_MASK,
 pca9450_buck123_vranges),
+   PCA_DATA("BUCK1_TRIM", PCA9450_BUCK1CTRL, HW_STATE_CONTROL,
+PCA9450_BUCK1OUT_DVS0, PCA9450_DVS_BUCK_RUN_MASK,
+pca9450_trim_buck13_vranges),
PCA_DATA("BUCK2", PCA9450_BUCK2CTRL, HW_STATE_CONTROL,
 PCA9450_BUCK2OUT_DVS0, PCA9450_DVS_BUCK_RUN_MASK,
 pca9450_buck123_vranges),
PCA_DATA("BUCK3", PCA9450_BUCK3CTRL, HW_STATE_CONTROL,
 PCA9450_BUCK3OUT_DVS0, PCA9450_DVS_BUCK_RUN_MASK,
 pca9450_buck123_vranges),
+   PCA_DATA("BUCK3_TRIM", PCA9450_BUCK3CTRL, HW_STATE_CONTROL,
+PCA9450_BUCK3OUT_DVS0, PCA9450_DVS_BUCK_RUN_MASK,
+pca9450_trim_buck13_vranges),
/* Bucks 4-6 which do not support dynamic voltage scaling */
PCA_DATA("BUCK4", PCA9450_BUCK4CTRL, HW_STATE_CONTROL,
 PCA9450_BUCK4OUT, PCA9450_DVS_BUCK_RUN_MASK,
@@ -272,7 +282,9 @@ static int pca9450_set_value(struct udevice *dev, int uvolt)
 static int pca9450_regulator_probe(struct udevice *dev)
 {
struct pca9450_plat *plat = dev_get_plat(dev);
-   int i, type;
+   int i, type, ret;
+   unsigned int val;
+   bool pmic_trim = false;
 
type = dev_get_driver_data(dev_get_parent(dev));
 
@@ -282,10 +294,25 @@ static int pca9450_regulator_probe(struct udevice *dev)
return -EINVAL;
}
 
+   ret = pmic_reg_read(dev->parent, PCA9450_PWR_CTRL);
+   if (ret < 0)
+   return ret;
+   else
+   val = ret;
+
+   if (type == NXP_CHIP_TYPE_PCA9451A && (val & 
PCA9450_REG_PWRCTRL_TOFF_DEB))
+   pmic_trim = true;
+
for (i = 0; i < ARRAY_SIZE(pca9450_reg_data); i++) {
if (strcmp(dev->name, pca9450_reg_data[i].name))
continue;
 
+   if (pmic_trim && (!strcmp(pca9450_reg_data[i].name, "BUCK1") ||
+ !strcmp(pca9450_reg_data[i].name, "BUCK3"))) {
+   *plat = pca9450_reg_data[i + 1];
+   return 0;
+   }
+
/* PCA9450B/PCA9450C uses BUCK1 and BUCK3 in dual-phase */
if (type == NXP_CHIP_TYPE_PCA9450BC &&
!strcmp(pca9450_reg_data[i].name, "BUCK3")) {
diff --git a/include/power/pca9450.h b/include/power/pca9450.h
index b8219d535a..8b62f4e5e1 100644
--- a/include/power/pca9450.h
+++ b/include/power/pca9450.h
@@ -63,6 +63,8 @@ enum {
NXP_CHIP_TYPE_AMOUNT
 };
 
+#define PCA9450_REG_PWRCTRL_TOFF_DEBBIT(5)
+
 #define PCA9450_DVS_BUCK_RUN_MASK  0x7f
 #define PCA9450_LDO12_MASK 0x07
 #define PCA9450_LDO34_MASK 0x1f
-- 
2.37.1



[PATCH v1 2/4] imx: imx93_evk: change VDD_SOC for new pmic trimed

2023-06-05 Thread Joy Zou
Change VDD_SOC into 0.9v for over drive mode for new pmic.

Signed-off-by: Joy Zou 
---
 board/freescale/imx93_evk/spl.c | 16 ++--
 1 file changed, 14 insertions(+), 2 deletions(-)

diff --git a/board/freescale/imx93_evk/spl.c b/board/freescale/imx93_evk/spl.c
index 1aa2977b40..f0dbd0f0a5 100644
--- a/board/freescale/imx93_evk/spl.c
+++ b/board/freescale/imx93_evk/spl.c
@@ -55,6 +55,7 @@ int power_init_board(void)
 {
struct udevice *dev;
int ret;
+   unsigned int val = 0;
 
ret = pmic_get("pmic@25", );
if (ret == -ENODEV) {
@@ -64,13 +65,24 @@ int power_init_board(void)
if (ret != 0)
return ret;
 
+   ret = pmic_reg_read(dev, PCA9450_PWR_CTRL);
+   if (ret < 0)
+   return ret;
+   else
+   val = ret;
+
/* BUCKxOUT_DVS0/1 control BUCK123 output */
pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);
 
/* 0.9v
 */
-   pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x18);
-   pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x18);
+   if (val & PCA9450_REG_PWRCTRL_TOFF_DEB) {
+   pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x14);
+   pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x14);
+   } else {
+   pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x18);
+   pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x18);
+   }
 
/* I2C_LT_EN*/
pmic_reg_write(dev, 0xa, 0x3);
-- 
2.37.1



[PATCH v1 3/4] DTS: imx93: modify the BUCK1 voltage range

2023-06-05 Thread Joy Zou
The new pmic trimed BUCK1. So need to modify the range.
There is no LDO2 and LDO3, So need to delete the property.

Signed-off-by: Joy Zou 
---
 arch/arm/dts/imx93-11x11-evk.dts | 20 ++--
 1 file changed, 2 insertions(+), 18 deletions(-)

diff --git a/arch/arm/dts/imx93-11x11-evk.dts b/arch/arm/dts/imx93-11x11-evk.dts
index b3a5a3d71e..ceab56a5d8 100644
--- a/arch/arm/dts/imx93-11x11-evk.dts
+++ b/arch/arm/dts/imx93-11x11-evk.dts
@@ -141,8 +141,8 @@
regulators {
buck1: BUCK1 {
regulator-name = "BUCK1";
-   regulator-min-microvolt = <60>;
-   regulator-max-microvolt = <2187500>;
+   regulator-min-microvolt = <65>;
+   regulator-max-microvolt = <2237500>;
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <3125>;
@@ -189,22 +189,6 @@
regulator-always-on;
};
 
-   ldo2: LDO2 {
-   regulator-name = "LDO2";
-   regulator-min-microvolt = <80>;
-   regulator-max-microvolt = <115>;
-   regulator-boot-on;
-   regulator-always-on;
-   };
-
-   ldo3: LDO3 {
-   regulator-name = "LDO3";
-   regulator-min-microvolt = <80>;
-   regulator-max-microvolt = <330>;
-   regulator-boot-on;
-   regulator-always-on;
-   };
-
ldo4: LDO4 {
regulator-name = "LDO4";
regulator-min-microvolt = <80>;
-- 
2.37.1



[PATCH v1 0/4] support trimed pca9450 new pmic

2023-06-05 Thread Joy Zou
The patchset supports trim pmic pca9451a.
For the details, please check the patch commit log

Joy Zou (4):
  power: pmic: Modify the BUCK1 voltage range
  imx: imx93_evk: change VDD_SOC for new pmic trimed
  DTS: imx93: modify the BUCK1 voltage range
  configs: enable pmic regulator pca9450

 arch/arm/dts/imx93-11x11-evk.dts  | 20 ++--
 board/freescale/imx93_evk/spl.c   | 16 ++--
 configs/imx93_11x11_evk_defconfig |  2 ++
 drivers/power/regulator/pca9450.c | 29 -
 include/power/pca9450.h   |  2 ++
 5 files changed, 48 insertions(+), 21 deletions(-)

-- 
2.37.1



RE: [EXT] Re: [PATCH v1 3/4] DTS: imx93: modify the BUCK1 voltage range

2023-06-05 Thread Joy Zou

> -Original Message-
> From: Marek Vasut 
> Sent: 2023年6月5日 18:05
> To: Joy Zou ; jh80.ch...@samsung.com; Peng Fan
> ; Ye Li ; Jacky Bai ;
> feste...@denx.de; sba...@denx.de; heiko.thi...@gmail.com
> Cc: u-boot@lists.denx.de; dl-uboot-imx 
> Subject: [EXT] Re: [PATCH v1 3/4] DTS: imx93: modify the BUCK1 voltage range
> 
> Caution: This is an external email. Please take care when clicking links or
> opening attachments. When in doubt, report the message using the 'Report
> this email' button
> 
> 
> On 6/5/23 11:48, Joy Zou wrote:
> 
> ARM: dts: imx93: ...
> (not DTS:)
Okay, thanks!
Will change it in patch v2.
> 
> > The new pmic trimed BUCK1. So need to modify the range.
> > There is no LDO2 and LDO3, So need to delete the property.
> >
> > Signed-off-by: Joy Zou 
> > ---
> >   arch/arm/dts/imx93-11x11-evk.dts | 20 ++--
> >   1 file changed, 2 insertions(+), 18 deletions(-)
> >
> > diff --git a/arch/arm/dts/imx93-11x11-evk.dts
> > b/arch/arm/dts/imx93-11x11-evk.dts
> > index b3a5a3d71e..ceab56a5d8 100644
> > --- a/arch/arm/dts/imx93-11x11-evk.dts
> > +++ b/arch/arm/dts/imx93-11x11-evk.dts
> > @@ -141,8 +141,8 @@
> >   regulators {
> >   buck1: BUCK1 {
> >   regulator-name = "BUCK1";
> > - regulator-min-microvolt = <60>;
> > - regulator-max-microvolt = <2187500>;
> > + regulator-min-microvolt = <65>;
> > + regulator-max-microvolt = <2237500>;
> 
> Where does this patch come from ? Linux ? If Linux, then include commit hash
> of that commit from Linux kernel in the commit message. If not from Linux,
> why is there no matching fix in Linux ?
This patch com from linux. I will add commit hash form Linux kernel.
Thanks!
BR
Joy zou 


RE: [EXT] Re: [PATCH v1 1/4] power: pmic: Modify the BUCK1 voltage range

2023-06-05 Thread Joy Zou

> -Original Message-
> From: Marek Vasut 
> Sent: 2023年6月5日 18:07
> To: Joy Zou ; jh80.ch...@samsung.com; Peng Fan
> ; Ye Li ; Jacky Bai ;
> feste...@denx.de; sba...@denx.de; heiko.thi...@gmail.com
> Cc: u-boot@lists.denx.de; dl-uboot-imx 
> Subject: [EXT] Re: [PATCH v1 1/4] power: pmic: Modify the BUCK1 voltage
> range
> 
> Caution: This is an external email. Please take care when clicking links or
> opening attachments. When in doubt, report the message using the 'Report
> this email' button
> 
> 
> On 6/5/23 11:48, Joy Zou wrote:
> > The new pmic trimed BUCK1. So need to modify the range.
> > The default value of Toff_Deb is used to distinguish the old and new pmic.
> 
> [...]
> 
> > +++ b/include/power/pca9450.h
> > @@ -63,6 +63,8 @@ enum {
> >   NXP_CHIP_TYPE_AMOUNT
> >   };
> >
> > +#define PCA9450_REG_PWRCTRL_TOFF_DEBBIT(5)
> > +
> >   #define PCA9450_DVS_BUCK_RUN_MASK   0x7f
> >   #define PCA9450_LDO12_MASK  0x07
> >   #define PCA9450_LDO34_MASK  0x1f
> 
> Shouldn't there be a new DT compatible, 'nxp,pca9451a' somewhere ?
> Like e.g. in drivers/power/pmic/pca9450.c ?
Hi Marek,
The file drivers/power/pmic/pca9450.c and DT compatible 'nxp,pca9451a' already 
exists. 
Recently, the BUCK1 of the PMIC pca9451a is trimmed. So need to update.
Thanks!
BR
Joy Zou


RE: [EXT] Re: [PATCH v1 4/4] configs: enable pmic regulator pca9450

2023-06-05 Thread Joy Zou

> -Original Message-
> From: Marek Vasut 
> Sent: 2023年6月5日 18:04
> To: Joy Zou ; jh80.ch...@samsung.com; Peng Fan
> ; Ye Li ; Jacky Bai ;
> feste...@denx.de; sba...@denx.de; heiko.thi...@gmail.com
> Cc: u-boot@lists.denx.de; dl-uboot-imx 
> Subject: [EXT] Re: [PATCH v1 4/4] configs: enable pmic regulator pca9450
> 
> Caution: This is an external email. Please take care when clicking links or
> opening attachments. When in doubt, report the message using the 'Report
> this email' button
> 
> 
> On 6/5/23 11:48, Joy Zou wrote:
> > support pmci regulator pca9450.
> 
> Subject should be something like
> 
> ARM: imx: Enable PCA9450 on i.MX93 11x11 EVK
> 
> Otherwise the subject is horribly generic and confusing.
Okay, Thanks!
Will change it in patch v2.
BR
Joy zou


RE: [EXT] Re: [PATCH v1 2/4] imx: imx93_evk: change VDD_SOC for new pmic trimed

2023-06-05 Thread Joy Zou

> -Original Message-
> From: Marek Vasut 
> Sent: 2023年6月5日 18:06
> To: Joy Zou ; jh80.ch...@samsung.com; Peng Fan
> ; Ye Li ; Jacky Bai ;
> feste...@denx.de; sba...@denx.de; heiko.thi...@gmail.com
> Cc: u-boot@lists.denx.de; dl-uboot-imx 
> Subject: [EXT] Re: [PATCH v1 2/4] imx: imx93_evk: change VDD_SOC for new
> pmic trimed
> 
> Caution: This is an external email. Please take care when clicking links or
> opening attachments. When in doubt, report the message using the 'Report
> this email' button
> 
> 
> On 6/5/23 11:48, Joy Zou wrote:
> 
> Tags are
> ARM: imx:
> 
> > Change VDD_SOC into 0.9v for over drive mode for new pmic.
> 
> 0.9V , V in caps
> PMIC in caps
Okay, Thanks!
Will change in patch v2.
BR
Joy Zou
> 
> > Signed-off-by: Joy Zou 
> > ---
> >   board/freescale/imx93_evk/spl.c | 16 ++--
> >   1 file changed, 14 insertions(+), 2 deletions(-)
> >
> > diff --git a/board/freescale/imx93_evk/spl.c
> > b/board/freescale/imx93_evk/spl.c index 1aa2977b40..f0dbd0f0a5 100644
> > --- a/board/freescale/imx93_evk/spl.c
> > +++ b/board/freescale/imx93_evk/spl.c
> > @@ -55,6 +55,7 @@ int power_init_board(void)
> >   {
> >   struct udevice *dev;
> >   int ret;
> > + unsigned int val = 0;
> >
> >   ret = pmic_get("pmic@25", );
> >   if (ret == -ENODEV) {
> > @@ -64,13 +65,24 @@ int power_init_board(void)
> >   if (ret != 0)
> >   return ret;
> 
> [...]


RE: [EXT] Re: [PATCH v1 3/4] DTS: imx93: modify the BUCK1 voltage range

2023-06-06 Thread Joy Zou

> -Original Message-
> From: Marek Vasut 
> Sent: 2023年6月6日 17:28
> To: Joy Zou ; jh80.ch...@samsung.com; Peng Fan
> ; Ye Li ; Jacky Bai ;
> feste...@denx.de; sba...@denx.de; heiko.thi...@gmail.com
> Cc: u-boot@lists.denx.de; dl-uboot-imx 
> Subject: Re: [EXT] Re: [PATCH v1 3/4] DTS: imx93: modify the BUCK1 voltage
> range
> 
> Caution: This is an external email. Please take care when clicking links or
> opening attachments. When in doubt, report the message using the 'Report
> this email' button
> 
> 
> On 6/6/23 08:09, Joy Zou wrote:
> >
> >> -Original Message-
> >> From: Joy Zou
> >> Sent: 2023年6月5日 18:24
> >> To: Marek Vasut ; jh80.ch...@samsung.com; Peng Fan
> >> ; Ye Li ; Jacky Bai
> >> ; feste...@denx.de; sba...@denx.de;
> >> heiko.thi...@gmail.com
> >> Cc: u-boot@lists.denx.de; dl-uboot-imx 
> >> Subject: RE: [EXT] Re: [PATCH v1 3/4] DTS: imx93: modify the BUCK1
> >> voltage range
> >>
> >>
> >>> -Original Message-
> >>> From: Marek Vasut 
> >>> Sent: 2023年6月5日 18:05
> >>> To: Joy Zou ; jh80.ch...@samsung.com; Peng Fan
> >>> ; Ye Li ; Jacky Bai
> >>> ; feste...@denx.de; sba...@denx.de;
> >>> heiko.thi...@gmail.com
> >>> Cc: u-boot@lists.denx.de; dl-uboot-imx 
> >>> Subject: [EXT] Re: [PATCH v1 3/4] DTS: imx93: modify the BUCK1
> >>> voltage range
> >>>
> >>> Caution: This is an external email. Please take care when clicking
> >>> links or opening attachments. When in doubt, report the message
> >>> using the 'Report this email' button
> >>>
> >>>
> >>> On 6/5/23 11:48, Joy Zou wrote:
> >>>
> >>> ARM: dts: imx93: ...
> >>> (not DTS:)
> >> Okay, thanks!
> >> Will change it in patch v2.
> >>>
> >>>> The new pmic trimed BUCK1. So need to modify the range.
> >>>> There is no LDO2 and LDO3, So need to delete the property.
> >>>>
> >>>> Signed-off-by: Joy Zou 
> >>>> ---
> >>>>arch/arm/dts/imx93-11x11-evk.dts | 20 ++--
> >>>>1 file changed, 2 insertions(+), 18 deletions(-)
> >>>>
> >>>> diff --git a/arch/arm/dts/imx93-11x11-evk.dts
> >>>> b/arch/arm/dts/imx93-11x11-evk.dts
> >>>> index b3a5a3d71e..ceab56a5d8 100644
> >>>> --- a/arch/arm/dts/imx93-11x11-evk.dts
> >>>> +++ b/arch/arm/dts/imx93-11x11-evk.dts
> >>>> @@ -141,8 +141,8 @@
> >>>>regulators {
> >>>>buck1: BUCK1 {
> >>>>regulator-name = "BUCK1";
> >>>> - regulator-min-microvolt = <60>;
> >>>> - regulator-max-microvolt = <2187500>;
> >>>> + regulator-min-microvolt = <65>;
> >>>> + regulator-max-microvolt =
> <2237500>;
> >>>
> >>> Where does this patch come from ? Linux ? If Linux, then include
> >>> commit hash of that commit from Linux kernel in the commit message.
> >>> If not from Linux, why is there no matching fix in Linux ?
> >> This patch com from linux. I will add commit hash form Linux kernel.
> >> Thanks!
> > I am sorry! Please ignore the previous reply. This patch only come from my
> local linux kernel.
> > The linux kernel patch also is reviewing.
> > So I need add commit hash after the linux kernel patch accepted?
> 
> Link to lore.kernel.org would be fine too.
Okay,Thanks!
BR
Joy Zou


RE: [EXT] Re: [PATCH v1 3/4] DTS: imx93: modify the BUCK1 voltage range

2023-06-06 Thread Joy Zou

> -Original Message-
> From: Joy Zou
> Sent: 2023年6月5日 18:24
> To: Marek Vasut ; jh80.ch...@samsung.com; Peng Fan
> ; Ye Li ; Jacky Bai ;
> feste...@denx.de; sba...@denx.de; heiko.thi...@gmail.com
> Cc: u-boot@lists.denx.de; dl-uboot-imx 
> Subject: RE: [EXT] Re: [PATCH v1 3/4] DTS: imx93: modify the BUCK1 voltage
> range
> 
> 
> > -Original Message-
> > From: Marek Vasut 
> > Sent: 2023年6月5日 18:05
> > To: Joy Zou ; jh80.ch...@samsung.com; Peng Fan
> > ; Ye Li ; Jacky Bai
> > ; feste...@denx.de; sba...@denx.de;
> > heiko.thi...@gmail.com
> > Cc: u-boot@lists.denx.de; dl-uboot-imx 
> > Subject: [EXT] Re: [PATCH v1 3/4] DTS: imx93: modify the BUCK1 voltage
> > range
> >
> > Caution: This is an external email. Please take care when clicking
> > links or opening attachments. When in doubt, report the message using
> > the 'Report this email' button
> >
> >
> > On 6/5/23 11:48, Joy Zou wrote:
> >
> > ARM: dts: imx93: ...
> > (not DTS:)
> Okay, thanks!
> Will change it in patch v2.
> >
> > > The new pmic trimed BUCK1. So need to modify the range.
> > > There is no LDO2 and LDO3, So need to delete the property.
> > >
> > > Signed-off-by: Joy Zou 
> > > ---
> > >   arch/arm/dts/imx93-11x11-evk.dts | 20 ++--
> > >   1 file changed, 2 insertions(+), 18 deletions(-)
> > >
> > > diff --git a/arch/arm/dts/imx93-11x11-evk.dts
> > > b/arch/arm/dts/imx93-11x11-evk.dts
> > > index b3a5a3d71e..ceab56a5d8 100644
> > > --- a/arch/arm/dts/imx93-11x11-evk.dts
> > > +++ b/arch/arm/dts/imx93-11x11-evk.dts
> > > @@ -141,8 +141,8 @@
> > >   regulators {
> > >   buck1: BUCK1 {
> > >   regulator-name = "BUCK1";
> > > - regulator-min-microvolt = <60>;
> > > - regulator-max-microvolt = <2187500>;
> > > + regulator-min-microvolt = <65>;
> > > + regulator-max-microvolt = <2237500>;
> >
> > Where does this patch come from ? Linux ? If Linux, then include
> > commit hash of that commit from Linux kernel in the commit message. If
> > not from Linux, why is there no matching fix in Linux ?
> This patch com from linux. I will add commit hash form Linux kernel.
> Thanks!
I am sorry! Please ignore the previous reply. This patch only come from my 
local linux kernel.
The linux kernel patch also is reviewing. 
So I need add commit hash after the linux kernel patch accepted?
Thanks !
BR
Joy Zou
> BR
> Joy zou


RE: [EXT] Re: [PATCH v2 1/3] drivers: rtc: add pcf2131 rtc driver

2023-12-13 Thread Joy Zou
Okay,Thanks your kind reminder!

BR
Joy Zou

> -Original Message-
> From: Fabio Estevam 
> Sent: 2023年12月14日 4:07
> To: Joy Zou 
> Cc: Fabio Estevam ; Chris Packham
> ; Peng Fan ;
> sap...@gmail.com; Stefano Babic ; Simon Glass
> ; U-Boot-Denx ; dl-uboot-imx
> ; Ye Li 
> Subject: [EXT] Re: [PATCH v2 1/3] drivers: rtc: add pcf2131 rtc driver
> 
> Caution: This is an external email. Please take care when clicking links or
> opening attachments. When in doubt, report the message using the 'Report
> this email' button
> 
> 
> Hi Joy,
> 
> In Linux, the pcf2131 rtc is handled by the pcf2127 driver.
> 
> I suggest we do the same in U-Boot. Thanks


RE: [EXT] Re: [PATCH v3 2/3] imx: imx93_evk: add rtc pcf2131

2024-03-26 Thread Joy Zou

> -Original Message-
> From: Fabio Estevam 
> Sent: 2024年3月27日 6:14
> To: Joy Zou 
> Cc: Peng Fan ; Ye Li ; Jacky Bai
> ; sba...@denx.de; s...@chromium.org;
> sap...@gmail.com; judge.pack...@gmail.com; dl-uboot-imx
> ; u-boot@lists.denx.de
> Subject: [EXT] Re: [PATCH v3 2/3] imx: imx93_evk: add rtc pcf2131
> 
> Caution: This is an external email. Please take care when clicking links or
> opening attachments. When in doubt, report the message using the 'Report
> this email' button
> 
> 
> On Tue, Mar 26, 2024 at 12:30 AM Joy Zou  wrote:
> 
> > + {
> > +   #address-cells = <1>;
> > +   #size-cells = <0>;
> > +   clock-frequency = <40>;
> > +   pinctrl-names = "default", "sleep";
> > +   pinctrl-0 = <_lpi2c3>;
> > +   pinctrl-1 = <_lpi2c3>;
> > +   status = "okay";
> > +
> > +   pcf2131: rtc@53 {
> > +   compatible = "nxp,pcf2131";
> > +   reg = <0x53>;
> > +   interrupt-parent = <>;
> > +   interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
> > +   status = "okay";
> 
> Please submit the RTC support to Linux first, then you can sync the devicetree
> with Linux in U-Boot.
> 
> In the meantime, you can add the RTC support to the -u-boot.dtsi.
> 
> Please consider using OF_UPSTREAM available in the U-Boot next branch.

Will submit the RTC support patch to Linux firstly.
Thanks for your comments!
BR
Joy Zou


RE: [EXT] Re: [PATCH v3 1/3] drivers: rtc: add pcf2131 rtc driver

2024-03-26 Thread Joy Zou
> -Original Message-
> From: Fabio Estevam 
> Sent: 2024年3月27日 6:10
> To: Joy Zou 
> Cc: Peng Fan ; Ye Li ; Jacky Bai
> ; sba...@denx.de; s...@chromium.org;
> sap...@gmail.com; judge.pack...@gmail.com; dl-uboot-imx
> ; u-boot@lists.denx.de
> Subject: [EXT] Re: [PATCH v3 1/3] drivers: rtc: add pcf2131 rtc driver
> 
> Caution: This is an external email. Please take care when clicking links or
> opening attachments. When in doubt, report the message using the 'Report
> this email' button
> 
> 
> On Tue, Mar 26, 2024 at 12:30 AM Joy Zou  wrote:
> 
> > +bool is_pcf2131_type(struct udevice *dev)
> 
> static bool
Will add static key word!
> 
> >  static int pcf2127_rtc_read(struct udevice *dev, uint offset, u8
> > *buffer, uint len)  {
> > struct dm_i2c_chip *chip = dev_get_parent_plat(dev); @@
> -43,10
> > +75,64 @@ static int pcf2127_rtc_read(struct udevice *dev, uint offset, u8
> *buffer, uint l
> > return dm_i2c_xfer(dev, , 1);  }
> >
> > +static int pcf2131_rtc_lock(struct udevice *dev) {
> > +   int ret = 0;
> 
> No need to initialize ret with 0.
Will remove initialization 0.
> 
> > +static int pcf2131_rtc_unlock(struct udevice *dev) {
> > +   int ret = 0;
> 
> Ditto.
> 
> >  static int pcf2127_rtc_write(struct udevice *dev, uint offset,
> >  const u8 *buffer, uint len)  {
> > -   return dm_i2c_write(dev, offset, buffer, len);
> > +   int ret = 0;
> 
> Ditto.
Will remove initialization 0.
Thanks for your comments!
BR
Joy Zou


RE: [EXT] Re: [PATCH v3 3/3] configs: Enable RTC pcf2131 support

2024-03-26 Thread Joy Zou

> -Original Message-
> From: Fabio Estevam 
> Sent: 2024年3月27日 6:12
> To: Joy Zou 
> Cc: Peng Fan ; Ye Li ; Jacky Bai
> ; sba...@denx.de; s...@chromium.org;
> sap...@gmail.com; judge.pack...@gmail.com; dl-uboot-imx
> ; u-boot@lists.denx.de
> Subject: [EXT] Re: [PATCH v3 3/3] configs: Enable RTC pcf2131 support
> 
> Caution: This is an external email. Please take care when clicking links or
> opening attachments. When in doubt, report the message using the 'Report
> this email' button
> 
> 
> On Tue, Mar 26, 2024 at 12:30 AM Joy Zou  wrote:
> >
> > Enable CONFIG_RTC_PCF2127 configs to support pcf2131.
> 
> Subject should  be imx93_11x11_evk specific:
> 
> imx93_11x11_evk: Add PCF2131 RTC support
Will modify the Subject.
Thanks for your comments!

BR
Joy Zou


[PATCH v4 1/3] drivers: rtc: add pcf2131 rtc driver

2024-04-07 Thread Joy Zou
Adding support for pcf2131 RTC chip.

The pcf2131 is similar to the pcf2127. The driver support rtc register
read/write by using rtc cmd and rtc date set/get by using date cmd.

The pcf2131 is special when write access to time registers. it requires
setting the STOP and CPR bits. STOP bit needs to be cleared after time
registers are updated.

Signed-off-by: Joy Zou 
---
Changes in v4:
1. Add static keyword for the is_pcf2131_type function.
2. remove unnecessary ret initialization.

Changes in v3:
1.merge pcf2131 into pcf2127 in order to keep same with kernel.

Changes in v2:
1. delete the unnecessary initialization.
2. retrun directly function insteand of redundancy return ret.
3. delete the unnecessary comment line.
---
 drivers/rtc/pcf2127.c | 146 ++
 1 file changed, 132 insertions(+), 14 deletions(-)

diff --git a/drivers/rtc/pcf2127.c b/drivers/rtc/pcf2127.c
index 2f3fafb496..2b000347f8 100644
--- a/drivers/rtc/pcf2127.c
+++ b/drivers/rtc/pcf2127.c
@@ -23,6 +23,38 @@
 #define PCF2127_REG_MO 0x08
 #define PCF2127_REG_YR 0x09
 
+#define PCF2131_REG_CTRL1   0x00
+#define PCF2131_BIT_CTRL1_STOP  BIT(5)
+#define PCF2131_REG_SR_RESET0x05
+#define PCF2131_SR_VAL_Clr_Pres 0xa4
+#define PCF2131_REG_SC  0x07
+#define PCF2131_REG_MN  0x08
+#define PCF2131_REG_HR  0x09
+#define PCF2131_REG_DM  0x0a
+#define PCF2131_REG_DW  0x0b
+#define PCF2131_REG_MO  0x0c
+#define PCF2131_REG_YR  0x0d
+
+enum {
+   NXP_CHIP_TYPE_PCF2127 = 0,
+   NXP_CHIP_TYPE_PCF2129,
+   NXP_CHIP_TYPE_PCA2129,
+   NXP_CHIP_TYPE_PCF2131,
+   NXP_CHIP_TYPE_AMOUNT
+};
+
+static bool is_pcf2131_type(struct udevice *dev)
+{
+   int type;
+
+   type = dev_get_driver_data(dev);
+
+   if (type == NXP_CHIP_TYPE_PCF2131)
+   return true;
+   else
+   return false;
+}
+
 static int pcf2127_rtc_read(struct udevice *dev, uint offset, u8 *buffer, uint 
len)
 {
struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
@@ -43,10 +75,64 @@ static int pcf2127_rtc_read(struct udevice *dev, uint 
offset, u8 *buffer, uint l
return dm_i2c_xfer(dev, , 1);
 }
 
+static int pcf2131_rtc_lock(struct udevice *dev)
+{
+   int ret;
+   uchar buf[6] = { PCF2131_REG_CTRL1 };
+
+   ret = pcf2127_rtc_read(dev, PCF2131_REG_CTRL1, buf, sizeof(buf));
+   if (ret < 0)
+   return ret;
+
+   buf[PCF2131_REG_CTRL1] |= PCF2131_BIT_CTRL1_STOP;
+   ret = dm_i2c_write(dev, PCF2131_REG_CTRL1, [PCF2131_REG_CTRL1], 1);
+   if (ret < 0)
+   return ret;
+
+   buf[PCF2131_REG_SR_RESET] = PCF2131_SR_VAL_Clr_Pres;
+
+   return dm_i2c_write(dev, PCF2131_REG_SR_RESET, 
[PCF2131_REG_SR_RESET], 1);
+}
+
+static int pcf2131_rtc_unlock(struct udevice *dev)
+{
+   int ret;
+   uchar buf[6] = { PCF2131_REG_CTRL1 };
+
+   ret = pcf2127_rtc_read(dev, PCF2131_REG_CTRL1, buf, sizeof(buf));
+   if (ret < 0)
+   return ret;
+
+   buf[PCF2131_REG_CTRL1] &= ~PCF2131_BIT_CTRL1_STOP;
+   return dm_i2c_write(dev, PCF2131_REG_CTRL1, [PCF2131_REG_CTRL1], 1);
+}
+
 static int pcf2127_rtc_write(struct udevice *dev, uint offset,
 const u8 *buffer, uint len)
 {
-   return dm_i2c_write(dev, offset, buffer, len);
+   int ret;
+   bool flag;
+
+   flag = is_pcf2131_type(dev);
+   if (flag) {
+   ret = pcf2131_rtc_lock(dev);
+   if (ret < 0)
+   return ret;
+   }
+
+   ret = dm_i2c_write(dev, offset, buffer, len);
+   if (ret < 0) {
+   if (flag)
+   pcf2131_rtc_unlock(dev);
+   return ret;
+   }
+
+   if (flag) {
+   ret = pcf2131_rtc_unlock(dev);
+   if (ret < 0)
+   return ret;
+   }
+   return ret;
 }
 
 static int pcf2127_rtc_set(struct udevice *dev, const struct rtc_time *tm)
@@ -68,15 +154,19 @@ static int pcf2127_rtc_set(struct udevice *dev, const 
struct rtc_time *tm)
buf[i++] = bin2bcd(tm->tm_year % 100);
 
/* write register's data */
-   ret = dm_i2c_write(dev, PCF2127_REG_SC, buf, i);
+   if (is_pcf2131_type(dev))
+   ret = pcf2127_rtc_write(dev, PCF2131_REG_SC, buf, i);
+   else
+   ret = pcf2127_rtc_write(dev, PCF2127_REG_SC, buf, i);
 
return ret;
 }
 
 static int pcf2127_rtc_get(struct udevice *dev, struct rtc_time *tm)
 {
-   int ret = 0;
-   uchar buf[10] = { PCF2127_REG_CTRL1 };
+   int ret;
+   bool flag;
+   uchar buf[14] = { PCF2127_REG_CTRL1 };
 
ret = pcf2127_rtc_read(dev, PCF2127_REG_CTRL1, buf, sizeof(buf));
if (ret < 0)
@@ -85,15 +175,28 @@ static int pcf2127_rtc_get(struct udevice *dev, struct 
r

[PATCH v4 2/3] imx: imx93_evk: add rtc PCF2131

2024-04-07 Thread Joy Zou
support rtc PCF2131 for imx93.

Signed-off-by: Joy Zou 
---
Changes in v4:
1. remove arch/arm/dts/imx93_11x11_evk.dts change because it can sync from 
kernel dts.
2. add the RTC support to the -u-boot.dtsi.
3. assign the rtc0 to rtc@53 in order to avoid date reset fail.

Changes in v3:
1. remove arch/arm/dts/imx93.dtsi modification because this change have existed.

Changes in v2:
1. use the flag bootph-pre-ram instead of uboot,dm-spl.
---
 arch/arm/dts/imx93-11x11-evk-u-boot.dtsi | 34 
 1 file changed, 34 insertions(+)

diff --git a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi 
b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
index a99ba99bfb..85aaf0844f 100644
--- a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
@@ -19,6 +19,11 @@
method = "smc";
};
};
+
+   aliases {
+   rtc0 = 
+   };
+
 };
 
 &{/soc@0} {
@@ -112,6 +117,25 @@
bootph-some-ram;
 };
 
+ {
+   bootph-pre-ram;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   clock-frequency = <40>;
+   pinctrl-names = "default", "sleep";
+   pinctrl-0 = <_lpi2c3>;
+   pinctrl-1 = <_lpi2c3>;
+   status = "okay";
+
+   pcf2131: rtc@53 {
+   compatible = "nxp,pcf2131";
+   reg = <0x53>;
+   interrupt-parent = <>;
+   interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
+   status = "okay";
+   };
+};
+
 &{/soc@0/bus@4400/i2c@4435/pmic@25} {
bootph-pre-ram;
bootph-some-ram;
@@ -127,6 +151,16 @@
bootph-some-ram;
 };
 
+ {
+   pinctrl_lpi2c3: lpi2c3grp {
+   bootph-pre-ram;
+   fsl,pins = <
+   MX93_PAD_GPIO_IO28__LPI2C3_SDA  
0x4b9e
+   MX93_PAD_GPIO_IO29__LPI2C3_SCL  
0x4b9e
+   >;
+   };
+};
+
  {
phy-reset-gpios = < 16 GPIO_ACTIVE_LOW>;
phy-reset-duration = <15>;
-- 
2.37.1



[PATCH v4 3/3] imx93_11x11_evk: Add PCF2131 RTC support

2024-04-07 Thread Joy Zou
Enable CONFIG_RTC_PCF2127 configs to support pcf2131.

Signed-off-by: Joy Zou 
---
Changes in v3:
1. Change CONFIG_RTC_PCF2131 into CONFIG_RTC_PCF2127 because the pcf2131
driver have been merged into the pcf2127.
---
 configs/imx93_11x11_evk_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/imx93_11x11_evk_defconfig 
b/configs/imx93_11x11_evk_defconfig
index 63613477c7..55e2673291 100644
--- a/configs/imx93_11x11_evk_defconfig
+++ b/configs/imx93_11x11_evk_defconfig
@@ -14,6 +14,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx93-11x11-evk"
 CONFIG_SPL_TEXT_BASE=0x2049A000
 CONFIG_TARGET_IMX93_11X11_EVK=y
 CONFIG_SYS_MONITOR_LEN=524288
+CONFIG_RTC_PCF2127=y
 CONFIG_SPL_SERIAL=y
 CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL_STACK=0x20519dd0
-- 
2.37.1



[PATCH v4 0/3] Add pcf2131 rtc support

2024-04-07 Thread Joy Zou
The patchset supports pcf2131 rtc.
For the details, please check the patch commit log.

Joy Zou (3):
  drivers: rtc: add pcf2131 rtc driver
  imx: imx93_evk: add rtc PCF2131
  imx93_11x11_evk: Add PCF2131 RTC support

 arch/arm/dts/imx93-11x11-evk-u-boot.dtsi |  34 ++
 configs/imx93_11x11_evk_defconfig|   1 +
 drivers/rtc/pcf2127.c| 146 ---
 3 files changed, 167 insertions(+), 14 deletions(-)

-- 
2.37.1



[PATCH v3 1/3] drivers: rtc: add pcf2131 rtc driver

2024-03-26 Thread Joy Zou
Adding support for pcf2131 RTC chip.

The pcf2131 is similar to the pcf2127. The driver support rtc register
read/write by using rtc cmd and rtc date set/get by using date cmd.

The pcf2131 is special when write access to time registers. it requires
setting the STOP and CPR bits. STOP bit needs to be cleared after time
registers are updated.

Signed-off-by: Joy Zou 
---
Changes in v3:
1.merge pcf2131 into pcf2127 in order to keep same with kernel.

Changes in v2:
1. delete the unnecessary initialization.
2. retrun directly function insteand of redundancy return ret.
3. delete the unnecessary comment line.
---
 drivers/rtc/pcf2127.c | 144 ++
 1 file changed, 131 insertions(+), 13 deletions(-)

diff --git a/drivers/rtc/pcf2127.c b/drivers/rtc/pcf2127.c
index 2f3fafb496..58ab5a8601 100644
--- a/drivers/rtc/pcf2127.c
+++ b/drivers/rtc/pcf2127.c
@@ -23,6 +23,38 @@
 #define PCF2127_REG_MO 0x08
 #define PCF2127_REG_YR 0x09
 
+#define PCF2131_REG_CTRL1   0x00
+#define PCF2131_BIT_CTRL1_STOP  BIT(5)
+#define PCF2131_REG_SR_RESET0x05
+#define PCF2131_SR_VAL_Clr_Pres 0xa4
+#define PCF2131_REG_SC  0x07
+#define PCF2131_REG_MN  0x08
+#define PCF2131_REG_HR  0x09
+#define PCF2131_REG_DM  0x0a
+#define PCF2131_REG_DW  0x0b
+#define PCF2131_REG_MO  0x0c
+#define PCF2131_REG_YR  0x0d
+
+enum {
+   NXP_CHIP_TYPE_PCF2127 = 0,
+   NXP_CHIP_TYPE_PCF2129,
+   NXP_CHIP_TYPE_PCA2129,
+   NXP_CHIP_TYPE_PCF2131,
+   NXP_CHIP_TYPE_AMOUNT
+};
+
+bool is_pcf2131_type(struct udevice *dev)
+{
+   int type;
+
+   type = dev_get_driver_data(dev);
+
+   if (type == NXP_CHIP_TYPE_PCF2131)
+   return true;
+   else
+   return false;
+}
+
 static int pcf2127_rtc_read(struct udevice *dev, uint offset, u8 *buffer, uint 
len)
 {
struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
@@ -43,10 +75,64 @@ static int pcf2127_rtc_read(struct udevice *dev, uint 
offset, u8 *buffer, uint l
return dm_i2c_xfer(dev, , 1);
 }
 
+static int pcf2131_rtc_lock(struct udevice *dev)
+{
+   int ret = 0;
+   uchar buf[6] = { PCF2131_REG_CTRL1 };
+
+   ret = pcf2127_rtc_read(dev, PCF2131_REG_CTRL1, buf, sizeof(buf));
+   if (ret < 0)
+   return ret;
+
+   buf[PCF2131_REG_CTRL1] |= PCF2131_BIT_CTRL1_STOP;
+   ret = dm_i2c_write(dev, PCF2131_REG_CTRL1, [PCF2131_REG_CTRL1], 1);
+   if (ret < 0)
+   return ret;
+
+   buf[PCF2131_REG_SR_RESET] = PCF2131_SR_VAL_Clr_Pres;
+
+   return dm_i2c_write(dev, PCF2131_REG_SR_RESET, 
[PCF2131_REG_SR_RESET], 1);
+}
+
+static int pcf2131_rtc_unlock(struct udevice *dev)
+{
+   int ret = 0;
+   uchar buf[6] = { PCF2131_REG_CTRL1 };
+
+   ret = pcf2127_rtc_read(dev, PCF2131_REG_CTRL1, buf, sizeof(buf));
+   if (ret < 0)
+   return ret;
+
+   buf[PCF2131_REG_CTRL1] &= ~PCF2131_BIT_CTRL1_STOP;
+   return dm_i2c_write(dev, PCF2131_REG_CTRL1, [PCF2131_REG_CTRL1], 1);
+}
+
 static int pcf2127_rtc_write(struct udevice *dev, uint offset,
 const u8 *buffer, uint len)
 {
-   return dm_i2c_write(dev, offset, buffer, len);
+   int ret = 0;
+   bool flag;
+
+   flag = is_pcf2131_type(dev);
+   if (flag) {
+   ret = pcf2131_rtc_lock(dev);
+   if (ret < 0)
+   return ret;
+   }
+
+   ret = dm_i2c_write(dev, offset, buffer, len);
+   if (ret < 0) {
+   if (flag)
+   pcf2131_rtc_unlock(dev);
+   return ret;
+   }
+
+   if (flag) {
+   ret = pcf2131_rtc_unlock(dev);
+   if (ret < 0)
+   return ret;
+   }
+   return ret;
 }
 
 static int pcf2127_rtc_set(struct udevice *dev, const struct rtc_time *tm)
@@ -68,7 +154,10 @@ static int pcf2127_rtc_set(struct udevice *dev, const 
struct rtc_time *tm)
buf[i++] = bin2bcd(tm->tm_year % 100);
 
/* write register's data */
-   ret = dm_i2c_write(dev, PCF2127_REG_SC, buf, i);
+   if (is_pcf2131_type(dev))
+   ret = pcf2127_rtc_write(dev, PCF2131_REG_SC, buf, i);
+   else
+   ret = pcf2127_rtc_write(dev, PCF2127_REG_SC, buf, i);
 
return ret;
 }
@@ -76,7 +165,8 @@ static int pcf2127_rtc_set(struct udevice *dev, const struct 
rtc_time *tm)
 static int pcf2127_rtc_get(struct udevice *dev, struct rtc_time *tm)
 {
int ret = 0;
-   uchar buf[10] = { PCF2127_REG_CTRL1 };
+   bool flag;
+   uchar buf[14] = { PCF2127_REG_CTRL1 };
 
ret = pcf2127_rtc_read(dev, PCF2127_REG_CTRL1, buf, sizeof(buf));
if (ret < 0)
@@ -85,15 +175,28 @@ static int pcf2127_rtc_get(struct udevice *dev, struct 
rtc_time *tm)
if (b

[PATCH v3 0/3] Add pcf2131 rtc support

2024-03-26 Thread Joy Zou
The patchset supports pcf2131 rtc.
For the details, please check the patch commit log.

Joy Zou (3):
  drivers: rtc: add pcf2131 rtc driver
  imx: imx93_evk: add rtc pcf2131
  configs: Enable RTC pcf2131 support

 arch/arm/dts/imx93-11x11-evk-u-boot.dtsi |   8 ++
 arch/arm/dts/imx93-11x11-evk.dts |  25 
 configs/imx93_11x11_evk_defconfig|   1 +
 drivers/rtc/pcf2127.c| 144 +--
 4 files changed, 165 insertions(+), 13 deletions(-)

-- 
2.37.1



[PATCH v3 2/3] imx: imx93_evk: add rtc pcf2131

2024-03-26 Thread Joy Zou
support rtc pcf2131 for imx93.

Signed-off-by: Joy Zou 
---
Changes in v3:
1. remove arch/arm/dts/imx93.dtsi modification because this change have existed.

Changes in v2:
1. use the flag bootph-pre-ram instead of uboot,dm-spl.
---
 arch/arm/dts/imx93-11x11-evk-u-boot.dtsi |  8 
 arch/arm/dts/imx93-11x11-evk.dts | 25 
 2 files changed, 33 insertions(+)

diff --git a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi 
b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
index a99ba99bfb..2dbe33f073 100644
--- a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
@@ -112,6 +112,10 @@
bootph-some-ram;
 };
 
+ {
+   bootph-pre-ram;
+};
+
 &{/soc@0/bus@4400/i2c@4435/pmic@25} {
bootph-pre-ram;
bootph-some-ram;
@@ -127,6 +131,10 @@
bootph-some-ram;
 };
 
+_lpi2c3 {
+   bootph-pre-ram;
+};
+
  {
phy-reset-gpios = < 16 GPIO_ACTIVE_LOW>;
phy-reset-duration = <15>;
diff --git a/arch/arm/dts/imx93-11x11-evk.dts b/arch/arm/dts/imx93-11x11-evk.dts
index 4322cc3e11..8b57de3b4c 100644
--- a/arch/arm/dts/imx93-11x11-evk.dts
+++ b/arch/arm/dts/imx93-11x11-evk.dts
@@ -192,6 +192,24 @@
};
 };
 
+ {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   clock-frequency = <40>;
+   pinctrl-names = "default", "sleep";
+   pinctrl-0 = <_lpi2c3>;
+   pinctrl-1 = <_lpi2c3>;
+   status = "okay";
+
+   pcf2131: rtc@53 {
+   compatible = "nxp,pcf2131";
+   reg = <0x53>;
+   interrupt-parent = <>;
+   interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
+   status = "okay";
+   };
+};
+
  { /* console */
pinctrl-names = "default";
pinctrl-0 = <_uart1>;
@@ -254,6 +272,13 @@
>;
};
 
+   pinctrl_lpi2c3: lpi2c3grp {
+   fsl,pins = <
+   MX93_PAD_GPIO_IO28__LPI2C3_SDA  
0x4b9e
+   MX93_PAD_GPIO_IO29__LPI2C3_SCL  
0x4b9e
+   >;
+   };
+
pinctrl_fec: fecgrp {
fsl,pins = <
MX93_PAD_ENET2_MDC__ENET1_MDC   0x57e
-- 
2.37.1



[PATCH v3 3/3] configs: Enable RTC pcf2131 support

2024-03-26 Thread Joy Zou
Enable CONFIG_RTC_PCF2127 configs to support pcf2131.

Signed-off-by: Joy Zou 
---
Changes in v3:
1. Change CONFIG_RTC_PCF2131 into CONFIG_RTC_PCF2127 because the pcf2131
driver have been merged into the pcf2127.
---
 configs/imx93_11x11_evk_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/imx93_11x11_evk_defconfig 
b/configs/imx93_11x11_evk_defconfig
index 63613477c7..55e2673291 100644
--- a/configs/imx93_11x11_evk_defconfig
+++ b/configs/imx93_11x11_evk_defconfig
@@ -14,6 +14,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx93-11x11-evk"
 CONFIG_SPL_TEXT_BASE=0x2049A000
 CONFIG_TARGET_IMX93_11X11_EVK=y
 CONFIG_SYS_MONITOR_LEN=524288
+CONFIG_RTC_PCF2127=y
 CONFIG_SPL_SERIAL=y
 CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL_STACK=0x20519dd0
-- 
2.37.1