from:"patrice.chotard"

[U-Boot] [PATCH v2 6/7] STiH410-B2260: add device tree

2017-02-03 Thread patrice.chotard

From: Patrice Chotard 

This device tree has been extracted from v4.9 kernel

Signed-off-by: Patrice Chotard 
---
 arch/arm/dts/Makefile |2 +
 arch/arm/dts/st-pincfg.h  |   71 ++
 arch/arm/dts/stih407-clock.dtsi   |  326 ++
 arch/arm/dts/stih407-family.dtsi  |  977 +++
 arch/arm/dts/stih407-pinctrl.dtsi | 1303 +
 arch/arm/dts/stih410-b2260.dts|  225 
 arch/arm/dts/stih410-clock.dtsi   |  347 ++
 arch/arm/dts/stih410-pinctrl.dtsi |   34 +
 arch/arm/dts/stih410.dtsi |  454 +++
 drivers/mmc/Kconfig   |2 +-
 include/dt-bindings/clock/stih407-clks.h  |   90 ++
 include/dt-bindings/clock/stih410-clks.h  |   25 +
 include/dt-bindings/interrupt-controller/irq-st.h |   30 +
 include/dt-bindings/mfd/st-lpc.h  |   16 +
 include/dt-bindings/reset/stih407-resets.h|   65 +
 15 files changed, 3966 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/st-pincfg.h
 create mode 100644 arch/arm/dts/stih407-clock.dtsi
 create mode 100644 arch/arm/dts/stih407-family.dtsi
 create mode 100644 arch/arm/dts/stih407-pinctrl.dtsi
 create mode 100644 arch/arm/dts/stih410-b2260.dts
 create mode 100644 arch/arm/dts/stih410-clock.dtsi
 create mode 100644 arch/arm/dts/stih410-pinctrl.dtsi
 create mode 100644 arch/arm/dts/stih410.dtsi
 create mode 100644 include/dt-bindings/clock/stih407-clks.h
 create mode 100644 include/dt-bindings/clock/stih410-clks.h
 create mode 100644 include/dt-bindings/interrupt-controller/irq-st.h
 create mode 100644 include/dt-bindings/mfd/st-lpc.h
 create mode 100644 include/dt-bindings/reset/stih407-resets.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 397a0ae..99874bc 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -339,6 +339,8 @@ dtb-$(CONFIG_ARCH_BCM283X) += \
 
 dtb-$(CONFIG_ARCH_ASPEED) += ast2500-evb.dtb
 
+dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb
+
 targets += $(dtb-y)
 
 # Add any required device tree compiler flags here
diff --git a/arch/arm/dts/st-pincfg.h b/arch/arm/dts/st-pincfg.h
new file mode 100644
index 000..4851c38
--- /dev/null
+++ b/arch/arm/dts/st-pincfg.h
@@ -0,0 +1,71 @@
+#ifndef _ST_PINCFG_H_
+#define _ST_PINCFG_H_
+
+/* Alternate functions */
+#define ALT1   1
+#define ALT2   2
+#define ALT3   3
+#define ALT4   4
+#define ALT5   5
+#define ALT6   6
+#define ALT7   7
+
+/* Output enable */
+#define OE (1 << 27)
+/* Pull Up */
+#define PU (1 << 26)
+/* Open Drain */
+#define OD (1 << 25)
+#define RT (1 << 23)
+#define INVERTCLK  (1 << 22)
+#define CLKNOTDATA (1 << 21)
+#define DOUBLE_EDGE(1 << 20)
+#define CLK_A  (0 << 18)
+#define CLK_B  (1 << 18)
+#define CLK_C  (2 << 18)
+#define CLK_D  (3 << 18)
+
+/* User-frendly defines for Pin Direction */
+   /* oe = 0, pu = 0, od = 0 */
+#define IN (0)
+   /* oe = 0, pu = 1, od = 0 */
+#define IN_PU  (PU)
+   /* oe = 1, pu = 0, od = 0 */
+#define OUT(OE)
+   /* oe = 1, pu = 0, od = 1 */
+#define BIDIR  (OE | OD)
+   /* oe = 1, pu = 1, od = 1 */
+#define BIDIR_PU   (OE | PU | OD)
+
+/* RETIME_TYPE */
+/*
+ * B Mode
+ * Bypass retime with optional delay parameter
+ */
+#define BYPASS (0)
+/*
+ * R0, R1, R0D, R1D modes
+ * single-edge data non inverted clock, retime data with clk
+ */
+#define SE_NICLK_IO(RT)
+/*
+ * RIV0, RIV1, RIV0D, RIV1D modes
+ * single-edge data inverted clock, retime data with clk
+ */
+#define SE_ICLK_IO (RT | INVERTCLK)
+/*
+ * R0E, R1E, R0ED, R1ED modes
+ * double-edge data, retime data with clk
+ */
+#define DE_IO  (RT | DOUBLE_EDGE)
+/*
+ * CIV0, CIV1 modes with inverted clock
+ * Retiming the clk pins will park clock & reduce the noise within the core.
+ */
+#define ICLK   (RT | CLKNOTDATA | INVERTCLK)
+/*
+ * CLK0, CLK1 modes with non-inverted clock
+ * Retiming the clk pins will park clock & reduce the noise within the core.
+ */
+#define NICLK  (RT | CLKNOTDATA)
+#endif /* _ST_PINCFG_H_ */
diff --git a/arch/arm/dts/stih407-clock.dtsi b/arch/arm/dts/stih407-clock.dtsi
new file mode 100644
index 000..13029c0
--- /dev/null
+++ b/arch/arm/dts/stih407-clock.dtsi
@@ -0,0 +1,326 @@
+/*
+ * Copyright (C) 2014 STMicroelectronics R Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include 
+/ {
+   clocks {
+

[U-Boot] [PATCH 1/7] arm: Add support for STMicroelectronics STiH410 soc

2017-02-02 Thread patrice.chotard

From: Patrice Chotard 

The STiH410 is an advanced multi-HD AVC processor with 3D
graphics acceleration and 1.5-GHz ARM Cortex-A9 SMP CPU
part of the stih407 family.

It has wide connectivity including USB 3.0, PCI-e, SATA
and gigabit ethernet.

Signed-off-by: Patrice Chotard 
---
 arch/arm/Kconfig   |  9 ++
 arch/arm/Makefile  |  1 +
 arch/arm/include/asm/arch-stih410/gpio.h   | 20 +
 arch/arm/include/asm/arch-stih410/sti.h| 14 +
 arch/arm/include/asm/arch-stih410/syscfg.h | 20 +
 arch/arm/mach-sti/Kconfig  | 31 
 arch/arm/mach-sti/Makefile |  8 +
 arch/arm/mach-sti/cpu.c| 16 ++
 arch/arm/mach-sti/timer.c  | 47 ++
 9 files changed, 166 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-stih410/gpio.h
 create mode 100644 arch/arm/include/asm/arch-stih410/sti.h
 create mode 100644 arch/arm/include/asm/arch-stih410/syscfg.h
 create mode 100644 arch/arm/mach-sti/Kconfig
 create mode 100644 arch/arm/mach-sti/Makefile
 create mode 100644 arch/arm/mach-sti/cpu.c
 create mode 100644 arch/arm/mach-sti/timer.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 0229800..4aa5eb9 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -982,6 +982,13 @@ config STM32
select DM
select DM_SERIAL
 
+config ARCH_STI
+   bool "Support STMicrolectronics SoCs"
+   select CPU_V7
+   help
+ Support for STMicroelectronics STiH407/10 SoC family.
+ This SoC is used on Linaro 96Board STiH410-B2260
+
 config ARCH_ROCKCHIP
bool "Support Rockchip SoCs"
select OF_CONTROL
@@ -1060,6 +1067,8 @@ source "arch/arm/mach-snapdragon/Kconfig"
 
 source "arch/arm/mach-socfpga/Kconfig"
 
+source "arch/arm/mach-sti/Kconfig"
+
 source "arch/arm/mach-stm32/Kconfig"
 
 source "arch/arm/mach-tegra/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 0d94700..116f661 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -71,6 +71,7 @@ machine-$(CONFIG_ARCH_SNAPDRAGON) += snapdragon
 machine-$(CONFIG_ARCH_SOCFPGA) += socfpga
 machine-$(CONFIG_ARCH_RMOBILE) += rmobile
 machine-$(CONFIG_ARCH_ROCKCHIP)+= rockchip
+machine-$(CONFIG_ARCH_STI) += sti
 machine-$(CONFIG_STM32)+= stm32
 machine-$(CONFIG_TEGRA)+= tegra
 machine-$(CONFIG_ARCH_UNIPHIER)+= uniphier
diff --git a/arch/arm/include/asm/arch-stih410/gpio.h 
b/arch/arm/include/asm/arch-stih410/gpio.h
new file mode 100644
index 000..977b3f8
--- /dev/null
+++ b/arch/arm/include/asm/arch-stih410/gpio.h
@@ -0,0 +1,20 @@
+/*
+ * pins definition for STiH410-B2260
+ *
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _STI_GPIO_H_
+#define _STI_GPIO_H_
+
+struct sti_pin_desc {
+   unsigned char bank;
+   unsigned char pin;
+   unsigned char alt;
+   int dir;
+};
+
+#endif /* _STI_GPIO_H_ */
+
diff --git a/arch/arm/include/asm/arch-stih410/sti.h 
b/arch/arm/include/asm/arch-stih410/sti.h
new file mode 100644
index 000..d35c4f0
--- /dev/null
+++ b/arch/arm/include/asm/arch-stih410/sti.h
@@ -0,0 +1,14 @@
+/*
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _STI_H_
+#define _STI_H_
+
+/* A9_GLOBAL_TIMER_BASE */
+#define STI_A9_CONFIG_BASE 0x0876
+#define STI_A9_GLOBAL_TIMER_BASE   (STI_A9_CONFIG_BASE + 0x0200)
+
+#endif /* _STI_H_ */
diff --git a/arch/arm/include/asm/arch-stih410/syscfg.h 
b/arch/arm/include/asm/arch-stih410/syscfg.h
new file mode 100644
index 000..e027d74
--- /dev/null
+++ b/arch/arm/include/asm/arch-stih410/syscfg.h
@@ -0,0 +1,20 @@
+/*
+ * Configuration/Status Registers for STiH410 SoC
+ *
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _STI_SYSCFG_H_
+#define _STI_SYSCFG_H_
+
+#define STIH410_SYSCONF0_BASE  0x0962 /* 0-999 */
+#define STIH410_SYSCONF1_BASE  0x0928 /* 1000-1999 */
+#define STIH410_SYSCONF2_BASE  0x0929 /* 2000-2999 */
+#define STIH410_SYSCONF3_BASE  0x092a /* 3000-3999 */
+#define STIH410_SYSCONF4_BASE  0x0960 /* 4000-4999 */
+#define STIH410_SYSCONF5_BASE  0x092b /* 5000-5999 */
+#define STIH410_SYSCONF6_BASE  0x092c /* 6000-6999 */
+
+#endif /* _STI_SYSCFG_ */
diff --git a/arch/arm/mach-sti/Kconfig b/arch/arm/mach-sti/Kconfig
new file mode 100644
index 000..67a3b24
--- /dev/null
+++ b/arch/arm/mach-sti/Kconfig
@@ -0,0 +1,31 @@
+if ARCH_STI
+
+config SYS_SOC
+   default "stih410"
+
+choice
+   prompt "STiH410 board select"
+
+config

[U-Boot] [PATCH 3/7] STiH410: Add STi serial driver

2017-02-02 Thread patrice.chotard

From: Patrice Chotard 

This patch adds support to ASC (asynchronous serial controller)
driver, which is basically a standard serial driver. This IP
is common across other STMicroelectronics SoCs

Signed-off-by: Patrice Chotard 
---
 arch/arm/Kconfig  |   2 +
 arch/arm/include/asm/arch-stih410/sti.h   |   6 +
 board/st/stih410-b2260/board.c|  12 ++
 drivers/serial/Kconfig|   7 +
 drivers/serial/Makefile   |   1 +
 drivers/serial/serial_sti_asc.c   | 219 ++
 include/configs/stih410-b2260.h   |   1 +
 include/dm/platform_data/serial_sti_asc.h |  17 +++
 8 files changed, 265 insertions(+)
 create mode 100644 drivers/serial/serial_sti_asc.c
 create mode 100644 include/dm/platform_data/serial_sti_asc.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 4aa5eb9..b91a5b7 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -985,6 +985,8 @@ config STM32
 config ARCH_STI
bool "Support STMicrolectronics SoCs"
select CPU_V7
+   select DM
+   select DM_SERIAL
help
  Support for STMicroelectronics STiH407/10 SoC family.
  This SoC is used on Linaro 96Board STiH410-B2260
diff --git a/arch/arm/include/asm/arch-stih410/sti.h 
b/arch/arm/include/asm/arch-stih410/sti.h
index d35c4f0..f167560 100644
--- a/arch/arm/include/asm/arch-stih410/sti.h
+++ b/arch/arm/include/asm/arch-stih410/sti.h
@@ -11,4 +11,10 @@
 #define STI_A9_CONFIG_BASE 0x0876
 #define STI_A9_GLOBAL_TIMER_BASE   (STI_A9_CONFIG_BASE + 0x0200)
 
+/* STiH410 control registers */
+#define STIH410_COMMS_BASE 0x0980
+
+/* ASC UART located in the main "COMMs" block */
+#define STIH410_ASC1_BASE (STIH410_COMMS_BASE + 0x00031000)
+
 #endif /* _STI_H_ */
diff --git a/board/st/stih410-b2260/board.c b/board/st/stih410-b2260/board.c
index 0c06bca..b2cfa7f 100644
--- a/board/st/stih410-b2260/board.c
+++ b/board/st/stih410-b2260/board.c
@@ -7,6 +7,9 @@
  */
 
 #include 
+#include 
+#include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -26,3 +29,12 @@ int board_init(void)
 {
return 0;
 }
+
+static const struct sti_asc_serial_platdata serial_platdata = {
+   .base = (struct sti_asc_uart *)STIH410_ASC1_BASE,
+};
+
+U_BOOT_DEVICE(sti_asc) = {
+   .name = "serial_sti_asc",
+   .platdata = _platdata,
+};
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index b11f3ff..7557632 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -413,4 +413,11 @@ config PXA_SERIAL
  If you have a machine based on a Marvell XScale PXA2xx CPU you
  can enable its onboard serial ports by enabling this option.
 
+config STI_ASC_SERIAL
+   bool "STMicroelectronics on-chip UART"
+   depends on DM_SERIAL && ARCH_STI
+   help
+ Select this to enable Asynchronous Serial Controller available
+ on STiH410 SoC.
+
 endmenu
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 8430668..84a22ce 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -41,6 +41,7 @@ obj-$(CONFIG_FSL_LINFLEXUART) += serial_linflexuart.o
 obj-$(CONFIG_ARC_SERIAL) += serial_arc.o
 obj-$(CONFIG_UNIPHIER_SERIAL) += serial_uniphier.o
 obj-$(CONFIG_STM32_SERIAL) += serial_stm32.o
+obj-$(CONFIG_STI_ASC_SERIAL) += serial_sti_asc.o
 obj-$(CONFIG_PIC32_SERIAL) += serial_pic32.o
 obj-$(CONFIG_STM32X7_SERIAL) += serial_stm32x7.o
 obj-$(CONFIG_BCM283X_MU_SERIAL) += serial_bcm283x_mu.o
diff --git a/drivers/serial/serial_sti_asc.c b/drivers/serial/serial_sti_asc.c
new file mode 100644
index 000..5279836
--- /dev/null
+++ b/drivers/serial/serial_sti_asc.c
@@ -0,0 +1,219 @@
+/*
+ * Support for Serial I/O using STMicroelectronics' on-chip ASC.
+ *
+ *  Copyright (c) 2017
+ *  Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define BAUDMODE   0x1000
+#define RXENABLE   0x0100
+#define RUN0x0080
+#define MODE   0x0001
+#define MODE_8BIT  0x0001
+#define STOP_1BIT  0x0008
+#define PARITYODD  0x0020
+
+#define STA_TF 0x0200
+#define STA_RBF0x0001
+
+struct sti_asc_uart {
+   u32 baudrate;
+   u32 txbuf;
+   u32 rxbuf;
+   u32 control;
+   u32 inten;
+   u32 status;
+   u32 guardtime;
+   u32 timeout;
+   u32 txreset;
+   u32 rxreset;
+};
+
+/* Values for the BAUDRATE Register ---*/
+#define PCLK   (200ul * 100ul)
+#define BAUDRATE_VAL_M0(bps)   (PCLK / (16 * (bps)))
+#define BAUDRATE_VAL_M1(bps)   ((bps * (1 << 14)) + (1<<13)) / (PCLK/(1 << 6))
+
+/*
+ * MODE 0
+ *   ICCLK
+ * ASCBaudRate =   
+ *

[U-Boot] [PATCH 2/7] board: Add STMicroelectronics STiH410-B2260 support

2017-02-02 Thread patrice.chotard

From: Patrice Chotard 

This is a 96Board compliant board based on STiH410 SoC:
  - 1GB DDR
  - On-Board USB combo WiFi/Bluetooth RTL8723BU
with PCB soldered antenna
  - Ethernet 1000-BaseT
  - SAtA
  - HDMI
  - 2 x USB2.0 type A
  - 1 x USB2.0 type micro-AB
  - SD card slot
  - High speed connector (SD/I2C/USB interfaces)
  - Low speed connector (UART/I2C/GPIO/SPI/PCM interfaces)

Signed-off-by: Patrice Chotard 
---
 board/st/stih410-b2260/Kconfig | 19 +
 board/st/stih410-b2260/MAINTAINERS |  6 
 board/st/stih410-b2260/Makefile|  8 ++
 board/st/stih410-b2260/board.c | 28 ++
 include/configs/stih410-b2260.h| 58 ++
 5 files changed, 119 insertions(+)
 create mode 100644 board/st/stih410-b2260/Kconfig
 create mode 100644 board/st/stih410-b2260/MAINTAINERS
 create mode 100644 board/st/stih410-b2260/Makefile
 create mode 100644 board/st/stih410-b2260/board.c
 create mode 100644 include/configs/stih410-b2260.h

diff --git a/board/st/stih410-b2260/Kconfig b/board/st/stih410-b2260/Kconfig
new file mode 100644
index 000..590add0
--- /dev/null
+++ b/board/st/stih410-b2260/Kconfig
@@ -0,0 +1,19 @@
+if TARGET_STIH410_B2260
+
+config SYS_BOARD
+   string
+   default "stih410-b2260"
+
+config SYS_VENDOR
+   string
+   default "st"
+
+config SYS_SOC
+   string
+   default "stih410"
+
+config SYS_CONFIG_NAME
+   string
+   default "stih410-b2260"
+
+endif
diff --git a/board/st/stih410-b2260/MAINTAINERS 
b/board/st/stih410-b2260/MAINTAINERS
new file mode 100644
index 000..e78c69a
--- /dev/null
+++ b/board/st/stih410-b2260/MAINTAINERS
@@ -0,0 +1,6 @@
+STIH410-B2260 BOARD
+M: Patrice Chotard 
+S: Maintained
+F: board/st/stih410-b2260/
+F: include/configs/stih410-b2260.h
+F: configs/stih410-b2260_defconfig
diff --git a/board/st/stih410-b2260/Makefile b/board/st/stih410-b2260/Makefile
new file mode 100644
index 000..68a7903
--- /dev/null
+++ b/board/st/stih410-b2260/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2017
+# Patrice Chotard, 
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y  = board.o
diff --git a/board/st/stih410-b2260/board.c b/board/st/stih410-b2260/board.c
new file mode 100644
index 000..0c06bca
--- /dev/null
+++ b/board/st/stih410-b2260/board.c
@@ -0,0 +1,28 @@
+/*
+ * Board init file for STiH410-B2260
+ *
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+   gd->ram_size = PHYS_SDRAM_1_SIZE;
+   return 0;
+}
+
+void dram_init_banksize(void)
+{
+   gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+   gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+}
+
+int board_init(void)
+{
+   return 0;
+}
diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h
new file mode 100644
index 000..fade7a1
--- /dev/null
+++ b/include/configs/stih410-b2260.h
@@ -0,0 +1,58 @@
+/*
+ * (C) Copyright 2017
+ * Patrice Chotard, 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/* ram memory-related information */
+#define CONFIG_NR_DRAM_BANKS   1
+#define PHYS_SDRAM_1   0x4000
+#define CONFIG_SYS_SDRAM_BASE  PHYS_SDRAM_1
+#define PHYS_SDRAM_1_SIZE  0x3FE0
+#define CONFIG_SYS_TEXT_BASE   0x7D60
+#define CONFIG_SYS_LOAD_ADDR   PHYS_SDRAM_1/* default load addr */
+
+#define CONFIG_BAUDRATE115200
+
+#define CONFIG_SYS_HZ_CLOCK10  /* 1 GHz */
+
+/* Libraries */
+#define CONFIG_MD5
+
+#define CONFIG_BOOTARGS
\
+   "console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
+
+/* Environment */
+#define CONFIG_EXTRA_ENV_SETTINGS \
+   "board= B2260" \
+   "load_addr= #CONFIG_SYS_LOAD_ADDR \0"
+
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_SIZE 0x4000
+#define CONFIG_SYS_NO_FLASH
+
+/* Extra Commands */
+#define CONFIG_CMD_ASKENV
+
+#define CONFIG_SETUP_MEMORY_TAGS
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN  0x180
+#define CONFIG_SYS_GBL_DATA_SIZE   1024/* Global data structures */
+#define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_TEXT_BASE - \
+CONFIG_SYS_MALLOC_LEN - \
+CONFIG_SYS_GBL_DATA_SIZE)
+
+/* Monitor Command Prompt */
+#define CONFIG_SYS_CBSIZE  1024/* Console I/O Buffer Size */
+
+#define CONFIG_SYS_MAXARGS 16  /* max number of command args */
+#define CONFIG_SYS_MAX_FLASH_BANKS 1
+
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+#endif /* __CONFIG_H */
-- 
1.9.1

[U-Boot] [PATCH 5/7] STiH410: add STi pinctrl driver

2017-02-02 Thread patrice.chotard

From: Patrice Chotard 

Add STMicroelectronics STiH410 pinctrl driver

Signed-off-by: Patrice Chotard 
---
 drivers/pinctrl/Kconfig   |  10 ++
 drivers/pinctrl/Makefile  |   1 +
 drivers/pinctrl/pinctrl-sti.c | 315 ++
 3 files changed, 326 insertions(+)
 create mode 100644 drivers/pinctrl/pinctrl-sti.c

diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index efcb4c0..0c832e1 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -175,6 +175,16 @@ config PIC32_PINCTRL
  by a device tree node which contains both GPIO defintion and pin 
control
  functions.
 
+config PINCTRL_STI
+   bool "STMicroelectronics STi pin-control and pin-mux driver"
+   depends on DM && ARCH_STI
+   default y
+   help
+ Support pin multiplexing control on STMicrolectronics STi SoCs.
+ The driver is controlled by a device tree node which contains both
+ the GPIO definitions and pin control functions for each available 
multiplex
+ function.
+
 endif
 
 source "drivers/pinctrl/meson/Kconfig"
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 512112a..a2f8101 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -16,3 +16,4 @@ obj-$(CONFIG_PIC32_PINCTRL)   += pinctrl_pic32.o
 obj-$(CONFIG_PINCTRL_EXYNOS)   += exynos/
 obj-$(CONFIG_PINCTRL_MESON)+= meson/
 obj-$(CONFIG_PINCTRL_MVEBU)+= mvebu/
+obj-$(CONFIG_PINCTRL_STI)  += pinctrl-sti.o
diff --git a/drivers/pinctrl/pinctrl-sti.c b/drivers/pinctrl/pinctrl-sti.c
new file mode 100644
index 000..721dc8e
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-sti.c
@@ -0,0 +1,315 @@
+/*
+ * Pinctrl driver for STMicroelectronics STi SoCs
+ *
+ *  Copyright (c) 2017
+ *  Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define MAX_STI_PINCONF_ENTRIES7
+/* Output enable */
+#define OE (1 << 27)
+/* Pull Up */
+#define PU (1 << 26)
+/* Open Drain */
+#define OD (1 << 25)
+
+/* User-frendly defines for Pin Direction */
+   /* oe = 0, pu = 0, od = 0 */
+#define IN (0)
+   /* oe = 0, pu = 1, od = 0 */
+#define IN_PU  (PU)
+   /* oe = 1, pu = 0, od = 0 */
+#define OUT(OE)
+   /* oe = 1, pu = 1, od = 0 */
+#define OUT_PU (OE | PU)
+   /* oe = 1, pu = 0, od = 1 */
+#define BIDIR  (OE | OD)
+   /* oe = 1, pu = 1, od = 1 */
+#define BIDIR_PU   (OE | PU | OD)
+
+struct sti_pinctrl_platdata {
+   struct regmap *regmap;
+};
+
+/*
+ * PIO alternative Function selector
+ */
+void sti_alternate_select(struct udevice *dev, struct sti_pin_desc *pin_desc)
+{
+   struct sti_pinctrl_platdata *plat = dev_get_platdata(dev);
+   unsigned long sysconf, *sysconfreg;
+   int alt = pin_desc->alt;
+   int bank = pin_desc->bank;
+   int pin = pin_desc->pin;
+
+   sysconfreg = (unsigned long *)plat->regmap->base;
+
+   switch (bank) {
+   case 0 ... 5:   /* in "SBC Bank" */
+   sysconfreg += bank;
+   break;
+   case 10 ... 20: /* in "FRONT Bank" */
+   sysconfreg += bank - 10;
+   break;
+   case 30 ... 35: /* in "REAR Bank" */
+   sysconfreg += bank - 30;
+   break;
+   case 40 ... 42: /* in "FLASH Bank" */
+   sysconfreg += bank - 40;
+   break;
+   default:
+   BUG();
+   return;
+   }
+
+   sysconf = readl(sysconfreg);
+   bitfield_replace(sysconf, pin * 4, 3, alt);
+   writel(sysconf, sysconfreg);
+}
+
+/* pin configuration */
+void sti_pin_configure(struct udevice *dev, struct sti_pin_desc *pin_desc)
+{
+   struct sti_pinctrl_platdata *plat = dev_get_platdata(dev);
+   int bit;
+   int oe = 0, pu = 0, od = 0;
+   unsigned long *sysconfreg;
+   int bank = pin_desc->bank;
+
+   sysconfreg = (unsigned long *)plat->regmap->base + 40;
+
+   /*
+* NOTE: The PIO configuration for the PIO pins in the
+* "FLASH Bank" are different from all the other banks!
+* Specifically, the output-enable pin control register
+* (SYS_CFG_3040) and the pull-up pin control register
+* (SYS_CFG_3050), are both classed as being "reserved".
+* Hence, we do not write to these registers to configure
+* the OE and PU features for PIOs in this bank. However,
+* the open-drain pin control register (SYS_CFG_3060)
+* follows the style of the other banks, and so we can
+* treat

[U-Boot] [PATCH v2 1/7] arm: Add support for STMicroelectronics STiH410 soc

2017-02-02 Thread patrice.chotard

From: Patrice Chotard 

The STiH410 is an advanced multi-HD AVC processor with 3D
graphics acceleration and 1.5-GHz ARM Cortex-A9 SMP CPU
part of the stih407 family.

It has wide connectivity including USB 3.0, PCI-e, SATA
and gigabit ethernet.

Signed-off-by: Patrice Chotard 
---
 arch/arm/Kconfig   |  9 ++
 arch/arm/Makefile  |  1 +
 arch/arm/include/asm/arch-stih410/gpio.h   | 20 +
 arch/arm/include/asm/arch-stih410/sti.h| 14 +
 arch/arm/include/asm/arch-stih410/syscfg.h | 20 +
 arch/arm/mach-sti/Kconfig  | 31 
 arch/arm/mach-sti/Makefile |  8 +
 arch/arm/mach-sti/cpu.c| 16 ++
 arch/arm/mach-sti/timer.c  | 47 ++
 9 files changed, 166 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-stih410/gpio.h
 create mode 100644 arch/arm/include/asm/arch-stih410/sti.h
 create mode 100644 arch/arm/include/asm/arch-stih410/syscfg.h
 create mode 100644 arch/arm/mach-sti/Kconfig
 create mode 100644 arch/arm/mach-sti/Makefile
 create mode 100644 arch/arm/mach-sti/cpu.c
 create mode 100644 arch/arm/mach-sti/timer.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 0229800..4aa5eb9 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -982,6 +982,13 @@ config STM32
select DM
select DM_SERIAL
 
+config ARCH_STI
+   bool "Support STMicrolectronics SoCs"
+   select CPU_V7
+   help
+ Support for STMicroelectronics STiH407/10 SoC family.
+ This SoC is used on Linaro 96Board STiH410-B2260
+
 config ARCH_ROCKCHIP
bool "Support Rockchip SoCs"
select OF_CONTROL
@@ -1060,6 +1067,8 @@ source "arch/arm/mach-snapdragon/Kconfig"
 
 source "arch/arm/mach-socfpga/Kconfig"
 
+source "arch/arm/mach-sti/Kconfig"
+
 source "arch/arm/mach-stm32/Kconfig"
 
 source "arch/arm/mach-tegra/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 0d94700..116f661 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -71,6 +71,7 @@ machine-$(CONFIG_ARCH_SNAPDRAGON) += snapdragon
 machine-$(CONFIG_ARCH_SOCFPGA) += socfpga
 machine-$(CONFIG_ARCH_RMOBILE) += rmobile
 machine-$(CONFIG_ARCH_ROCKCHIP)+= rockchip
+machine-$(CONFIG_ARCH_STI) += sti
 machine-$(CONFIG_STM32)+= stm32
 machine-$(CONFIG_TEGRA)+= tegra
 machine-$(CONFIG_ARCH_UNIPHIER)+= uniphier
diff --git a/arch/arm/include/asm/arch-stih410/gpio.h 
b/arch/arm/include/asm/arch-stih410/gpio.h
new file mode 100644
index 000..977b3f8
--- /dev/null
+++ b/arch/arm/include/asm/arch-stih410/gpio.h
@@ -0,0 +1,20 @@
+/*
+ * pins definition for STiH410-B2260
+ *
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _STI_GPIO_H_
+#define _STI_GPIO_H_
+
+struct sti_pin_desc {
+   unsigned char bank;
+   unsigned char pin;
+   unsigned char alt;
+   int dir;
+};
+
+#endif /* _STI_GPIO_H_ */
+
diff --git a/arch/arm/include/asm/arch-stih410/sti.h 
b/arch/arm/include/asm/arch-stih410/sti.h
new file mode 100644
index 000..d35c4f0
--- /dev/null
+++ b/arch/arm/include/asm/arch-stih410/sti.h
@@ -0,0 +1,14 @@
+/*
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _STI_H_
+#define _STI_H_
+
+/* A9_GLOBAL_TIMER_BASE */
+#define STI_A9_CONFIG_BASE 0x0876
+#define STI_A9_GLOBAL_TIMER_BASE   (STI_A9_CONFIG_BASE + 0x0200)
+
+#endif /* _STI_H_ */
diff --git a/arch/arm/include/asm/arch-stih410/syscfg.h 
b/arch/arm/include/asm/arch-stih410/syscfg.h
new file mode 100644
index 000..e027d74
--- /dev/null
+++ b/arch/arm/include/asm/arch-stih410/syscfg.h
@@ -0,0 +1,20 @@
+/*
+ * Configuration/Status Registers for STiH410 SoC
+ *
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _STI_SYSCFG_H_
+#define _STI_SYSCFG_H_
+
+#define STIH410_SYSCONF0_BASE  0x0962 /* 0-999 */
+#define STIH410_SYSCONF1_BASE  0x0928 /* 1000-1999 */
+#define STIH410_SYSCONF2_BASE  0x0929 /* 2000-2999 */
+#define STIH410_SYSCONF3_BASE  0x092a /* 3000-3999 */
+#define STIH410_SYSCONF4_BASE  0x0960 /* 4000-4999 */
+#define STIH410_SYSCONF5_BASE  0x092b /* 5000-5999 */
+#define STIH410_SYSCONF6_BASE  0x092c /* 6000-6999 */
+
+#endif /* _STI_SYSCFG_ */
diff --git a/arch/arm/mach-sti/Kconfig b/arch/arm/mach-sti/Kconfig
new file mode 100644
index 000..67a3b24
--- /dev/null
+++ b/arch/arm/mach-sti/Kconfig
@@ -0,0 +1,31 @@
+if ARCH_STI
+
+config SYS_SOC
+   default "stih410"
+
+choice
+   prompt "STiH410 board select"
+
+config

[U-Boot] [PATCH v2 4/7] STiH410: Add STi SDHCI driver

2017-02-02 Thread patrice.chotard

From: Patrice Chotard 

Add SDHCI host controller found on STMicroelctronics SoCs

Signed-off-by: Patrice Chotard 
---
 arch/arm/Kconfig  |   2 +
 arch/arm/include/asm/arch-stih410/sdhci.h |  69 +++
 drivers/mmc/Kconfig   |   7 ++
 drivers/mmc/Makefile  |   1 +
 drivers/mmc/sti_sdhci.c   | 140 ++
 5 files changed, 219 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-stih410/sdhci.h
 create mode 100644 drivers/mmc/sti_sdhci.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b91a5b7..477f36b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -987,6 +987,8 @@ config ARCH_STI
select CPU_V7
select DM
select DM_SERIAL
+   select BLK
+   select DM_MMC
help
  Support for STMicroelectronics STiH407/10 SoC family.
  This SoC is used on Linaro 96Board STiH410-B2260
diff --git a/arch/arm/include/asm/arch-stih410/sdhci.h 
b/arch/arm/include/asm/arch-stih410/sdhci.h
new file mode 100644
index 000..f45b961
--- /dev/null
+++ b/arch/arm/include/asm/arch-stih410/sdhci.h
@@ -0,0 +1,69 @@
+/*
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __STI_SDHCI_H__
+#define __STI_SDHCI_H__
+
+#define FLASHSS_MMC_CORE_CONFIG_1  0x400
+#define FLASHSS_MMC_CORECFG_TIMEOUT_CLK_UNIT_MHZ   BIT(24)
+#define FLASHSS_MMC_CORECFG_TIMEOUT_CLK_FREQ_MIN   BIT(12)
+
+#define STI_FLASHSS_MMC_CORE_CONFIG_1  \
+   (FLASHSS_MMC_CORECFG_TIMEOUT_CLK_UNIT_MHZ   | \
+FLASHSS_MMC_CORECFG_TIMEOUT_CLK_FREQ_MIN)
+
+#define FLASHSS_MMC_CORE_CONFIG_2  0x404
+#define FLASHSS_MMC_CORECFG_HIGH_SPEED BIT(28)
+#define FLASHSS_MMC_CORECFG_8BIT_EMMC  BIT(20)
+#define MAX_BLK_LENGTH_1024BIT(16)
+#define BASE_CLK_FREQ_200  0xc8
+
+
+#define STI_FLASHSS_MMC_CORE_CONFIG2   \
+   (FLASHSS_MMC_CORECFG_HIGH_SPEED | \
+FLASHSS_MMC_CORECFG_8BIT_EMMC  | \
+MAX_BLK_LENGTH_1024| \
+BASE_CLK_FREQ_200 << 0)
+
+#define STI_FLASHSS_SDCARD_CORE_CONFIG2\
+   (FLASHSS_MMC_CORECFG_HIGH_SPEED | \
+MAX_BLK_LENGTH_1024| \
+BASE_CLK_FREQ_200)
+
+#define FLASHSS_MMC_CORE_CONFIG_3  0x408
+#define FLASHSS_MMC_CORECFG_SLOT_TYPE_EMMC BIT(28)
+#define FLASHSS_MMC_CORECFG_ASYNCH_INTR_SUPPORTBIT(20)
+#define FLASHSS_MMC_CORECFG_3P3_VOLT   BIT(8)
+#define FLASHSS_MMC_CORECFG_SUSP_RES_SUPPORT   BIT(4)
+#define FLASHSS_MMC_CORECFG_SDMA   BIT(0)
+
+#define STI_FLASHSS_MMC_CORE_CONFIG3   \
+(FLASHSS_MMC_CORECFG_SLOT_TYPE_EMMC| \
+FLASHSS_MMC_CORECFG_ASYNCH_INTR_SUPPORT| \
+FLASHSS_MMC_CORECFG_3P3_VOLT   | \
+FLASHSS_MMC_CORECFG_SUSP_RES_SUPPORT   | \
+FLASHSS_MMC_CORECFG_SDMA)
+
+#define STI_FLASHSS_SDCARD_CORE_CONFIG3\
+(FLASHSS_MMC_CORECFG_ASYNCH_INTR_SUPPORT   | \
+FLASHSS_MMC_CORECFG_3P3_VOLT   | \
+FLASHSS_MMC_CORECFG_SUSP_RES_SUPPORT   | \
+FLASHSS_MMC_CORECFG_SDMA)
+
+#define FLASHSS_MMC_CORE_CONFIG_4  0x40c
+#define FLASHSS_MMC_CORECFG_D_DRIVER_SUPPORT   BIT(20)
+#define FLASHSS_MMC_CORECFG_C_DRIVER_SUPPORT   BIT(16)
+#define FLASHSS_MMC_CORECFG_A_DRIVER_SUPPORT   BIT(12)
+
+#define STI_FLASHSS_MMC_CORE_CONFIG4   \
+   (FLASHSS_MMC_CORECFG_D_DRIVER_SUPPORT   | \
+FLASHSS_MMC_CORECFG_C_DRIVER_SUPPORT   | \
+FLASHSS_MMC_CORECFG_A_DRIVER_SUPPORT)
+
+#define ST_MMC_CCONFIG_REG_5   0x210
+#define SYSCONF_MMC1_ENABLE_BIT3
+
+#endif /* _STI_SDHCI_H_ */
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 0c07781..dfdec27 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -287,6 +287,13 @@ config MMC_SDHCI_SPEAR
 
  If unsure, say N.
 
+config MMC_SDHCI_STI
+   bool "SDHCI support for STMicroelectronics SoC"
+   depends on MMC_SDHCI
+   help
+ This selects the Secure Digital Host Controller Interface (SDHCI)
+ on STMicroelectronics STiH410 SoC.
+
 config MMC_SDHCI_XENON
bool "SDHCI support for the Xenon SDHCI controller"
depends on MMC_SDHCI && DM_MMC && OF_CONTROL
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index e78bd0d..fc24926 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -62,6 +62,7 @@ obj-$(CONFIG_MMC_SDHCI_PIC32) += pic32_sdhci.o
 obj-$(CONFIG_MMC_SDHCI_ROCKCHIP)   += rockchip_sdhci.o

[U-Boot] [PATCH v2 7/7] STIH410-B2260: Add STiH410-B2260 defconfig

2017-02-02 Thread patrice.chotard

From: Patrice Chotard 

Signed-off-by: Patrice Chotard 
---
 configs/stih410-b2260_defconfig | 22 ++
 1 file changed, 22 insertions(+)
 create mode 100644 configs/stih410-b2260_defconfig

diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig
new file mode 100644
index 000..bb53acc
--- /dev/null
+++ b/configs/stih410-b2260_defconfig
@@ -0,0 +1,22 @@
+CONFIG_ARM=y
+CONFIG_ARCH_STI=y
+CONFIG_IDENT_STRING="STMicroelectronics STiH410-B2260"
+CONFIG_DEFAULT_DEVICE_TREE="stih410-b2260"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SYS_PROMPT="stih410-b2260 => "
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_OF_CONTROL=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_STI=y
+CONFIG_PINCTRL=y
+CONFIG_STI_ASC_SERIAL=y
+CONFIG_SPL_OF_LIBFDT=y
-- 
1.9.1

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[U-Boot] [PATCH v2 5/7] STiH410: add STi pinctrl driver

2017-02-02 Thread patrice.chotard

From: Patrice Chotard 

Add STMicroelectronics STiH410 pinctrl driver

Signed-off-by: Patrice Chotard 
---
 drivers/pinctrl/Kconfig   |  10 ++
 drivers/pinctrl/Makefile  |   1 +
 drivers/pinctrl/pinctrl-sti.c | 315 ++
 3 files changed, 326 insertions(+)
 create mode 100644 drivers/pinctrl/pinctrl-sti.c

diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index efcb4c0..0c832e1 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -175,6 +175,16 @@ config PIC32_PINCTRL
  by a device tree node which contains both GPIO defintion and pin 
control
  functions.
 
+config PINCTRL_STI
+   bool "STMicroelectronics STi pin-control and pin-mux driver"
+   depends on DM && ARCH_STI
+   default y
+   help
+ Support pin multiplexing control on STMicrolectronics STi SoCs.
+ The driver is controlled by a device tree node which contains both
+ the GPIO definitions and pin control functions for each available 
multiplex
+ function.
+
 endif
 
 source "drivers/pinctrl/meson/Kconfig"
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 512112a..a2f8101 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -16,3 +16,4 @@ obj-$(CONFIG_PIC32_PINCTRL)   += pinctrl_pic32.o
 obj-$(CONFIG_PINCTRL_EXYNOS)   += exynos/
 obj-$(CONFIG_PINCTRL_MESON)+= meson/
 obj-$(CONFIG_PINCTRL_MVEBU)+= mvebu/
+obj-$(CONFIG_PINCTRL_STI)  += pinctrl-sti.o
diff --git a/drivers/pinctrl/pinctrl-sti.c b/drivers/pinctrl/pinctrl-sti.c
new file mode 100644
index 000..721dc8e
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-sti.c
@@ -0,0 +1,315 @@
+/*
+ * Pinctrl driver for STMicroelectronics STi SoCs
+ *
+ *  Copyright (c) 2017
+ *  Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define MAX_STI_PINCONF_ENTRIES7
+/* Output enable */
+#define OE (1 << 27)
+/* Pull Up */
+#define PU (1 << 26)
+/* Open Drain */
+#define OD (1 << 25)
+
+/* User-frendly defines for Pin Direction */
+   /* oe = 0, pu = 0, od = 0 */
+#define IN (0)
+   /* oe = 0, pu = 1, od = 0 */
+#define IN_PU  (PU)
+   /* oe = 1, pu = 0, od = 0 */
+#define OUT(OE)
+   /* oe = 1, pu = 1, od = 0 */
+#define OUT_PU (OE | PU)
+   /* oe = 1, pu = 0, od = 1 */
+#define BIDIR  (OE | OD)
+   /* oe = 1, pu = 1, od = 1 */
+#define BIDIR_PU   (OE | PU | OD)
+
+struct sti_pinctrl_platdata {
+   struct regmap *regmap;
+};
+
+/*
+ * PIO alternative Function selector
+ */
+void sti_alternate_select(struct udevice *dev, struct sti_pin_desc *pin_desc)
+{
+   struct sti_pinctrl_platdata *plat = dev_get_platdata(dev);
+   unsigned long sysconf, *sysconfreg;
+   int alt = pin_desc->alt;
+   int bank = pin_desc->bank;
+   int pin = pin_desc->pin;
+
+   sysconfreg = (unsigned long *)plat->regmap->base;
+
+   switch (bank) {
+   case 0 ... 5:   /* in "SBC Bank" */
+   sysconfreg += bank;
+   break;
+   case 10 ... 20: /* in "FRONT Bank" */
+   sysconfreg += bank - 10;
+   break;
+   case 30 ... 35: /* in "REAR Bank" */
+   sysconfreg += bank - 30;
+   break;
+   case 40 ... 42: /* in "FLASH Bank" */
+   sysconfreg += bank - 40;
+   break;
+   default:
+   BUG();
+   return;
+   }
+
+   sysconf = readl(sysconfreg);
+   bitfield_replace(sysconf, pin * 4, 3, alt);
+   writel(sysconf, sysconfreg);
+}
+
+/* pin configuration */
+void sti_pin_configure(struct udevice *dev, struct sti_pin_desc *pin_desc)
+{
+   struct sti_pinctrl_platdata *plat = dev_get_platdata(dev);
+   int bit;
+   int oe = 0, pu = 0, od = 0;
+   unsigned long *sysconfreg;
+   int bank = pin_desc->bank;
+
+   sysconfreg = (unsigned long *)plat->regmap->base + 40;
+
+   /*
+* NOTE: The PIO configuration for the PIO pins in the
+* "FLASH Bank" are different from all the other banks!
+* Specifically, the output-enable pin control register
+* (SYS_CFG_3040) and the pull-up pin control register
+* (SYS_CFG_3050), are both classed as being "reserved".
+* Hence, we do not write to these registers to configure
+* the OE and PU features for PIOs in this bank. However,
+* the open-drain pin control register (SYS_CFG_3060)
+* follows the style of the other banks, and so we can
+* treat

[U-Boot] [PATCH v2 0/7] Add STMicroelectronics STiH410-B2260 board support

2017-02-02 Thread patrice.chotard

From: Patrice Chotard 

This board is a 96board based on STiH410 SoC.
This series adds basic support with serial, mmc and pinctrl support. 

v2: _ fix remarks from Jaechon Chung on SDHCI patch
_ fix remarks from Antonio Borneo on board patch
_ replace some macro by U-boot generic's one
_ add missing maintainers in recipients

Patrice Chotard (7):
  arm: Add support for STMicroelectronics STiH410 soc
  board: Add STMicroelectronics STiH410-B2260 support
  STiH410: Add STi serial driver
  STiH410: Add STi SDHCI driver
  STiH410: add STi pinctrl driver
  STiH410-B2260: add device tree
  STIH410-B2260: Add STiH410-B2260 defconfig

 arch/arm/Kconfig  |   13 +
 arch/arm/Makefile |1 +
 arch/arm/dts/Makefile |2 +
 arch/arm/dts/st-pincfg.h  |   71 ++
 arch/arm/dts/stih407-clock.dtsi   |  326 ++
 arch/arm/dts/stih407-family.dtsi  |  977 +++
 arch/arm/dts/stih407-pinctrl.dtsi | 1303 +
 arch/arm/dts/stih410-b2260.dts|  225 
 arch/arm/dts/stih410-clock.dtsi   |  347 ++
 arch/arm/dts/stih410-pinctrl.dtsi |   34 +
 arch/arm/dts/stih410.dtsi |  454 +++
 arch/arm/include/asm/arch-stih410/gpio.h  |   20 +
 arch/arm/include/asm/arch-stih410/sdhci.h |   69 ++
 arch/arm/include/asm/arch-stih410/sti.h   |   20 +
 arch/arm/include/asm/arch-stih410/syscfg.h|   20 +
 arch/arm/mach-sti/Kconfig |   31 +
 arch/arm/mach-sti/Makefile|8 +
 arch/arm/mach-sti/cpu.c   |   16 +
 arch/arm/mach-sti/timer.c |   47 +
 board/st/stih410-b2260/Kconfig|   19 +
 board/st/stih410-b2260/MAINTAINERS|6 +
 board/st/stih410-b2260/Makefile   |8 +
 board/st/stih410-b2260/board.c|   40 +
 configs/stih410-b2260_defconfig   |   22 +
 drivers/mmc/Kconfig   |7 +
 drivers/mmc/Makefile  |1 +
 drivers/mmc/sti_sdhci.c   |  140 +++
 drivers/pinctrl/Kconfig   |   10 +
 drivers/pinctrl/Makefile  |1 +
 drivers/pinctrl/pinctrl-sti.c |  315 +
 drivers/serial/Kconfig|7 +
 drivers/serial/Makefile   |1 +
 drivers/serial/serial_sti_asc.c   |  219 
 include/configs/stih410-b2260.h   |   59 +
 include/dm/platform_data/serial_sti_asc.h |   17 +
 include/dt-bindings/clock/stih407-clks.h  |   90 ++
 include/dt-bindings/clock/stih410-clks.h  |   25 +
 include/dt-bindings/interrupt-controller/irq-st.h |   30 +
 include/dt-bindings/mfd/st-lpc.h  |   16 +
 include/dt-bindings/reset/stih407-resets.h|   65 +
 40 files changed, 5082 insertions(+)
 create mode 100644 arch/arm/dts/st-pincfg.h
 create mode 100644 arch/arm/dts/stih407-clock.dtsi
 create mode 100644 arch/arm/dts/stih407-family.dtsi
 create mode 100644 arch/arm/dts/stih407-pinctrl.dtsi
 create mode 100644 arch/arm/dts/stih410-b2260.dts
 create mode 100644 arch/arm/dts/stih410-clock.dtsi
 create mode 100644 arch/arm/dts/stih410-pinctrl.dtsi
 create mode 100644 arch/arm/dts/stih410.dtsi
 create mode 100644 arch/arm/include/asm/arch-stih410/gpio.h
 create mode 100644 arch/arm/include/asm/arch-stih410/sdhci.h
 create mode 100644 arch/arm/include/asm/arch-stih410/sti.h
 create mode 100644 arch/arm/include/asm/arch-stih410/syscfg.h
 create mode 100644 arch/arm/mach-sti/Kconfig
 create mode 100644 arch/arm/mach-sti/Makefile
 create mode 100644 arch/arm/mach-sti/cpu.c
 create mode 100644 arch/arm/mach-sti/timer.c
 create mode 100644 board/st/stih410-b2260/Kconfig
 create mode 100644 board/st/stih410-b2260/MAINTAINERS
 create mode 100644 board/st/stih410-b2260/Makefile
 create mode 100644 board/st/stih410-b2260/board.c
 create mode 100644 configs/stih410-b2260_defconfig
 create mode 100644 drivers/mmc/sti_sdhci.c
 create mode 100644 drivers/pinctrl/pinctrl-sti.c
 create mode 100644 drivers/serial/serial_sti_asc.c
 create mode 100644 include/configs/stih410-b2260.h
 create mode 100644 include/dm/platform_data/serial_sti_asc.h
 create mode 100644 include/dt-bindings/clock/stih407-clks.h
 create mode 100644 include/dt-bindings/clock/stih410-clks.h
 create mode 100644 include/dt-bindings/interrupt-controller/irq-st.h
 create mode 100644 include/dt-bindings/mfd/st-lpc.h
 create mode 100644 include/dt-bindings/reset/stih407-resets.h

-- 
1.9.1

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[U-Boot] [PATCH v2 3/7] STiH410: Add STi serial driver

2017-02-02 Thread patrice.chotard

From: Patrice Chotard 

This patch adds support to ASC (asynchronous serial controller)
driver, which is basically a standard serial driver. This IP
is common across other STMicroelectronics SoCs

Signed-off-by: Patrice Chotard 
---
 arch/arm/Kconfig  |   2 +
 arch/arm/include/asm/arch-stih410/sti.h   |   6 +
 board/st/stih410-b2260/board.c|  12 ++
 drivers/serial/Kconfig|   7 +
 drivers/serial/Makefile   |   1 +
 drivers/serial/serial_sti_asc.c   | 219 ++
 include/configs/stih410-b2260.h   |   1 +
 include/dm/platform_data/serial_sti_asc.h |  17 +++
 8 files changed, 265 insertions(+)
 create mode 100644 drivers/serial/serial_sti_asc.c
 create mode 100644 include/dm/platform_data/serial_sti_asc.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 4aa5eb9..b91a5b7 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -985,6 +985,8 @@ config STM32
 config ARCH_STI
bool "Support STMicrolectronics SoCs"
select CPU_V7
+   select DM
+   select DM_SERIAL
help
  Support for STMicroelectronics STiH407/10 SoC family.
  This SoC is used on Linaro 96Board STiH410-B2260
diff --git a/arch/arm/include/asm/arch-stih410/sti.h 
b/arch/arm/include/asm/arch-stih410/sti.h
index d35c4f0..f167560 100644
--- a/arch/arm/include/asm/arch-stih410/sti.h
+++ b/arch/arm/include/asm/arch-stih410/sti.h
@@ -11,4 +11,10 @@
 #define STI_A9_CONFIG_BASE 0x0876
 #define STI_A9_GLOBAL_TIMER_BASE   (STI_A9_CONFIG_BASE + 0x0200)
 
+/* STiH410 control registers */
+#define STIH410_COMMS_BASE 0x0980
+
+/* ASC UART located in the main "COMMs" block */
+#define STIH410_ASC1_BASE (STIH410_COMMS_BASE + 0x00031000)
+
 #endif /* _STI_H_ */
diff --git a/board/st/stih410-b2260/board.c b/board/st/stih410-b2260/board.c
index 0c06bca..b2cfa7f 100644
--- a/board/st/stih410-b2260/board.c
+++ b/board/st/stih410-b2260/board.c
@@ -7,6 +7,9 @@
  */
 
 #include 
+#include 
+#include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -26,3 +29,12 @@ int board_init(void)
 {
return 0;
 }
+
+static const struct sti_asc_serial_platdata serial_platdata = {
+   .base = (struct sti_asc_uart *)STIH410_ASC1_BASE,
+};
+
+U_BOOT_DEVICE(sti_asc) = {
+   .name = "serial_sti_asc",
+   .platdata = _platdata,
+};
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index b11f3ff..7557632 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -413,4 +413,11 @@ config PXA_SERIAL
  If you have a machine based on a Marvell XScale PXA2xx CPU you
  can enable its onboard serial ports by enabling this option.
 
+config STI_ASC_SERIAL
+   bool "STMicroelectronics on-chip UART"
+   depends on DM_SERIAL && ARCH_STI
+   help
+ Select this to enable Asynchronous Serial Controller available
+ on STiH410 SoC.
+
 endmenu
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 8430668..84a22ce 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -41,6 +41,7 @@ obj-$(CONFIG_FSL_LINFLEXUART) += serial_linflexuart.o
 obj-$(CONFIG_ARC_SERIAL) += serial_arc.o
 obj-$(CONFIG_UNIPHIER_SERIAL) += serial_uniphier.o
 obj-$(CONFIG_STM32_SERIAL) += serial_stm32.o
+obj-$(CONFIG_STI_ASC_SERIAL) += serial_sti_asc.o
 obj-$(CONFIG_PIC32_SERIAL) += serial_pic32.o
 obj-$(CONFIG_STM32X7_SERIAL) += serial_stm32x7.o
 obj-$(CONFIG_BCM283X_MU_SERIAL) += serial_bcm283x_mu.o
diff --git a/drivers/serial/serial_sti_asc.c b/drivers/serial/serial_sti_asc.c
new file mode 100644
index 000..5279836
--- /dev/null
+++ b/drivers/serial/serial_sti_asc.c
@@ -0,0 +1,219 @@
+/*
+ * Support for Serial I/O using STMicroelectronics' on-chip ASC.
+ *
+ *  Copyright (c) 2017
+ *  Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define BAUDMODE   0x1000
+#define RXENABLE   0x0100
+#define RUN0x0080
+#define MODE   0x0001
+#define MODE_8BIT  0x0001
+#define STOP_1BIT  0x0008
+#define PARITYODD  0x0020
+
+#define STA_TF 0x0200
+#define STA_RBF0x0001
+
+struct sti_asc_uart {
+   u32 baudrate;
+   u32 txbuf;
+   u32 rxbuf;
+   u32 control;
+   u32 inten;
+   u32 status;
+   u32 guardtime;
+   u32 timeout;
+   u32 txreset;
+   u32 rxreset;
+};
+
+/* Values for the BAUDRATE Register ---*/
+#define PCLK   (200ul * 100ul)
+#define BAUDRATE_VAL_M0(bps)   (PCLK / (16 * (bps)))
+#define BAUDRATE_VAL_M1(bps)   ((bps * (1 << 14)) + (1<<13)) / (PCLK/(1 << 6))
+
+/*
+ * MODE 0
+ *   ICCLK
+ * ASCBaudRate =   
+ *

[U-Boot] [PATCH v2 2/7] board: Add STMicroelectronics STiH410-B2260 support

2017-02-02 Thread patrice.chotard

From: Patrice Chotard 

This is a 96Board compliant board based on STiH410 SoC:
  - 1GB DDR
  - On-Board USB combo WiFi/Bluetooth RTL8723BU
with PCB soldered antenna
  - Ethernet 1000-BaseT
  - SAtA
  - HDMI
  - 2 x USB2.0 type A
  - 1 x USB2.0 type micro-AB
  - SD card slot
  - High speed connector (SD/I2C/USB interfaces)
  - Low speed connector (UART/I2C/GPIO/SPI/PCM interfaces)

Signed-off-by: Patrice Chotard 
---
 board/st/stih410-b2260/Kconfig | 19 +
 board/st/stih410-b2260/MAINTAINERS |  6 
 board/st/stih410-b2260/Makefile|  8 ++
 board/st/stih410-b2260/board.c | 28 ++
 include/configs/stih410-b2260.h| 58 ++
 5 files changed, 119 insertions(+)
 create mode 100644 board/st/stih410-b2260/Kconfig
 create mode 100644 board/st/stih410-b2260/MAINTAINERS
 create mode 100644 board/st/stih410-b2260/Makefile
 create mode 100644 board/st/stih410-b2260/board.c
 create mode 100644 include/configs/stih410-b2260.h

diff --git a/board/st/stih410-b2260/Kconfig b/board/st/stih410-b2260/Kconfig
new file mode 100644
index 000..590add0
--- /dev/null
+++ b/board/st/stih410-b2260/Kconfig
@@ -0,0 +1,19 @@
+if TARGET_STIH410_B2260
+
+config SYS_BOARD
+   string
+   default "stih410-b2260"
+
+config SYS_VENDOR
+   string
+   default "st"
+
+config SYS_SOC
+   string
+   default "stih410"
+
+config SYS_CONFIG_NAME
+   string
+   default "stih410-b2260"
+
+endif
diff --git a/board/st/stih410-b2260/MAINTAINERS 
b/board/st/stih410-b2260/MAINTAINERS
new file mode 100644
index 000..e78c69a
--- /dev/null
+++ b/board/st/stih410-b2260/MAINTAINERS
@@ -0,0 +1,6 @@
+STIH410-B2260 BOARD
+M: Patrice Chotard 
+S: Maintained
+F: board/st/stih410-b2260/
+F: include/configs/stih410-b2260.h
+F: configs/stih410-b2260_defconfig
diff --git a/board/st/stih410-b2260/Makefile b/board/st/stih410-b2260/Makefile
new file mode 100644
index 000..68a7903
--- /dev/null
+++ b/board/st/stih410-b2260/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2017
+# Patrice Chotard, 
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y  = board.o
diff --git a/board/st/stih410-b2260/board.c b/board/st/stih410-b2260/board.c
new file mode 100644
index 000..0c06bca
--- /dev/null
+++ b/board/st/stih410-b2260/board.c
@@ -0,0 +1,28 @@
+/*
+ * Board init file for STiH410-B2260
+ *
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+   gd->ram_size = PHYS_SDRAM_1_SIZE;
+   return 0;
+}
+
+void dram_init_banksize(void)
+{
+   gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+   gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+}
+
+int board_init(void)
+{
+   return 0;
+}
diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h
new file mode 100644
index 000..fade7a1
--- /dev/null
+++ b/include/configs/stih410-b2260.h
@@ -0,0 +1,58 @@
+/*
+ * (C) Copyright 2017
+ * Patrice Chotard, 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/* ram memory-related information */
+#define CONFIG_NR_DRAM_BANKS   1
+#define PHYS_SDRAM_1   0x4000
+#define CONFIG_SYS_SDRAM_BASE  PHYS_SDRAM_1
+#define PHYS_SDRAM_1_SIZE  0x3FE0
+#define CONFIG_SYS_TEXT_BASE   0x7D60
+#define CONFIG_SYS_LOAD_ADDR   PHYS_SDRAM_1/* default load addr */
+
+#define CONFIG_BAUDRATE115200
+
+#define CONFIG_SYS_HZ_CLOCK10  /* 1 GHz */
+
+/* Libraries */
+#define CONFIG_MD5
+
+#define CONFIG_BOOTARGS
\
+   "console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
+
+/* Environment */
+#define CONFIG_EXTRA_ENV_SETTINGS \
+   "board= B2260" \
+   "load_addr= #CONFIG_SYS_LOAD_ADDR \0"
+
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_SIZE 0x4000
+#define CONFIG_SYS_NO_FLASH
+
+/* Extra Commands */
+#define CONFIG_CMD_ASKENV
+
+#define CONFIG_SETUP_MEMORY_TAGS
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN  0x180
+#define CONFIG_SYS_GBL_DATA_SIZE   1024/* Global data structures */
+#define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_TEXT_BASE - \
+CONFIG_SYS_MALLOC_LEN - \
+CONFIG_SYS_GBL_DATA_SIZE)
+
+/* Monitor Command Prompt */
+#define CONFIG_SYS_CBSIZE  1024/* Console I/O Buffer Size */
+
+#define CONFIG_SYS_MAXARGS 16  /* max number of command args */
+#define CONFIG_SYS_MAX_FLASH_BANKS 1
+
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+#endif /* __CONFIG_H */
-- 
1.9.1

[U-Boot] [PATCH 0/7] Add STMicroelectronics STiH410-B2260 board support

2017-02-02 Thread patrice.chotard

From: Patrice Chotard 

This board is a 96board based on STiH410 SoC.
This series adds basic support with serial, mmc and pinctrl support. 

v2: _ fix remarks from Jaechon Chung on SDHCI patch
_ fix remarks from Antonio Borneo on board patch
_ replace some macro by U-boot generic's one
_ add missing maintainers in recipients


Patrice Chotard (7):
  arm: Add support for STMicroelectronics STiH410 soc
  board: Add STMicroelectronics STiH410-B2260 support
  STiH410: Add STi serial driver
  STiH410: Add STi SDHCI driver
  STiH410: add STi pinctrl driver
  STiH410-B2260: add device tree
  STIH410-B2260: Add STiH410-B2260 defconfig

 arch/arm/Kconfig  |   13 +
 arch/arm/Makefile |1 +
 arch/arm/dts/Makefile |2 +
 arch/arm/dts/st-pincfg.h  |   71 ++
 arch/arm/dts/stih407-clock.dtsi   |  326 ++
 arch/arm/dts/stih407-family.dtsi  |  977 +++
 arch/arm/dts/stih407-pinctrl.dtsi | 1303 +
 arch/arm/dts/stih410-b2260.dts|  225 
 arch/arm/dts/stih410-clock.dtsi   |  347 ++
 arch/arm/dts/stih410-pinctrl.dtsi |   34 +
 arch/arm/dts/stih410.dtsi |  454 +++
 arch/arm/include/asm/arch-stih410/gpio.h  |   20 +
 arch/arm/include/asm/arch-stih410/sdhci.h |   69 ++
 arch/arm/include/asm/arch-stih410/sti.h   |   20 +
 arch/arm/include/asm/arch-stih410/syscfg.h|   20 +
 arch/arm/mach-sti/Kconfig |   31 +
 arch/arm/mach-sti/Makefile|8 +
 arch/arm/mach-sti/cpu.c   |   16 +
 arch/arm/mach-sti/timer.c |   47 +
 board/st/stih410-b2260/Kconfig|   19 +
 board/st/stih410-b2260/MAINTAINERS|6 +
 board/st/stih410-b2260/Makefile   |8 +
 board/st/stih410-b2260/board.c|   40 +
 configs/stih410-b2260_defconfig   |   22 +
 drivers/mmc/Kconfig   |7 +
 drivers/mmc/Makefile  |1 +
 drivers/mmc/sti_sdhci.c   |  140 +++
 drivers/pinctrl/Kconfig   |   10 +
 drivers/pinctrl/Makefile  |1 +
 drivers/pinctrl/pinctrl-sti.c |  315 +
 drivers/serial/Kconfig|7 +
 drivers/serial/Makefile   |1 +
 drivers/serial/serial_sti_asc.c   |  219 
 include/configs/stih410-b2260.h   |   59 +
 include/dm/platform_data/serial_sti_asc.h |   17 +
 include/dt-bindings/clock/stih407-clks.h  |   90 ++
 include/dt-bindings/clock/stih410-clks.h  |   25 +
 include/dt-bindings/interrupt-controller/irq-st.h |   30 +
 include/dt-bindings/mfd/st-lpc.h  |   16 +
 include/dt-bindings/reset/stih407-resets.h|   65 +
 40 files changed, 5082 insertions(+)
 create mode 100644 arch/arm/dts/st-pincfg.h
 create mode 100644 arch/arm/dts/stih407-clock.dtsi
 create mode 100644 arch/arm/dts/stih407-family.dtsi
 create mode 100644 arch/arm/dts/stih407-pinctrl.dtsi
 create mode 100644 arch/arm/dts/stih410-b2260.dts
 create mode 100644 arch/arm/dts/stih410-clock.dtsi
 create mode 100644 arch/arm/dts/stih410-pinctrl.dtsi
 create mode 100644 arch/arm/dts/stih410.dtsi
 create mode 100644 arch/arm/include/asm/arch-stih410/gpio.h
 create mode 100644 arch/arm/include/asm/arch-stih410/sdhci.h
 create mode 100644 arch/arm/include/asm/arch-stih410/sti.h
 create mode 100644 arch/arm/include/asm/arch-stih410/syscfg.h
 create mode 100644 arch/arm/mach-sti/Kconfig
 create mode 100644 arch/arm/mach-sti/Makefile
 create mode 100644 arch/arm/mach-sti/cpu.c
 create mode 100644 arch/arm/mach-sti/timer.c
 create mode 100644 board/st/stih410-b2260/Kconfig
 create mode 100644 board/st/stih410-b2260/MAINTAINERS
 create mode 100644 board/st/stih410-b2260/Makefile
 create mode 100644 board/st/stih410-b2260/board.c
 create mode 100644 configs/stih410-b2260_defconfig
 create mode 100644 drivers/mmc/sti_sdhci.c
 create mode 100644 drivers/pinctrl/pinctrl-sti.c
 create mode 100644 drivers/serial/serial_sti_asc.c
 create mode 100644 include/configs/stih410-b2260.h
 create mode 100644 include/dm/platform_data/serial_sti_asc.h
 create mode 100644 include/dt-bindings/clock/stih407-clks.h
 create mode 100644 include/dt-bindings/clock/stih410-clks.h
 create mode 100644 include/dt-bindings/interrupt-controller/irq-st.h
 create mode 100644 include/dt-bindings/mfd/st-lpc.h
 create mode 100644 include/dt-bindings/reset/stih407-resets.h

-- 

1.9.1

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[U-Boot] [PATCH 4/7] STiH410: Add STi SDHCI driver

2017-02-02 Thread patrice.chotard

From: Patrice Chotard 

Add SDHCI host controller found on STMicroelctronics SoCs

Signed-off-by: Patrice Chotard 
---
 arch/arm/Kconfig  |   2 +
 arch/arm/include/asm/arch-stih410/sdhci.h |  69 +++
 drivers/mmc/Kconfig   |   7 ++
 drivers/mmc/Makefile  |   1 +
 drivers/mmc/sti_sdhci.c   | 140 ++
 5 files changed, 219 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-stih410/sdhci.h
 create mode 100644 drivers/mmc/sti_sdhci.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b91a5b7..477f36b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -987,6 +987,8 @@ config ARCH_STI
select CPU_V7
select DM
select DM_SERIAL
+   select BLK
+   select DM_MMC
help
  Support for STMicroelectronics STiH407/10 SoC family.
  This SoC is used on Linaro 96Board STiH410-B2260
diff --git a/arch/arm/include/asm/arch-stih410/sdhci.h 
b/arch/arm/include/asm/arch-stih410/sdhci.h
new file mode 100644
index 000..f45b961
--- /dev/null
+++ b/arch/arm/include/asm/arch-stih410/sdhci.h
@@ -0,0 +1,69 @@
+/*
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __STI_SDHCI_H__
+#define __STI_SDHCI_H__
+
+#define FLASHSS_MMC_CORE_CONFIG_1  0x400
+#define FLASHSS_MMC_CORECFG_TIMEOUT_CLK_UNIT_MHZ   BIT(24)
+#define FLASHSS_MMC_CORECFG_TIMEOUT_CLK_FREQ_MIN   BIT(12)
+
+#define STI_FLASHSS_MMC_CORE_CONFIG_1  \
+   (FLASHSS_MMC_CORECFG_TIMEOUT_CLK_UNIT_MHZ   | \
+FLASHSS_MMC_CORECFG_TIMEOUT_CLK_FREQ_MIN)
+
+#define FLASHSS_MMC_CORE_CONFIG_2  0x404
+#define FLASHSS_MMC_CORECFG_HIGH_SPEED BIT(28)
+#define FLASHSS_MMC_CORECFG_8BIT_EMMC  BIT(20)
+#define MAX_BLK_LENGTH_1024BIT(16)
+#define BASE_CLK_FREQ_200  0xc8
+
+
+#define STI_FLASHSS_MMC_CORE_CONFIG2   \
+   (FLASHSS_MMC_CORECFG_HIGH_SPEED | \
+FLASHSS_MMC_CORECFG_8BIT_EMMC  | \
+MAX_BLK_LENGTH_1024| \
+BASE_CLK_FREQ_200 << 0)
+
+#define STI_FLASHSS_SDCARD_CORE_CONFIG2\
+   (FLASHSS_MMC_CORECFG_HIGH_SPEED | \
+MAX_BLK_LENGTH_1024| \
+BASE_CLK_FREQ_200)
+
+#define FLASHSS_MMC_CORE_CONFIG_3  0x408
+#define FLASHSS_MMC_CORECFG_SLOT_TYPE_EMMC BIT(28)
+#define FLASHSS_MMC_CORECFG_ASYNCH_INTR_SUPPORTBIT(20)
+#define FLASHSS_MMC_CORECFG_3P3_VOLT   BIT(8)
+#define FLASHSS_MMC_CORECFG_SUSP_RES_SUPPORT   BIT(4)
+#define FLASHSS_MMC_CORECFG_SDMA   BIT(0)
+
+#define STI_FLASHSS_MMC_CORE_CONFIG3   \
+(FLASHSS_MMC_CORECFG_SLOT_TYPE_EMMC| \
+FLASHSS_MMC_CORECFG_ASYNCH_INTR_SUPPORT| \
+FLASHSS_MMC_CORECFG_3P3_VOLT   | \
+FLASHSS_MMC_CORECFG_SUSP_RES_SUPPORT   | \
+FLASHSS_MMC_CORECFG_SDMA)
+
+#define STI_FLASHSS_SDCARD_CORE_CONFIG3\
+(FLASHSS_MMC_CORECFG_ASYNCH_INTR_SUPPORT   | \
+FLASHSS_MMC_CORECFG_3P3_VOLT   | \
+FLASHSS_MMC_CORECFG_SUSP_RES_SUPPORT   | \
+FLASHSS_MMC_CORECFG_SDMA)
+
+#define FLASHSS_MMC_CORE_CONFIG_4  0x40c
+#define FLASHSS_MMC_CORECFG_D_DRIVER_SUPPORT   BIT(20)
+#define FLASHSS_MMC_CORECFG_C_DRIVER_SUPPORT   BIT(16)
+#define FLASHSS_MMC_CORECFG_A_DRIVER_SUPPORT   BIT(12)
+
+#define STI_FLASHSS_MMC_CORE_CONFIG4   \
+   (FLASHSS_MMC_CORECFG_D_DRIVER_SUPPORT   | \
+FLASHSS_MMC_CORECFG_C_DRIVER_SUPPORT   | \
+FLASHSS_MMC_CORECFG_A_DRIVER_SUPPORT)
+
+#define ST_MMC_CCONFIG_REG_5   0x210
+#define SYSCONF_MMC1_ENABLE_BIT3
+
+#endif /* _STI_SDHCI_H_ */
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 0c07781..dfdec27 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -287,6 +287,13 @@ config MMC_SDHCI_SPEAR
 
  If unsure, say N.
 
+config MMC_SDHCI_STI
+   bool "SDHCI support for STMicroelectronics SoC"
+   depends on MMC_SDHCI
+   help
+ This selects the Secure Digital Host Controller Interface (SDHCI)
+ on STMicroelectronics STiH410 SoC.
+
 config MMC_SDHCI_XENON
bool "SDHCI support for the Xenon SDHCI controller"
depends on MMC_SDHCI && DM_MMC && OF_CONTROL
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index e78bd0d..fc24926 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -62,6 +62,7 @@ obj-$(CONFIG_MMC_SDHCI_PIC32) += pic32_sdhci.o
 obj-$(CONFIG_MMC_SDHCI_ROCKCHIP)   += rockchip_sdhci.o

[U-Boot] [PATCH 6/7] STiH410-B2260: add device tree

2017-01-20 Thread patrice.chotard

From: Patrice Chotard 

This device tree has been extracted from v4.9 kernel

Signed-off-by: Patrice Chotard 
---
 arch/arm/dts/Makefile |3 +
 arch/arm/dts/st-pincfg.h  |   71 ++
 arch/arm/dts/stih407-clock.dtsi   |  326 ++
 arch/arm/dts/stih407-family.dtsi  |  977 +++
 arch/arm/dts/stih407-pinctrl.dtsi | 1303 +
 arch/arm/dts/stih410-b2260.dts|  225 
 arch/arm/dts/stih410-clock.dtsi   |  347 ++
 arch/arm/dts/stih410-pinctrl.dtsi |   34 +
 arch/arm/dts/stih410.dtsi |  454 +++
 drivers/mmc/Kconfig   |2 +-
 include/dt-bindings/clock/stih407-clks.h  |   90 ++
 include/dt-bindings/clock/stih410-clks.h  |   25 +
 include/dt-bindings/interrupt-controller/irq-st.h |   30 +
 include/dt-bindings/mfd/st-lpc.h  |   16 +
 include/dt-bindings/reset/stih407-resets.h|   65 +
 15 files changed, 3967 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/st-pincfg.h
 create mode 100644 arch/arm/dts/stih407-clock.dtsi
 create mode 100644 arch/arm/dts/stih407-family.dtsi
 create mode 100644 arch/arm/dts/stih407-pinctrl.dtsi
 create mode 100644 arch/arm/dts/stih410-b2260.dts
 create mode 100644 arch/arm/dts/stih410-clock.dtsi
 create mode 100644 arch/arm/dts/stih410-pinctrl.dtsi
 create mode 100644 arch/arm/dts/stih410.dtsi
 create mode 100644 include/dt-bindings/clock/stih407-clks.h
 create mode 100644 include/dt-bindings/clock/stih410-clks.h
 create mode 100644 include/dt-bindings/interrupt-controller/irq-st.h
 create mode 100644 include/dt-bindings/mfd/st-lpc.h
 create mode 100644 include/dt-bindings/reset/stih407-resets.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 66ea0b3..2df981f 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -323,6 +323,9 @@ dtb-$(CONFIG_ARCH_BCM283X) += \
bcm2836-rpi-2-b.dtb \
bcm2837-rpi-3-b.dtb
 
+dtb-$(CONFIG_ARCH_STI) += \
+   stih410-b2260.dtb
+
 targets += $(dtb-y)
 
 # Add any required device tree compiler flags here
diff --git a/arch/arm/dts/st-pincfg.h b/arch/arm/dts/st-pincfg.h
new file mode 100644
index 000..4851c38
--- /dev/null
+++ b/arch/arm/dts/st-pincfg.h
@@ -0,0 +1,71 @@
+#ifndef _ST_PINCFG_H_
+#define _ST_PINCFG_H_
+
+/* Alternate functions */
+#define ALT1   1
+#define ALT2   2
+#define ALT3   3
+#define ALT4   4
+#define ALT5   5
+#define ALT6   6
+#define ALT7   7
+
+/* Output enable */
+#define OE (1 << 27)
+/* Pull Up */
+#define PU (1 << 26)
+/* Open Drain */
+#define OD (1 << 25)
+#define RT (1 << 23)
+#define INVERTCLK  (1 << 22)
+#define CLKNOTDATA (1 << 21)
+#define DOUBLE_EDGE(1 << 20)
+#define CLK_A  (0 << 18)
+#define CLK_B  (1 << 18)
+#define CLK_C  (2 << 18)
+#define CLK_D  (3 << 18)
+
+/* User-frendly defines for Pin Direction */
+   /* oe = 0, pu = 0, od = 0 */
+#define IN (0)
+   /* oe = 0, pu = 1, od = 0 */
+#define IN_PU  (PU)
+   /* oe = 1, pu = 0, od = 0 */
+#define OUT(OE)
+   /* oe = 1, pu = 0, od = 1 */
+#define BIDIR  (OE | OD)
+   /* oe = 1, pu = 1, od = 1 */
+#define BIDIR_PU   (OE | PU | OD)
+
+/* RETIME_TYPE */
+/*
+ * B Mode
+ * Bypass retime with optional delay parameter
+ */
+#define BYPASS (0)
+/*
+ * R0, R1, R0D, R1D modes
+ * single-edge data non inverted clock, retime data with clk
+ */
+#define SE_NICLK_IO(RT)
+/*
+ * RIV0, RIV1, RIV0D, RIV1D modes
+ * single-edge data inverted clock, retime data with clk
+ */
+#define SE_ICLK_IO (RT | INVERTCLK)
+/*
+ * R0E, R1E, R0ED, R1ED modes
+ * double-edge data, retime data with clk
+ */
+#define DE_IO  (RT | DOUBLE_EDGE)
+/*
+ * CIV0, CIV1 modes with inverted clock
+ * Retiming the clk pins will park clock & reduce the noise within the core.
+ */
+#define ICLK   (RT | CLKNOTDATA | INVERTCLK)
+/*
+ * CLK0, CLK1 modes with non-inverted clock
+ * Retiming the clk pins will park clock & reduce the noise within the core.
+ */
+#define NICLK  (RT | CLKNOTDATA)
+#endif /* _ST_PINCFG_H_ */
diff --git a/arch/arm/dts/stih407-clock.dtsi b/arch/arm/dts/stih407-clock.dtsi
new file mode 100644
index 000..13029c0
--- /dev/null
+++ b/arch/arm/dts/stih407-clock.dtsi
@@ -0,0 +1,326 @@
+/*
+ * Copyright (C) 2014 STMicroelectronics R Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include 
+/ {

[U-Boot] [PATCH 4/7] STiH410: Add STi SDHCI driver

2017-01-20 Thread patrice.chotard

From: Patrice Chotard 

Signed-off-by: Patrice Chotard 
---
 arch/arm/Kconfig  |   2 +
 arch/arm/include/asm/arch-stih410/sdhci.h |  69 +++
 arch/arm/include/asm/arch-stih410/sti.h   |   5 ++
 board/st/stih410-b2260/board.c|   3 +
 drivers/mmc/Kconfig   |   7 ++
 drivers/mmc/Makefile  |   1 +
 drivers/mmc/sti_sdhci.c   | 137 ++
 include/configs/stih410-b2260.h   |   4 +
 include/dm/platform_data/sti_sdhci.h  |  17 
 9 files changed, 245 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-stih410/sdhci.h
 create mode 100644 drivers/mmc/sti_sdhci.c
 create mode 100644 include/dm/platform_data/sti_sdhci.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 98546ae..9a472e6 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -897,6 +897,8 @@ config ARCH_STI
select CPU_V7
select DM
select DM_SERIAL
+   select BLK
+   select DM_MMC
help
  Support for STMicroelectronics STiH407/10 SoC family.
  This SoC is used on Linaro 96Board STiH410-B2260
diff --git a/arch/arm/include/asm/arch-stih410/sdhci.h 
b/arch/arm/include/asm/arch-stih410/sdhci.h
new file mode 100644
index 000..f45b961
--- /dev/null
+++ b/arch/arm/include/asm/arch-stih410/sdhci.h
@@ -0,0 +1,69 @@
+/*
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __STI_SDHCI_H__
+#define __STI_SDHCI_H__
+
+#define FLASHSS_MMC_CORE_CONFIG_1  0x400
+#define FLASHSS_MMC_CORECFG_TIMEOUT_CLK_UNIT_MHZ   BIT(24)
+#define FLASHSS_MMC_CORECFG_TIMEOUT_CLK_FREQ_MIN   BIT(12)
+
+#define STI_FLASHSS_MMC_CORE_CONFIG_1  \
+   (FLASHSS_MMC_CORECFG_TIMEOUT_CLK_UNIT_MHZ   | \
+FLASHSS_MMC_CORECFG_TIMEOUT_CLK_FREQ_MIN)
+
+#define FLASHSS_MMC_CORE_CONFIG_2  0x404
+#define FLASHSS_MMC_CORECFG_HIGH_SPEED BIT(28)
+#define FLASHSS_MMC_CORECFG_8BIT_EMMC  BIT(20)
+#define MAX_BLK_LENGTH_1024BIT(16)
+#define BASE_CLK_FREQ_200  0xc8
+
+
+#define STI_FLASHSS_MMC_CORE_CONFIG2   \
+   (FLASHSS_MMC_CORECFG_HIGH_SPEED | \
+FLASHSS_MMC_CORECFG_8BIT_EMMC  | \
+MAX_BLK_LENGTH_1024| \
+BASE_CLK_FREQ_200 << 0)
+
+#define STI_FLASHSS_SDCARD_CORE_CONFIG2\
+   (FLASHSS_MMC_CORECFG_HIGH_SPEED | \
+MAX_BLK_LENGTH_1024| \
+BASE_CLK_FREQ_200)
+
+#define FLASHSS_MMC_CORE_CONFIG_3  0x408
+#define FLASHSS_MMC_CORECFG_SLOT_TYPE_EMMC BIT(28)
+#define FLASHSS_MMC_CORECFG_ASYNCH_INTR_SUPPORTBIT(20)
+#define FLASHSS_MMC_CORECFG_3P3_VOLT   BIT(8)
+#define FLASHSS_MMC_CORECFG_SUSP_RES_SUPPORT   BIT(4)
+#define FLASHSS_MMC_CORECFG_SDMA   BIT(0)
+
+#define STI_FLASHSS_MMC_CORE_CONFIG3   \
+(FLASHSS_MMC_CORECFG_SLOT_TYPE_EMMC| \
+FLASHSS_MMC_CORECFG_ASYNCH_INTR_SUPPORT| \
+FLASHSS_MMC_CORECFG_3P3_VOLT   | \
+FLASHSS_MMC_CORECFG_SUSP_RES_SUPPORT   | \
+FLASHSS_MMC_CORECFG_SDMA)
+
+#define STI_FLASHSS_SDCARD_CORE_CONFIG3\
+(FLASHSS_MMC_CORECFG_ASYNCH_INTR_SUPPORT   | \
+FLASHSS_MMC_CORECFG_3P3_VOLT   | \
+FLASHSS_MMC_CORECFG_SUSP_RES_SUPPORT   | \
+FLASHSS_MMC_CORECFG_SDMA)
+
+#define FLASHSS_MMC_CORE_CONFIG_4  0x40c
+#define FLASHSS_MMC_CORECFG_D_DRIVER_SUPPORT   BIT(20)
+#define FLASHSS_MMC_CORECFG_C_DRIVER_SUPPORT   BIT(16)
+#define FLASHSS_MMC_CORECFG_A_DRIVER_SUPPORT   BIT(12)
+
+#define STI_FLASHSS_MMC_CORE_CONFIG4   \
+   (FLASHSS_MMC_CORECFG_D_DRIVER_SUPPORT   | \
+FLASHSS_MMC_CORECFG_C_DRIVER_SUPPORT   | \
+FLASHSS_MMC_CORECFG_A_DRIVER_SUPPORT)
+
+#define ST_MMC_CCONFIG_REG_5   0x210
+#define SYSCONF_MMC1_ENABLE_BIT3
+
+#endif /* _STI_SDHCI_H_ */
diff --git a/arch/arm/include/asm/arch-stih410/sti.h 
b/arch/arm/include/asm/arch-stih410/sti.h
index f167560..d9e6f03 100644
--- a/arch/arm/include/asm/arch-stih410/sti.h
+++ b/arch/arm/include/asm/arch-stih410/sti.h
@@ -17,4 +17,9 @@
 /* ASC UART located in the main "COMMs" block */
 #define STIH410_ASC1_BASE (STIH410_COMMS_BASE + 0x00031000)
 
+/* MMC Controller Base (in the FlashSS) */
+#define STIH410_FLASH_IF_REG1_BASE 0x0906
+#define STIH410_CONFIG_SYS_FLASHSS_PORT1_BASE  STIH410_FLASH_IF_REG1_BASE
+#define STIH410_CONFIG_SYS_MMC0_BASE   
STIH410_CONFIG_SYS_FLASHSS_PORT1_BASE   /* MMC #0 */
+
 #endif /* _STI_H_ */
diff

[U-Boot] [PATCH 2/7] board: Add STMicroelectronics STiH410-B2260 support

2017-01-20 Thread patrice.chotard

From: Patrice Chotard 

This board is a 96Board based on STMicrolectronics
STiH410 soc:
  - 1GB DDR
  - On-Board USB combo WiFi/Bluetooth RTL8723BU
with PCB soldered antenna
  - Ethernet 1000-BaseT
  - Sata
  - HDMI
  - 2 x USB2 type A
  - micro USB2 type AB
  - SD card slot
  - High speed connector (SD/I2C/USB interfaces)
  - Slow speed connector (UART/I2C/GPIO/SPI/PCM interfaces)

Signed-off-by: Patrice Chotard 
---
 board/st/stih410-b2260/Kconfig | 19 +
 board/st/stih410-b2260/MAINTAINERS |  6 
 board/st/stih410-b2260/Makefile|  8 ++
 board/st/stih410-b2260/board.c | 28 +++
 include/configs/stih410-b2260.h| 56 ++
 5 files changed, 117 insertions(+)
 create mode 100644 board/st/stih410-b2260/Kconfig
 create mode 100644 board/st/stih410-b2260/MAINTAINERS
 create mode 100644 board/st/stih410-b2260/Makefile
 create mode 100644 board/st/stih410-b2260/board.c
 create mode 100644 include/configs/stih410-b2260.h

diff --git a/board/st/stih410-b2260/Kconfig b/board/st/stih410-b2260/Kconfig
new file mode 100644
index 000..590add0
--- /dev/null
+++ b/board/st/stih410-b2260/Kconfig
@@ -0,0 +1,19 @@
+if TARGET_STIH410_B2260
+
+config SYS_BOARD
+   string
+   default "stih410-b2260"
+
+config SYS_VENDOR
+   string
+   default "st"
+
+config SYS_SOC
+   string
+   default "stih410"
+
+config SYS_CONFIG_NAME
+   string
+   default "stih410-b2260"
+
+endif
diff --git a/board/st/stih410-b2260/MAINTAINERS 
b/board/st/stih410-b2260/MAINTAINERS
new file mode 100644
index 000..e78c69a
--- /dev/null
+++ b/board/st/stih410-b2260/MAINTAINERS
@@ -0,0 +1,6 @@
+STIH410-B2260 BOARD
+M: Patrice Chotard 
+S: Maintained
+F: board/st/stih410-b2260/
+F: include/configs/stih410-b2260.h
+F: configs/stih410-b2260_defconfig
diff --git a/board/st/stih410-b2260/Makefile b/board/st/stih410-b2260/Makefile
new file mode 100644
index 000..68a7903
--- /dev/null
+++ b/board/st/stih410-b2260/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2017
+# Patrice Chotard, 
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y  = board.o
diff --git a/board/st/stih410-b2260/board.c b/board/st/stih410-b2260/board.c
new file mode 100644
index 000..0c06bca
--- /dev/null
+++ b/board/st/stih410-b2260/board.c
@@ -0,0 +1,28 @@
+/*
+ * Board init file for STiH410-B2260
+ *
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+   gd->ram_size = PHYS_SDRAM_1_SIZE;
+   return 0;
+}
+
+void dram_init_banksize(void)
+{
+   gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+   gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+}
+
+int board_init(void)
+{
+   return 0;
+}
diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h
new file mode 100644
index 000..78103c6
--- /dev/null
+++ b/include/configs/stih410-b2260.h
@@ -0,0 +1,56 @@
+/*
+ * (C) Copyright 2017
+ * Patrice Chotard, 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/* ram memory-related information */
+#define CONFIG_NR_DRAM_BANKS   1
+#define PHYS_SDRAM_1   0x4000
+#define CONFIG_SYS_SDRAM_BASE  PHYS_SDRAM_1
+#define PHYS_SDRAM_1_SIZE  0x3FE0
+#define CONFIG_SYS_TEXT_BASE   0x7D60
+#define CONFIG_SYS_LOAD_ADDR   PHYS_SDRAM_1/* default load addr */
+
+#define CONFIG_BAUDRATE115200
+
+#define CONFIG_SYS_HZ_CLOCK10  /* 1 GHz */
+
+/* Libraries */
+#define CONFIG_MD5
+
+#define CONFIG_BOOTARGS
\
+   "console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
+
+/* Environment */
+#define CONFIG_EXTRA_ENV_SETTINGS \
+   "board= B2260" \
+   "load_addr= #CONFIG_SYS_LOAD_ADDR \0"
+
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_SIZE 0x4000
+#define CONFIG_SYS_NO_FLASH
+
+/* Extra Commands */
+#define CONFIG_CMD_ASKENV
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN  0x180
+#define CONFIG_SYS_GBL_DATA_SIZE   1024/* Global data structures */
+#define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_TEXT_BASE - \
+CONFIG_SYS_MALLOC_LEN - \
+CONFIG_SYS_GBL_DATA_SIZE)
+
+/* Monitor Command Prompt */
+#define CONFIG_SYS_CBSIZE  1024/* Console I/O Buffer Size */
+
+#define CONFIG_SYS_MAXARGS 16  /* max number of command args */
+#define CONFIG_SYS_MAX_FLASH_BANKS 1
+
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+#endif /* __CONFIG_H */
-- 
1.9.1

___
U-Boot

[U-Boot] [PATCH 1/7] arm: Add support for STMicroelectronics STiH410 soc

2017-01-20 Thread patrice.chotard

From: Patrice Chotard 

The STiH410 is an advanced multi-HD AVC processor with 3D
graphics acceleration and 1.5-GHz ARM Cortex-A9 SMP CPU
part of the stih407 family.

It has wide connectivity including USB 3.0, PCI-e, SATA
and gigabit ethernet.

Signed-off-by: Patrice Chotard 
---
 arch/arm/Kconfig   |  9 
 arch/arm/Makefile  |  1 +
 arch/arm/include/asm/arch-stih410/gpio.h   | 20 +++
 arch/arm/include/asm/arch-stih410/sti.h| 14 +
 arch/arm/include/asm/arch-stih410/syscfg.h | 87 ++
 arch/arm/mach-sti/Kconfig  | 31 +++
 arch/arm/mach-sti/Makefile |  8 +++
 arch/arm/mach-sti/cpu.c| 16 ++
 arch/arm/mach-sti/timer.c  | 47 
 9 files changed, 233 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-stih410/gpio.h
 create mode 100644 arch/arm/include/asm/arch-stih410/sti.h
 create mode 100644 arch/arm/include/asm/arch-stih410/syscfg.h
 create mode 100644 arch/arm/mach-sti/Kconfig
 create mode 100644 arch/arm/mach-sti/Makefile
 create mode 100644 arch/arm/mach-sti/cpu.c
 create mode 100644 arch/arm/mach-sti/timer.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 0ed36cd..56a017c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -892,6 +892,13 @@ config STM32
select DM
select DM_SERIAL
 
+config ARCH_STI
+   bool "Support STMicrolectronics SoCs"
+   select CPU_V7
+   help
+ Support for STMicroelectronics STiH407/10 SoC family.
+ This SoC is used on Linaro 96Board STiH410-B2260
+
 config ARCH_ROCKCHIP
bool "Support Rockchip SoCs"
select OF_CONTROL
@@ -965,6 +972,8 @@ source "arch/arm/mach-snapdragon/Kconfig"
 
 source "arch/arm/mach-socfpga/Kconfig"
 
+source "arch/arm/mach-sti/Kconfig"
+
 source "arch/arm/mach-stm32/Kconfig"
 
 source "arch/arm/mach-tegra/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 4b8bf80..986e15d 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -71,6 +71,7 @@ machine-$(CONFIG_ARCH_SNAPDRAGON) += snapdragon
 machine-$(CONFIG_ARCH_SOCFPGA) += socfpga
 machine-$(CONFIG_ARCH_RMOBILE) += rmobile
 machine-$(CONFIG_ARCH_ROCKCHIP)+= rockchip
+machine-$(CONFIG_ARCH_STI) += sti
 machine-$(CONFIG_STM32)+= stm32
 machine-$(CONFIG_TEGRA)+= tegra
 machine-$(CONFIG_ARCH_UNIPHIER)+= uniphier
diff --git a/arch/arm/include/asm/arch-stih410/gpio.h 
b/arch/arm/include/asm/arch-stih410/gpio.h
new file mode 100644
index 000..977b3f8
--- /dev/null
+++ b/arch/arm/include/asm/arch-stih410/gpio.h
@@ -0,0 +1,20 @@
+/*
+ * pins definition for STiH410-B2260
+ *
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _STI_GPIO_H_
+#define _STI_GPIO_H_
+
+struct sti_pin_desc {
+   unsigned char bank;
+   unsigned char pin;
+   unsigned char alt;
+   int dir;
+};
+
+#endif /* _STI_GPIO_H_ */
+
diff --git a/arch/arm/include/asm/arch-stih410/sti.h 
b/arch/arm/include/asm/arch-stih410/sti.h
new file mode 100644
index 000..d35c4f0
--- /dev/null
+++ b/arch/arm/include/asm/arch-stih410/sti.h
@@ -0,0 +1,14 @@
+/*
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _STI_H_
+#define _STI_H_
+
+/* A9_GLOBAL_TIMER_BASE */
+#define STI_A9_CONFIG_BASE 0x0876
+#define STI_A9_GLOBAL_TIMER_BASE   (STI_A9_CONFIG_BASE + 0x0200)
+
+#endif /* _STI_H_ */
diff --git a/arch/arm/include/asm/arch-stih410/syscfg.h 
b/arch/arm/include/asm/arch-stih410/syscfg.h
new file mode 100644
index 000..ff7d252
--- /dev/null
+++ b/arch/arm/include/asm/arch-stih410/syscfg.h
@@ -0,0 +1,87 @@
+/*
+ * Configuration/Status Registers for STiH410 SoC
+ *
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _STI_SYSCFG_H_
+#define _STI_SYSCFG_H_
+
+#define STIH410_SYSCONF0_BASE  0x0962 /* 0-999 */
+#define STIH410_SYSCONF1_BASE  0x0928 /* 1000-1999 */
+#define STIH410_SYSCONF2_BASE  0x0929 /* 2000-2999 */
+#define STIH410_SYSCONF3_BASE  0x092a /* 3000-3999 */
+#define STIH410_SYSCONF4_BASE  0x0960 /* 4000-4999 */
+#define STIH410_SYSCONF5_BASE  0x092b /* 5000-5999 */
+#define STIH410_SYSCONF6_BASE  0x092c /* 6000-6999 */
+
+/*
+ * STIH410 System Configuration "accessors"
+ */
+#define STIH410_SYSCFG(x)  \
+   (   \
+   ((x) < 1000)\
+   ? STIH410_SYSCONF0_BASE + ((x)-0)*0x4   \
+

[U-Boot] [PATCH 3/7] STiH410: Add STi serial driver

2017-01-20 Thread patrice.chotard

From: Patrice Chotard 

This patch adds support to ASC (asynchronous serial controller)
driver, which is basically a standard serial driver. This IP
is common across other STMicroelectronics SoCs

Signed-off-by: Patrice Chotard 
---
 arch/arm/Kconfig  |   2 +
 arch/arm/include/asm/arch-stih410/sti.h   |   6 +
 board/st/stih410-b2260/board.c|  13 ++
 drivers/serial/Kconfig|   7 +
 drivers/serial/Makefile   |   1 +
 drivers/serial/serial_sti_asc.c   | 219 ++
 include/configs/stih410-b2260.h   |   1 +
 include/dm/platform_data/serial_sti_asc.h |  17 +++
 8 files changed, 266 insertions(+)
 create mode 100644 drivers/serial/serial_sti_asc.c
 create mode 100644 include/dm/platform_data/serial_sti_asc.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 56a017c..98546ae 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -895,6 +895,8 @@ config STM32
 config ARCH_STI
bool "Support STMicrolectronics SoCs"
select CPU_V7
+   select DM
+   select DM_SERIAL
help
  Support for STMicroelectronics STiH407/10 SoC family.
  This SoC is used on Linaro 96Board STiH410-B2260
diff --git a/arch/arm/include/asm/arch-stih410/sti.h 
b/arch/arm/include/asm/arch-stih410/sti.h
index d35c4f0..f167560 100644
--- a/arch/arm/include/asm/arch-stih410/sti.h
+++ b/arch/arm/include/asm/arch-stih410/sti.h
@@ -11,4 +11,10 @@
 #define STI_A9_CONFIG_BASE 0x0876
 #define STI_A9_GLOBAL_TIMER_BASE   (STI_A9_CONFIG_BASE + 0x0200)
 
+/* STiH410 control registers */
+#define STIH410_COMMS_BASE 0x0980
+
+/* ASC UART located in the main "COMMs" block */
+#define STIH410_ASC1_BASE (STIH410_COMMS_BASE + 0x00031000)
+
 #endif /* _STI_H_ */
diff --git a/board/st/stih410-b2260/board.c b/board/st/stih410-b2260/board.c
index 0c06bca..72b0042 100644
--- a/board/st/stih410-b2260/board.c
+++ b/board/st/stih410-b2260/board.c
@@ -7,6 +7,9 @@
  */
 
 #include 
+#include 
+#include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -26,3 +29,13 @@ int board_init(void)
 {
return 0;
 }
+
+
+static const struct sti_asc_serial_platdata serial_platdata = {
+   .base = (struct sti_asc_uart *)STIH410_ASC1_BASE,
+};
+
+U_BOOT_DEVICE(sti_asc) = {
+   .name = "serial_sti_asc",
+   .platdata = _platdata,
+};
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index b11f3ff..7557632 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -413,4 +413,11 @@ config PXA_SERIAL
  If you have a machine based on a Marvell XScale PXA2xx CPU you
  can enable its onboard serial ports by enabling this option.
 
+config STI_ASC_SERIAL
+   bool "STMicroelectronics on-chip UART"
+   depends on DM_SERIAL && ARCH_STI
+   help
+ Select this to enable Asynchronous Serial Controller available
+ on STiH410 SoC.
+
 endmenu
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 8430668..84a22ce 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -41,6 +41,7 @@ obj-$(CONFIG_FSL_LINFLEXUART) += serial_linflexuart.o
 obj-$(CONFIG_ARC_SERIAL) += serial_arc.o
 obj-$(CONFIG_UNIPHIER_SERIAL) += serial_uniphier.o
 obj-$(CONFIG_STM32_SERIAL) += serial_stm32.o
+obj-$(CONFIG_STI_ASC_SERIAL) += serial_sti_asc.o
 obj-$(CONFIG_PIC32_SERIAL) += serial_pic32.o
 obj-$(CONFIG_STM32X7_SERIAL) += serial_stm32x7.o
 obj-$(CONFIG_BCM283X_MU_SERIAL) += serial_bcm283x_mu.o
diff --git a/drivers/serial/serial_sti_asc.c b/drivers/serial/serial_sti_asc.c
new file mode 100644
index 000..5279836
--- /dev/null
+++ b/drivers/serial/serial_sti_asc.c
@@ -0,0 +1,219 @@
+/*
+ * Support for Serial I/O using STMicroelectronics' on-chip ASC.
+ *
+ *  Copyright (c) 2017
+ *  Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define BAUDMODE   0x1000
+#define RXENABLE   0x0100
+#define RUN0x0080
+#define MODE   0x0001
+#define MODE_8BIT  0x0001
+#define STOP_1BIT  0x0008
+#define PARITYODD  0x0020
+
+#define STA_TF 0x0200
+#define STA_RBF0x0001
+
+struct sti_asc_uart {
+   u32 baudrate;
+   u32 txbuf;
+   u32 rxbuf;
+   u32 control;
+   u32 inten;
+   u32 status;
+   u32 guardtime;
+   u32 timeout;
+   u32 txreset;
+   u32 rxreset;
+};
+
+/* Values for the BAUDRATE Register ---*/
+#define PCLK   (200ul * 100ul)
+#define BAUDRATE_VAL_M0(bps)   (PCLK / (16 * (bps)))
+#define BAUDRATE_VAL_M1(bps)   ((bps * (1 << 14)) + (1<<13)) / (PCLK/(1 << 6))
+
+/*
+ * MODE 0
+ *   ICCLK
+ * ASCBaudRate =   
+ *

[U-Boot] [PATCH 0/7] Add STMicroelectronics STiH410-B2260 board support

2017-01-20 Thread patrice.chotard

From: Patrice Chotard 

This boards is a 96boards based on STiH410 SoC.
This series adds basic support with serial, mmc and pinctrl support. 

Patrice Chotard (7):
  arm: Add support for STMicroelectronics STiH410 soc
  board: Add STMicroelectronics STiH410-B2260 support
  STiH410: Add STi serial driver
  STiH410: Add STi SDHCI driver
  STiH410: add STi pinctrl driver
  STiH410-B2260: add device tree
  STIH410-B2260: Add STiH410-B2260 defconfig

 arch/arm/Kconfig  |   13 +
 arch/arm/Makefile |1 +
 arch/arm/dts/Makefile |3 +
 arch/arm/dts/st-pincfg.h  |   71 ++
 arch/arm/dts/stih407-clock.dtsi   |  326 ++
 arch/arm/dts/stih407-family.dtsi  |  977 +++
 arch/arm/dts/stih407-pinctrl.dtsi | 1303 +
 arch/arm/dts/stih410-b2260.dts|  225 
 arch/arm/dts/stih410-clock.dtsi   |  347 ++
 arch/arm/dts/stih410-pinctrl.dtsi |   34 +
 arch/arm/dts/stih410.dtsi |  454 +++
 arch/arm/include/asm/arch-stih410/gpio.h  |   20 +
 arch/arm/include/asm/arch-stih410/sdhci.h |   69 ++
 arch/arm/include/asm/arch-stih410/sti.h   |   25 +
 arch/arm/include/asm/arch-stih410/syscfg.h|   87 ++
 arch/arm/mach-sti/Kconfig |   31 +
 arch/arm/mach-sti/Makefile|8 +
 arch/arm/mach-sti/cpu.c   |   16 +
 arch/arm/mach-sti/timer.c |   47 +
 board/st/stih410-b2260/Kconfig|   19 +
 board/st/stih410-b2260/MAINTAINERS|6 +
 board/st/stih410-b2260/Makefile   |8 +
 board/st/stih410-b2260/board.c|   44 +
 configs/stih410-b2260_defconfig   |   22 +
 drivers/mmc/Kconfig   |7 +
 drivers/mmc/Makefile  |1 +
 drivers/mmc/sti_sdhci.c   |  137 +++
 drivers/pinctrl/Kconfig   |   10 +
 drivers/pinctrl/Makefile  |1 +
 drivers/pinctrl/pinctrl-sti.c |  311 +
 drivers/serial/Kconfig|7 +
 drivers/serial/Makefile   |1 +
 drivers/serial/serial_sti_asc.c   |  219 
 include/configs/stih410-b2260.h   |   61 +
 include/dm/platform_data/serial_sti_asc.h |   17 +
 include/dm/platform_data/sti_sdhci.h  |   17 +
 include/dt-bindings/clock/stih407-clks.h  |   90 ++
 include/dt-bindings/clock/stih410-clks.h  |   25 +
 include/dt-bindings/interrupt-controller/irq-st.h |   30 +
 include/dt-bindings/mfd/st-lpc.h  |   16 +
 include/dt-bindings/reset/stih407-resets.h|   65 +
 41 files changed, 5171 insertions(+)
 create mode 100644 arch/arm/dts/st-pincfg.h
 create mode 100644 arch/arm/dts/stih407-clock.dtsi
 create mode 100644 arch/arm/dts/stih407-family.dtsi
 create mode 100644 arch/arm/dts/stih407-pinctrl.dtsi
 create mode 100644 arch/arm/dts/stih410-b2260.dts
 create mode 100644 arch/arm/dts/stih410-clock.dtsi
 create mode 100644 arch/arm/dts/stih410-pinctrl.dtsi
 create mode 100644 arch/arm/dts/stih410.dtsi
 create mode 100644 arch/arm/include/asm/arch-stih410/gpio.h
 create mode 100644 arch/arm/include/asm/arch-stih410/sdhci.h
 create mode 100644 arch/arm/include/asm/arch-stih410/sti.h
 create mode 100644 arch/arm/include/asm/arch-stih410/syscfg.h
 create mode 100644 arch/arm/mach-sti/Kconfig
 create mode 100644 arch/arm/mach-sti/Makefile
 create mode 100644 arch/arm/mach-sti/cpu.c
 create mode 100644 arch/arm/mach-sti/timer.c
 create mode 100644 board/st/stih410-b2260/Kconfig
 create mode 100644 board/st/stih410-b2260/MAINTAINERS
 create mode 100644 board/st/stih410-b2260/Makefile
 create mode 100644 board/st/stih410-b2260/board.c
 create mode 100644 configs/stih410-b2260_defconfig
 create mode 100644 drivers/mmc/sti_sdhci.c
 create mode 100644 drivers/pinctrl/pinctrl-sti.c
 create mode 100644 drivers/serial/serial_sti_asc.c
 create mode 100644 include/configs/stih410-b2260.h
 create mode 100644 include/dm/platform_data/serial_sti_asc.h
 create mode 100644 include/dm/platform_data/sti_sdhci.h
 create mode 100644 include/dt-bindings/clock/stih407-clks.h
 create mode 100644 include/dt-bindings/clock/stih410-clks.h
 create mode 100644 include/dt-bindings/interrupt-controller/irq-st.h
 create mode 100644 include/dt-bindings/mfd/st-lpc.h
 create mode 100644 include/dt-bindings/reset/stih407-resets.h

-- 
1.9.1

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[U-Boot] [PATCH 5/7] STiH410: add STi pinctrl driver

2017-01-20 Thread patrice.chotard

From: Patrice Chotard 

Signed-off-by: Patrice Chotard 
---
 drivers/pinctrl/Kconfig   |  10 ++
 drivers/pinctrl/Makefile  |   1 +
 drivers/pinctrl/pinctrl-sti.c | 311 ++
 3 files changed, 322 insertions(+)
 create mode 100644 drivers/pinctrl/pinctrl-sti.c

diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index efcb4c0..0c832e1 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -175,6 +175,16 @@ config PIC32_PINCTRL
  by a device tree node which contains both GPIO defintion and pin 
control
  functions.
 
+config PINCTRL_STI
+   bool "STMicroelectronics STi pin-control and pin-mux driver"
+   depends on DM && ARCH_STI
+   default y
+   help
+ Support pin multiplexing control on STMicrolectronics STi SoCs.
+ The driver is controlled by a device tree node which contains both
+ the GPIO definitions and pin control functions for each available 
multiplex
+ function.
+
 endif
 
 source "drivers/pinctrl/meson/Kconfig"
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 512112a..a2f8101 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -16,3 +16,4 @@ obj-$(CONFIG_PIC32_PINCTRL)   += pinctrl_pic32.o
 obj-$(CONFIG_PINCTRL_EXYNOS)   += exynos/
 obj-$(CONFIG_PINCTRL_MESON)+= meson/
 obj-$(CONFIG_PINCTRL_MVEBU)+= mvebu/
+obj-$(CONFIG_PINCTRL_STI)  += pinctrl-sti.o
diff --git a/drivers/pinctrl/pinctrl-sti.c b/drivers/pinctrl/pinctrl-sti.c
new file mode 100644
index 000..652944a
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-sti.c
@@ -0,0 +1,311 @@
+/*
+ * Pinctrl driver for STMicroelectronics STi SoCs
+ *
+ *  Copyright (c) 2017
+ *  Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define MAX_STI_PINCONF_ENTRIES7
+/* Output enable */
+#define OE (1 << 27)
+/* Pull Up */
+#define PU (1 << 26)
+/* Open Drain */
+#define OD (1 << 25)
+
+/* User-frendly defines for Pin Direction */
+   /* oe = 0, pu = 0, od = 0 */
+#define IN (0)
+   /* oe = 0, pu = 1, od = 0 */
+#define IN_PU  (PU)
+   /* oe = 1, pu = 0, od = 0 */
+#define OUT(OE)
+   /* oe = 1, pu = 1, od = 0 */
+#define OUT_PU (OE | PU)
+   /* oe = 1, pu = 0, od = 1 */
+#define BIDIR  (OE | OD)
+   /* oe = 1, pu = 1, od = 1 */
+#define BIDIR_PU   (OE | PU | OD)
+
+struct sti_pinctrl_platdata {
+   struct regmap *regmap;
+};
+
+/*
+ * PIO alternative Function selector
+ */
+void sti_alternate_select(struct udevice *dev, struct sti_pin_desc *pin_desc)
+{
+   struct sti_pinctrl_platdata *plat = dev_get_platdata(dev);
+   unsigned long sysconf, *sysconfreg;
+   int alt = pin_desc->alt;
+   int bank = pin_desc->bank;
+   int pin = pin_desc->pin;
+
+   sysconfreg = (unsigned long *)plat->regmap->base;
+
+   switch (bank) {
+   case 0 ... 5:   /* in "SBC Bank" */
+   sysconfreg += bank;
+   break;
+   case 10 ... 20: /* in "FRONT Bank" */
+   sysconfreg += bank - 10;
+   break;
+   case 30 ... 35: /* in "REAR Bank" */
+   sysconfreg += bank - 30;
+   break;
+   case 40 ... 42: /* in "FLASH Bank" */
+   sysconfreg += bank - 40;
+   break;
+   default:
+   BUG();
+   return;
+   }
+
+   sysconf = readl(sysconfreg);
+   SET_SYSCONF_BITS(sysconf, 1, pin * 4, (pin * 4) + 3, alt, alt);
+   writel(sysconf, sysconfreg);
+}
+
+/* pin configuration */
+void sti_pin_configure(struct udevice *dev, struct sti_pin_desc *pin_desc)
+{
+   struct sti_pinctrl_platdata *plat = dev_get_platdata(dev);
+   int bit;
+   int oe = 0, pu = 0, od = 0;
+   unsigned long sysconf, *sysconfreg;
+   int bank = pin_desc->bank;
+
+   sysconfreg = (unsigned long *)plat->regmap->base + 40;
+
+   /*
+* NOTE: The PIO configuration for the PIO pins in the
+* "FLASH Bank" are different from all the other banks!
+* Specifically, the output-enable pin control register
+* (SYS_CFG_3040) and the pull-up pin control register
+* (SYS_CFG_3050), are both classed as being "reserved".
+* Hence, we do not write to these registers to configure
+* the OE and PU features for PIOs in this bank. However,
+* the open-drain pin control register (SYS_CFG_3060)
+* follows the style of the other banks, and so we can
+* treat that register normally.
+

[U-Boot] [PATCH 7/7] STIH410-B2260: Add STiH410-B2260 defconfig

2017-01-20 Thread patrice.chotard

From: Patrice Chotard 

Signed-off-by: Patrice Chotard 
---
 configs/stih410-b2260_defconfig | 22 ++
 1 file changed, 22 insertions(+)
 create mode 100644 configs/stih410-b2260_defconfig

diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig
new file mode 100644
index 000..bb53acc
--- /dev/null
+++ b/configs/stih410-b2260_defconfig
@@ -0,0 +1,22 @@
+CONFIG_ARM=y
+CONFIG_ARCH_STI=y
+CONFIG_IDENT_STRING="STMicroelectronics STiH410-B2260"
+CONFIG_DEFAULT_DEVICE_TREE="stih410-b2260"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SYS_PROMPT="stih410-b2260 => "
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_OF_CONTROL=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_STI=y
+CONFIG_PINCTRL=y
+CONFIG_STI_ASC_SERIAL=y
+CONFIG_SPL_OF_LIBFDT=y
-- 
1.9.1

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[U-Boot] [PATCH v7 7/9] STiH410: Add STi pinctrl driver

2017-02-21 Thread patrice.chotard

From: Patrice Chotard 

Add STMicroelectronics STiH410 pinctrl driver

Signed-off-by: Patrice Chotard 
Reviewed-by: Tom Rini 
Reviewed-by: Simon Glass 
---
 drivers/pinctrl/Kconfig   |  10 ++
 drivers/pinctrl/Makefile  |   1 +
 drivers/pinctrl/pinctrl-sti.c | 320 ++
 3 files changed, 331 insertions(+)
 create mode 100644 drivers/pinctrl/pinctrl-sti.c

diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index efcb4c0..0c832e1 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -175,6 +175,16 @@ config PIC32_PINCTRL
  by a device tree node which contains both GPIO defintion and pin 
control
  functions.
 
+config PINCTRL_STI
+   bool "STMicroelectronics STi pin-control and pin-mux driver"
+   depends on DM && ARCH_STI
+   default y
+   help
+ Support pin multiplexing control on STMicrolectronics STi SoCs.
+ The driver is controlled by a device tree node which contains both
+ the GPIO definitions and pin control functions for each available 
multiplex
+ function.
+
 endif
 
 source "drivers/pinctrl/meson/Kconfig"
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 512112a..a2f8101 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -16,3 +16,4 @@ obj-$(CONFIG_PIC32_PINCTRL)   += pinctrl_pic32.o
 obj-$(CONFIG_PINCTRL_EXYNOS)   += exynos/
 obj-$(CONFIG_PINCTRL_MESON)+= meson/
 obj-$(CONFIG_PINCTRL_MVEBU)+= mvebu/
+obj-$(CONFIG_PINCTRL_STI)  += pinctrl-sti.o
diff --git a/drivers/pinctrl/pinctrl-sti.c b/drivers/pinctrl/pinctrl-sti.c
new file mode 100644
index 000..40341b4
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-sti.c
@@ -0,0 +1,320 @@
+/*
+ * Pinctrl driver for STMicroelectronics STi SoCs
+ *
+ *  Copyright (c) 2017
+ *  Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define MAX_STI_PINCONF_ENTRIES7
+/* Output enable */
+#define OE (1 << 27)
+/* Pull Up */
+#define PU (1 << 26)
+/* Open Drain */
+#define OD (1 << 25)
+
+/* User-frendly defines for Pin Direction */
+   /* oe = 0, pu = 0, od = 0 */
+#define IN (0)
+   /* oe = 0, pu = 1, od = 0 */
+#define IN_PU  (PU)
+   /* oe = 1, pu = 0, od = 0 */
+#define OUT(OE)
+   /* oe = 1, pu = 1, od = 0 */
+#define OUT_PU (OE | PU)
+   /* oe = 1, pu = 0, od = 1 */
+#define BIDIR  (OE | OD)
+   /* oe = 1, pu = 1, od = 1 */
+#define BIDIR_PU   (OE | PU | OD)
+
+struct sti_pinctrl_platdata {
+   struct regmap *regmap;
+};
+
+struct sti_pin_desc {
+   unsigned char bank;
+   unsigned char pin;
+   unsigned char alt;
+   int dir;
+};
+
+/*
+ * PIO alternative Function selector
+ */
+void sti_alternate_select(struct udevice *dev, struct sti_pin_desc *pin_desc)
+{
+   struct sti_pinctrl_platdata *plat = dev_get_platdata(dev);
+   unsigned long sysconf, *sysconfreg;
+   int alt = pin_desc->alt;
+   int bank = pin_desc->bank;
+   int pin = pin_desc->pin;
+
+   sysconfreg = (unsigned long *)plat->regmap->base;
+
+   switch (bank) {
+   case 0 ... 5:   /* in "SBC Bank" */
+   sysconfreg += bank;
+   break;
+   case 10 ... 20: /* in "FRONT Bank" */
+   sysconfreg += bank - 10;
+   break;
+   case 30 ... 35: /* in "REAR Bank" */
+   sysconfreg += bank - 30;
+   break;
+   case 40 ... 42: /* in "FLASH Bank" */
+   sysconfreg += bank - 40;
+   break;
+   default:
+   BUG();
+   return;
+   }
+
+   sysconf = readl(sysconfreg);
+   sysconf = bitfield_replace(sysconf, pin * 4, 3, alt);
+   writel(sysconf, sysconfreg);
+}
+
+/* pin configuration */
+void sti_pin_configure(struct udevice *dev, struct sti_pin_desc *pin_desc)
+{
+   struct sti_pinctrl_platdata *plat = dev_get_platdata(dev);
+   int bit;
+   int oe = 0, pu = 0, od = 0;
+   unsigned long *sysconfreg;
+   int bank = pin_desc->bank;
+
+   sysconfreg = (unsigned long *)plat->regmap->base + 40;
+
+   /*
+* NOTE: The PIO configuration for the PIO pins in the
+* "FLASH Bank" are different from all the other banks!
+* Specifically, the output-enable pin control register
+* (SYS_CFG_3040) and the pull-up pin control register
+* (SYS_CFG_3050), are both classed as being "reserved".
+* Hence, we do not write to these registers to configure
+

[U-Boot] [PATCH v7 9/9] board: Add STMicroelectronics STiH410-B2260 support

2017-02-21 Thread patrice.chotard

From: Patrice Chotard 

This is a 96Board compliant board based on STiH410 SoC:
  - 1GB DDR
  - On-Board USB combo WiFi/Bluetooth RTL8723BU
with PCB soldered antenna
  - Ethernet 1000-BaseT
  - SATA
  - HDMI
  - 2 x USB2.0 type A
  - 1 x USB2.0 type micro-AB
  - SD card slot
  - High speed connector (SD/I2C/USB interfaces)
  - Low speed connector (UART/I2C/GPIO/SPI/PCM interfaces)

Signed-off-by: Patrice Chotard 
Reviewed-by: Tom Rini 
Reviewed-by: Simon Glass 
---

v7: _ typo: replace "Slow" by "Low" in patch 9 Kconfig's help

 arch/arm/mach-sti/Kconfig  | 25 
 board/st/stih410-b2260/Kconfig | 19 
 board/st/stih410-b2260/MAINTAINERS |  7 +
 board/st/stih410-b2260/Makefile|  8 +
 board/st/stih410-b2260/board.c | 28 ++
 configs/stih410-b2260_defconfig| 26 +
 include/configs/stih410-b2260.h| 60 ++
 7 files changed, 173 insertions(+)
 create mode 100644 board/st/stih410-b2260/Kconfig
 create mode 100644 board/st/stih410-b2260/MAINTAINERS
 create mode 100644 board/st/stih410-b2260/Makefile
 create mode 100644 board/st/stih410-b2260/board.c
 create mode 100644 configs/stih410-b2260_defconfig
 create mode 100644 include/configs/stih410-b2260.h

diff --git a/arch/arm/mach-sti/Kconfig b/arch/arm/mach-sti/Kconfig
index 87c04b2..f9a583a 100644
--- a/arch/arm/mach-sti/Kconfig
+++ b/arch/arm/mach-sti/Kconfig
@@ -3,4 +3,29 @@ if ARCH_STI
 config SYS_SOC
default "stih410"
 
+choice
+   prompt "STiH410 board select"
+
+config TARGET_STIH410_B2260
+   bool "96Boards STiH410-B2260"
+   help
+ Support for 96Board STiH410-B2260 based on STMicrolectronics
+ STiH410 soc. This board complies with 96Board Open Platform
+ Specifications. Features:
+ - 1GB DDR
+ - On-Board USB combo WiFi/Bluetooth RTL8723BU
+   with PCB soldered antenna
+ - Ethernet 1000-BaseT
+ - Sata
+ - HDMI
+ - 2 x USB2 type A
+ - micro USB2 type AB
+ - SD card slot
+ - High speed connector (SD/I2C/USB interfaces)
+ - Low speed connector (UART/I2C/GPIO/SPI/PCM interfaces)
+
+endchoice
+
+source "board/st/stih410-b2260/Kconfig"
+
 endif
diff --git a/board/st/stih410-b2260/Kconfig b/board/st/stih410-b2260/Kconfig
new file mode 100644
index 000..590add0
--- /dev/null
+++ b/board/st/stih410-b2260/Kconfig
@@ -0,0 +1,19 @@
+if TARGET_STIH410_B2260
+
+config SYS_BOARD
+   string
+   default "stih410-b2260"
+
+config SYS_VENDOR
+   string
+   default "st"
+
+config SYS_SOC
+   string
+   default "stih410"
+
+config SYS_CONFIG_NAME
+   string
+   default "stih410-b2260"
+
+endif
diff --git a/board/st/stih410-b2260/MAINTAINERS 
b/board/st/stih410-b2260/MAINTAINERS
new file mode 100644
index 000..4f557ac
--- /dev/null
+++ b/board/st/stih410-b2260/MAINTAINERS
@@ -0,0 +1,7 @@
+STIH410-B2260 BOARD
+M: Patrice Chotard 
+S: Maintained
+F: board/st/stih410-b2260/
+F: include/configs/stih410-b2260.h
+F: configs/stih410-b2260_defconfig
+F: arch/arm/dts/stih*
diff --git a/board/st/stih410-b2260/Makefile b/board/st/stih410-b2260/Makefile
new file mode 100644
index 000..68a7903
--- /dev/null
+++ b/board/st/stih410-b2260/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2017
+# Patrice Chotard, 
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y  = board.o
diff --git a/board/st/stih410-b2260/board.c b/board/st/stih410-b2260/board.c
new file mode 100644
index 000..0c06bca
--- /dev/null
+++ b/board/st/stih410-b2260/board.c
@@ -0,0 +1,28 @@
+/*
+ * Board init file for STiH410-B2260
+ *
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+   gd->ram_size = PHYS_SDRAM_1_SIZE;
+   return 0;
+}
+
+void dram_init_banksize(void)
+{
+   gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+   gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+}
+
+int board_init(void)
+{
+   return 0;
+}
diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig
new file mode 100644
index 000..4e6942f
--- /dev/null
+++ b/configs/stih410-b2260_defconfig
@@ -0,0 +1,26 @@
+CONFIG_ARM=y
+CONFIG_ARCH_STI=y
+CONFIG_IDENT_STRING="STMicroelectronics STiH410-B2260"
+CONFIG_DEFAULT_DEVICE_TREE="stih410-b2260"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SYS_PROMPT="stih410-b2260 => "
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_OF_CONTROL=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_STI=y
+CONFIG_PINCTRL=y

[U-Boot] [PATCH v7 2/9] STiH410: Add STi timer driver

2017-02-21 Thread patrice.chotard

From: Patrice Chotard 

Add ARM global timer based timer

Signed-off-by: Patrice Chotard 
Reviewed-by: Simon Glass 
---
 drivers/timer/Kconfig |  7 +
 drivers/timer/Makefile|  1 +
 drivers/timer/sti-timer.c | 78 +++
 3 files changed, 86 insertions(+)
 create mode 100644 drivers/timer/sti-timer.c

diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig
index cd38a6d..72c1416 100644
--- a/drivers/timer/Kconfig
+++ b/drivers/timer/Kconfig
@@ -58,4 +58,11 @@ config AST_TIMER
  This is mostly because they all share several registers which
  makes it difficult to completely separate them.
 
+config STI_TIMER
+   bool "STi timer support"
+   depends on TIMER
+   default y if ARCH_STI
+   help
+ Select this to enable a timer for STi devices.
+
 endmenu
diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile
index a4b1a48..ae94be8 100644
--- a/drivers/timer/Makefile
+++ b/drivers/timer/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_SANDBOX_TIMER)   += sandbox_timer.o
 obj-$(CONFIG_X86_TSC_TIMER)+= tsc_timer.o
 obj-$(CONFIG_OMAP_TIMER)   += omap-timer.o
 obj-$(CONFIG_AST_TIMER)+= ast_timer.o
+obj-$(CONFIG_STI_TIMER)+= sti-timer.o
diff --git a/drivers/timer/sti-timer.c b/drivers/timer/sti-timer.c
new file mode 100644
index 000..e1419c4
--- /dev/null
+++ b/drivers/timer/sti-timer.c
@@ -0,0 +1,78 @@
+/*
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct sti_timer_priv {
+   struct globaltimer *global_timer;
+};
+
+static int sti_timer_get_count(struct udevice *dev, u64 *count)
+{
+   struct sti_timer_priv *priv = dev_get_priv(dev);
+   struct globaltimer *global_timer = priv->global_timer;
+   u32 low, high;
+   u64 timer;
+   u32 old = readl(_timer->cnt_h);
+
+   while (1) {
+   low = readl(_timer->cnt_l);
+   high = readl(_timer->cnt_h);
+   if (old == high)
+   break;
+   else
+   old = high;
+   }
+   timer = high;
+   *count = (u64)((timer << 32) | low);
+
+   return 0;
+}
+
+static int sti_timer_probe(struct udevice *dev)
+{
+   struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+   struct sti_timer_priv *priv = dev_get_priv(dev);
+   fdt_addr_t addr;
+
+   uc_priv->clock_rate = CONFIG_SYS_HZ_CLOCK;
+
+   /* get arm global timer base address */
+   addr = fdtdec_get_addr(gd->fdt_blob, dev_of_offset(dev), "reg");
+   priv->global_timer = (struct globaltimer *)addr;
+
+   /* init timer */
+   writel(0x01, >global_timer->ctl);
+
+   return 0;
+}
+
+static const struct timer_ops sti_timer_ops = {
+   .get_count = sti_timer_get_count,
+};
+
+static const struct udevice_id sti_timer_ids[] = {
+   { .compatible = "arm,cortex-a9-global-timer" },
+   {}
+};
+
+U_BOOT_DRIVER(sti_timer) = {
+   .name = "sti_timer",
+   .id = UCLASS_TIMER,
+   .of_match = sti_timer_ids,
+   .priv_auto_alloc_size = sizeof(struct sti_timer_priv),
+   .probe = sti_timer_probe,
+   .ops = _timer_ops,
+   .flags = DM_FLAG_PRE_RELOC,
+};
-- 
1.9.1

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[U-Boot] [PATCH v7 5/9] gpio: do not include for ARCH_STI

2017-02-21 Thread patrice.chotard

From: Patrice Chotard 

As no gpio.h is defined in arch/arm/include/asm/arch-stih410,
to avoid compilation failure, do not include asm/arch/gpio.h.

This is needed for example when including sdhci.h, which include
asm/gpio.h>.

Signed-off-by: Patrice Chotard 
Reviewed-by: Simon Glass 
---
 arch/arm/include/asm/gpio.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h
index fe4419c..1c5e873 100644
--- a/arch/arm/include/asm/gpio.h
+++ b/arch/arm/include/asm/gpio.h
@@ -1,4 +1,4 @@
-#ifndef CONFIG_ARCH_UNIPHIER
+#if !defined(CONFIG_ARCH_UNIPHIER) && !defined(CONFIG_ARCH_STI)
 #include 
 #endif
 #include 
-- 
1.9.1

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[U-Boot] [PATCH v7 1/9] arm: Add support for STMicroelectronics STiH410 soc

2017-02-21 Thread patrice.chotard

From: Patrice Chotard 

The STiH410 is an advanced multi-HD AVC processor with 3D
graphics acceleration and 1.5-GHz ARM Cortex-A9 SMP CPU
part of the STiH407 family.

It has wide connectivity including USB 3.0, PCI-e, SATA
and gigabit ethernet.

Signed-off-by: Patrice Chotard 
---
 MAINTAINERS   | 6 ++
 arch/arm/Kconfig  | 9 +
 arch/arm/mach-sti/Kconfig | 6 ++
 3 files changed, 21 insertions(+)
 create mode 100644 arch/arm/mach-sti/Kconfig

diff --git a/MAINTAINERS b/MAINTAINERS
index eaa2c3b..19c0eed 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -165,6 +165,12 @@ S: Maintained
 F: arch/arm/cpu/armv7/stv0991/
 F: arch/arm/include/asm/arch-stv0991/
 
+ARM STI
+M: Patrice Chotard 
+S: Maintained
+F: arch/arm/mach-sti/
+F: arch/arm/include/asm/arch-sti*/
+
 ARM SUNXI
 M: Jagan Teki 
 M: Maxime Ripard 
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 0229800..4aa5eb9 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -982,6 +982,13 @@ config STM32
select DM
select DM_SERIAL
 
+config ARCH_STI
+   bool "Support STMicrolectronics SoCs"
+   select CPU_V7
+   help
+ Support for STMicroelectronics STiH407/10 SoC family.
+ This SoC is used on Linaro 96Board STiH410-B2260
+
 config ARCH_ROCKCHIP
bool "Support Rockchip SoCs"
select OF_CONTROL
@@ -1060,6 +1067,8 @@ source "arch/arm/mach-snapdragon/Kconfig"
 
 source "arch/arm/mach-socfpga/Kconfig"
 
+source "arch/arm/mach-sti/Kconfig"
+
 source "arch/arm/mach-stm32/Kconfig"
 
 source "arch/arm/mach-tegra/Kconfig"
diff --git a/arch/arm/mach-sti/Kconfig b/arch/arm/mach-sti/Kconfig
new file mode 100644
index 000..87c04b2
--- /dev/null
+++ b/arch/arm/mach-sti/Kconfig
@@ -0,0 +1,6 @@
+if ARCH_STI
+
+config SYS_SOC
+   default "stih410"
+
+endif
-- 
1.9.1

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[U-Boot] [PATCH v7 4/9] STiH410: Add STi serial driver

2017-02-21 Thread patrice.chotard

From: Patrice Chotard 

This patch adds support to ASC (asynchronous serial controller)
driver, which is basically a standard serial driver. This IP
is common across other STMicroelectronics SoCs

Signed-off-by: Patrice Chotard 
Reviewed-by: Simon Glass 
---
 arch/arm/Kconfig|   2 +
 drivers/serial/Kconfig  |   8 ++
 drivers/serial/Makefile |   1 +
 drivers/serial/serial_sti_asc.c | 211 
 4 files changed, 222 insertions(+)
 create mode 100644 drivers/serial/serial_sti_asc.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 4aa5eb9..b91a5b7 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -985,6 +985,8 @@ config STM32
 config ARCH_STI
bool "Support STMicrolectronics SoCs"
select CPU_V7
+   select DM
+   select DM_SERIAL
help
  Support for STMicroelectronics STiH407/10 SoC family.
  This SoC is used on Linaro 96Board STiH410-B2260
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index b11f3ff..7cb0eaa 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -413,4 +413,12 @@ config PXA_SERIAL
  If you have a machine based on a Marvell XScale PXA2xx CPU you
  can enable its onboard serial ports by enabling this option.
 
+config STI_ASC_SERIAL
+   bool "STMicroelectronics on-chip UART"
+   depends on DM_SERIAL && ARCH_STI
+   help
+ Select this to enable Asynchronous Serial Controller available
+ on STiH410 SoC. This is a basic implementation,  it supports
+ following baudrate 9600, 19200, 38400, 57600 and 115200.
+
 endmenu
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 8430668..84a22ce 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -41,6 +41,7 @@ obj-$(CONFIG_FSL_LINFLEXUART) += serial_linflexuart.o
 obj-$(CONFIG_ARC_SERIAL) += serial_arc.o
 obj-$(CONFIG_UNIPHIER_SERIAL) += serial_uniphier.o
 obj-$(CONFIG_STM32_SERIAL) += serial_stm32.o
+obj-$(CONFIG_STI_ASC_SERIAL) += serial_sti_asc.o
 obj-$(CONFIG_PIC32_SERIAL) += serial_pic32.o
 obj-$(CONFIG_STM32X7_SERIAL) += serial_stm32x7.o
 obj-$(CONFIG_BCM283X_MU_SERIAL) += serial_bcm283x_mu.o
diff --git a/drivers/serial/serial_sti_asc.c b/drivers/serial/serial_sti_asc.c
new file mode 100644
index 000..ce26c94
--- /dev/null
+++ b/drivers/serial/serial_sti_asc.c
@@ -0,0 +1,211 @@
+/*
+ * Support for Serial I/O using STMicroelectronics' on-chip ASC.
+ *
+ *  Copyright (c) 2017
+ *  Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define BAUDMODE   0x1000
+#define RXENABLE   0x0100
+#define RUN0x0080
+#define MODE   0x0001
+#define MODE_8BIT  0x0001
+#define STOP_1BIT  0x0008
+#define PARITYODD  0x0020
+
+#define STA_TF BIT(9)
+#define STA_RBFBIT(0)
+
+struct sti_asc_uart {
+   u32 baudrate;
+   u32 txbuf;
+   u32 rxbuf;
+   u32 control;
+   u32 inten;
+   u32 status;
+   u32 guardtime;
+   u32 timeout;
+   u32 txreset;
+   u32 rxreset;
+};
+
+struct sti_asc_serial {
+   /* address of registers in physical memory */
+   struct sti_asc_uart *regs;
+};
+
+/* Values for the BAUDRATE Register */
+#define PCLK   (200ul * 100ul)
+#define BAUDRATE_VAL_M0(bps)   (PCLK / (16 * (bps)))
+#define BAUDRATE_VAL_M1(bps)   ((bps * (1 << 14)) + (1<<13)) / (PCLK/(1 << 6))
+
+/*
+ * MODE 0
+ *   ICCLK
+ * ASCBaudRate =   
+ *   baudrate * 16
+ *
+ * MODE 1
+ *   baudrate * 16 * 2^16
+ * ASCBaudRate =   
+ *  ICCLK
+ *
+ * NOTE:
+ * Mode 1 should be used for baudrates of 19200, and above, as it
+ * has a lower deviation error than Mode 0 for higher frequencies.
+ * Mode 0 should be used for all baudrates below 19200.
+ */
+
+static int sti_asc_pending(struct udevice *dev, bool input)
+{
+   struct sti_asc_serial *priv = dev_get_priv(dev);
+   struct sti_asc_uart *const uart = priv->regs;
+   unsigned long status;
+
+   status = readl(>status);
+   if (input)
+   return status & STA_RBF;
+   else
+   return status & STA_TF;
+}
+
+static int _sti_asc_serial_setbrg(struct sti_asc_uart *uart, int baudrate)
+{
+   unsigned long val;
+   int t, mode = 1;
+
+   switch (baudrate) {
+   case 9600:
+   t = BAUDRATE_VAL_M0(9600);
+   mode = 0;
+   break;
+   case 19200:
+   t = BAUDRATE_VAL_M1(19200);
+   break;
+   case 38400:
+   t = BAUDRATE_VAL_M1(38400);
+   break;
+   case 57600:
+   t = BAUDRATE_VAL_M1(57600);
+

[U-Boot] [PATCH v6 4/9] STiH410: Add STi serial driver

2017-02-21 Thread patrice.chotard

From: Patrice Chotard 

This patch adds support to ASC (asynchronous serial controller)
driver, which is basically a standard serial driver. This IP
is common across other STMicroelectronics SoCs

Signed-off-by: Patrice Chotard 
Reviewed-by: Simon Glass 
---
 arch/arm/Kconfig|   2 +
 drivers/serial/Kconfig  |   8 ++
 drivers/serial/Makefile |   1 +
 drivers/serial/serial_sti_asc.c | 211 
 4 files changed, 222 insertions(+)
 create mode 100644 drivers/serial/serial_sti_asc.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 4aa5eb9..b91a5b7 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -985,6 +985,8 @@ config STM32
 config ARCH_STI
bool "Support STMicrolectronics SoCs"
select CPU_V7
+   select DM
+   select DM_SERIAL
help
  Support for STMicroelectronics STiH407/10 SoC family.
  This SoC is used on Linaro 96Board STiH410-B2260
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index b11f3ff..7cb0eaa 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -413,4 +413,12 @@ config PXA_SERIAL
  If you have a machine based on a Marvell XScale PXA2xx CPU you
  can enable its onboard serial ports by enabling this option.
 
+config STI_ASC_SERIAL
+   bool "STMicroelectronics on-chip UART"
+   depends on DM_SERIAL && ARCH_STI
+   help
+ Select this to enable Asynchronous Serial Controller available
+ on STiH410 SoC. This is a basic implementation,  it supports
+ following baudrate 9600, 19200, 38400, 57600 and 115200.
+
 endmenu
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 8430668..84a22ce 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -41,6 +41,7 @@ obj-$(CONFIG_FSL_LINFLEXUART) += serial_linflexuart.o
 obj-$(CONFIG_ARC_SERIAL) += serial_arc.o
 obj-$(CONFIG_UNIPHIER_SERIAL) += serial_uniphier.o
 obj-$(CONFIG_STM32_SERIAL) += serial_stm32.o
+obj-$(CONFIG_STI_ASC_SERIAL) += serial_sti_asc.o
 obj-$(CONFIG_PIC32_SERIAL) += serial_pic32.o
 obj-$(CONFIG_STM32X7_SERIAL) += serial_stm32x7.o
 obj-$(CONFIG_BCM283X_MU_SERIAL) += serial_bcm283x_mu.o
diff --git a/drivers/serial/serial_sti_asc.c b/drivers/serial/serial_sti_asc.c
new file mode 100644
index 000..ce26c94
--- /dev/null
+++ b/drivers/serial/serial_sti_asc.c
@@ -0,0 +1,211 @@
+/*
+ * Support for Serial I/O using STMicroelectronics' on-chip ASC.
+ *
+ *  Copyright (c) 2017
+ *  Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define BAUDMODE   0x1000
+#define RXENABLE   0x0100
+#define RUN0x0080
+#define MODE   0x0001
+#define MODE_8BIT  0x0001
+#define STOP_1BIT  0x0008
+#define PARITYODD  0x0020
+
+#define STA_TF BIT(9)
+#define STA_RBFBIT(0)
+
+struct sti_asc_uart {
+   u32 baudrate;
+   u32 txbuf;
+   u32 rxbuf;
+   u32 control;
+   u32 inten;
+   u32 status;
+   u32 guardtime;
+   u32 timeout;
+   u32 txreset;
+   u32 rxreset;
+};
+
+struct sti_asc_serial {
+   /* address of registers in physical memory */
+   struct sti_asc_uart *regs;
+};
+
+/* Values for the BAUDRATE Register */
+#define PCLK   (200ul * 100ul)
+#define BAUDRATE_VAL_M0(bps)   (PCLK / (16 * (bps)))
+#define BAUDRATE_VAL_M1(bps)   ((bps * (1 << 14)) + (1<<13)) / (PCLK/(1 << 6))
+
+/*
+ * MODE 0
+ *   ICCLK
+ * ASCBaudRate =   
+ *   baudrate * 16
+ *
+ * MODE 1
+ *   baudrate * 16 * 2^16
+ * ASCBaudRate =   
+ *  ICCLK
+ *
+ * NOTE:
+ * Mode 1 should be used for baudrates of 19200, and above, as it
+ * has a lower deviation error than Mode 0 for higher frequencies.
+ * Mode 0 should be used for all baudrates below 19200.
+ */
+
+static int sti_asc_pending(struct udevice *dev, bool input)
+{
+   struct sti_asc_serial *priv = dev_get_priv(dev);
+   struct sti_asc_uart *const uart = priv->regs;
+   unsigned long status;
+
+   status = readl(>status);
+   if (input)
+   return status & STA_RBF;
+   else
+   return status & STA_TF;
+}
+
+static int _sti_asc_serial_setbrg(struct sti_asc_uart *uart, int baudrate)
+{
+   unsigned long val;
+   int t, mode = 1;
+
+   switch (baudrate) {
+   case 9600:
+   t = BAUDRATE_VAL_M0(9600);
+   mode = 0;
+   break;
+   case 19200:
+   t = BAUDRATE_VAL_M1(19200);
+   break;
+   case 38400:
+   t = BAUDRATE_VAL_M1(38400);
+   break;
+   case 57600:
+   t = BAUDRATE_VAL_M1(57600);
+

[U-Boot] [PATCH v6 3/9] STiH410: Add STi sysreset driver

2017-02-21 Thread patrice.chotard

From: Patrice Chotard 

Signed-off-by: Patrice Chotard 
Reviewed-by: Simon Glass 
---
 drivers/sysreset/Makefile   |  1 +
 drivers/sysreset/sysreset_sti.c | 82 +
 2 files changed, 83 insertions(+)
 create mode 100644 drivers/sysreset/sysreset_sti.c

diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index 37638a8..21bcc21 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -13,5 +13,6 @@ obj-$(CONFIG_ROCKCHIP_RK3288) += sysreset_rk3288.o
 obj-$(CONFIG_ROCKCHIP_RK3399) += sysreset_rk3399.o
 obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o
 obj-$(CONFIG_ARCH_SNAPDRAGON) += sysreset_snapdragon.o
+obj-$(CONFIG_ARCH_STI) += sysreset_sti.o
 obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o
 obj-$(CONFIG_ARCH_ASPEED) += sysreset_ast.o
diff --git a/drivers/sysreset/sysreset_sti.c b/drivers/sysreset/sysreset_sti.c
new file mode 100644
index 000..9b58aa8
--- /dev/null
+++ b/drivers/sysreset/sysreset_sti.c
@@ -0,0 +1,82 @@
+/*
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct sti_sysreset_priv {
+   phys_addr_t base;
+};
+
+static int sti_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+   struct sti_sysreset_priv *priv = dev_get_priv(dev);
+
+   generic_clear_bit(0, (void __iomem *)priv->base);
+
+   return -EINPROGRESS;
+}
+
+static int sti_sysreset_probe(struct udevice *dev)
+{
+   struct sti_sysreset_priv *priv = dev_get_priv(dev);
+   struct udevice *syscon;
+   struct regmap *regmap;
+   struct fdtdec_phandle_args syscfg_phandle;
+   int ret;
+
+   /* get corresponding syscon phandle */
+   ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, dev_of_offset(dev),
+"st,syscfg", NULL, 0, 0,
+_phandle);
+   if (ret < 0) {
+   error("Can't get syscfg phandle: %d\n", ret);
+   return ret;
+   }
+
+   ret = uclass_get_device_by_of_offset(UCLASS_SYSCON,
+syscfg_phandle.node,
+);
+   if (ret) {
+   error("%s: uclass_get_device_by_of_offset failed: %d\n",
+ __func__, ret);
+   return ret;
+   }
+
+   regmap = syscon_get_regmap(syscon);
+   if (!regmap) {
+   error("unable to get regmap for %s\n", syscon->name);
+   return -ENODEV;
+   }
+
+   priv->base = regmap->base;
+
+   return 0;
+}
+
+static struct sysreset_ops sti_sysreset = {
+   .request= sti_sysreset_request,
+};
+
+static const struct udevice_id sti_sysreset_ids[] = {
+   { .compatible = "st,stih407-restart" },
+   { }
+};
+
+U_BOOT_DRIVER(sysreset_sti) = {
+   .name = "sysreset_sti",
+   .id = UCLASS_SYSRESET,
+   .ops = _sysreset,
+   .probe = sti_sysreset_probe,
+   .of_match = sti_sysreset_ids,
+   .priv_auto_alloc_size = sizeof(struct sti_sysreset_priv),
+};
-- 
1.9.1

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[U-Boot] [PATCH v6 2/9] STiH410: Add STi timer driver

2017-02-21 Thread patrice.chotard

From: Patrice Chotard 

Add ARM global timer based timer

Signed-off-by: Patrice Chotard 
Reviewed-by: Simon Glass 
---
 drivers/timer/Kconfig |  7 +
 drivers/timer/Makefile|  1 +
 drivers/timer/sti-timer.c | 78 +++
 3 files changed, 86 insertions(+)
 create mode 100644 drivers/timer/sti-timer.c

diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig
index cd38a6d..72c1416 100644
--- a/drivers/timer/Kconfig
+++ b/drivers/timer/Kconfig
@@ -58,4 +58,11 @@ config AST_TIMER
  This is mostly because they all share several registers which
  makes it difficult to completely separate them.
 
+config STI_TIMER
+   bool "STi timer support"
+   depends on TIMER
+   default y if ARCH_STI
+   help
+ Select this to enable a timer for STi devices.
+
 endmenu
diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile
index a4b1a48..ae94be8 100644
--- a/drivers/timer/Makefile
+++ b/drivers/timer/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_SANDBOX_TIMER)   += sandbox_timer.o
 obj-$(CONFIG_X86_TSC_TIMER)+= tsc_timer.o
 obj-$(CONFIG_OMAP_TIMER)   += omap-timer.o
 obj-$(CONFIG_AST_TIMER)+= ast_timer.o
+obj-$(CONFIG_STI_TIMER)+= sti-timer.o
diff --git a/drivers/timer/sti-timer.c b/drivers/timer/sti-timer.c
new file mode 100644
index 000..e1419c4
--- /dev/null
+++ b/drivers/timer/sti-timer.c
@@ -0,0 +1,78 @@
+/*
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct sti_timer_priv {
+   struct globaltimer *global_timer;
+};
+
+static int sti_timer_get_count(struct udevice *dev, u64 *count)
+{
+   struct sti_timer_priv *priv = dev_get_priv(dev);
+   struct globaltimer *global_timer = priv->global_timer;
+   u32 low, high;
+   u64 timer;
+   u32 old = readl(_timer->cnt_h);
+
+   while (1) {
+   low = readl(_timer->cnt_l);
+   high = readl(_timer->cnt_h);
+   if (old == high)
+   break;
+   else
+   old = high;
+   }
+   timer = high;
+   *count = (u64)((timer << 32) | low);
+
+   return 0;
+}
+
+static int sti_timer_probe(struct udevice *dev)
+{
+   struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+   struct sti_timer_priv *priv = dev_get_priv(dev);
+   fdt_addr_t addr;
+
+   uc_priv->clock_rate = CONFIG_SYS_HZ_CLOCK;
+
+   /* get arm global timer base address */
+   addr = fdtdec_get_addr(gd->fdt_blob, dev_of_offset(dev), "reg");
+   priv->global_timer = (struct globaltimer *)addr;
+
+   /* init timer */
+   writel(0x01, >global_timer->ctl);
+
+   return 0;
+}
+
+static const struct timer_ops sti_timer_ops = {
+   .get_count = sti_timer_get_count,
+};
+
+static const struct udevice_id sti_timer_ids[] = {
+   { .compatible = "arm,cortex-a9-global-timer" },
+   {}
+};
+
+U_BOOT_DRIVER(sti_timer) = {
+   .name = "sti_timer",
+   .id = UCLASS_TIMER,
+   .of_match = sti_timer_ids,
+   .priv_auto_alloc_size = sizeof(struct sti_timer_priv),
+   .probe = sti_timer_probe,
+   .ops = _timer_ops,
+   .flags = DM_FLAG_PRE_RELOC,
+};
-- 
1.9.1

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[U-Boot] [PATCH v6 0/9] Add STMicroelectronics STiH410-B2260 board

2017-02-21 Thread patrice.chotard

From: Patrice Chotard 

v6: _ fix last minute bug in pinctrl driver

v5: _ Add Simon Glass's reviewed-by
_ move board Kconfig description from patch 1 to 9

v4: _ fix STi serial driver to be fully DT compliant
_ remove arch/arm/include/asm/arch-stih410/sti.h and
  include/dm/platform_data/serial_sti_asc.h which became useless
_ board file cleanup
_ fix some nits in sti_sdhci.c
_ rebased on top of v2017.03-rc2

v3: _ add reviewed-by
_ add top level MAINTAINERS entry and in the board MAINTAINERS
_ use the fallback table from include/config_fallbacks.h
_ minor update in sti_sdhci.c
_ reorder patches with functionnal board and defconfig in last
_ remove arch/arm/mach-sti/cpu.c and replace it by a sysreset DM driver
_ remove arch/arm/mach-sti/timer.c by a timer DM driver
_ remove useless arch/arm/include/asm/arch-stih410/syscfg.h
_ remove useless arch/arm/include/asm/arch-stih410/gpio.h and update 
  arch/arm/include/asm/gpio.h for ARCH_STI in patch 5

v2: _ fix remarks from Jaechon Chung on SDHCI patch
_ fix remarks from Antonio Borneo on board patch
_ replace some macro by U-boot generic's one
_ add missing maintainers in recipients

Patrice Chotard (9):
  arm: Add support for STMicroelectronics STiH410 soc
  STiH410: Add STi timer driver
  STiH410: Add STi sysreset driver
  STiH410: Add STi serial driver
  gpio: do not include  for ARCH_STI
  STiH410: Add STi SDHCI driver
  STiH410: Add STi pinctrl driver
  STiH410-B2260: Add device tree
  board: Add STMicroelectronics STiH410-B2260 support

 MAINTAINERS   |6 +
 arch/arm/Kconfig  |   13 +
 arch/arm/dts/Makefile |2 +
 arch/arm/dts/st-pincfg.h  |   71 ++
 arch/arm/dts/stih407-clock.dtsi   |  326 ++
 arch/arm/dts/stih407-family.dtsi  |  977 +++
 arch/arm/dts/stih407-pinctrl.dtsi | 1303 +
 arch/arm/dts/stih410-b2260.dts|  226 
 arch/arm/dts/stih410-clock.dtsi   |  347 ++
 arch/arm/dts/stih410-pinctrl.dtsi |   34 +
 arch/arm/dts/stih410.dtsi |  454 +++
 arch/arm/include/asm/arch-stih410/sdhci.h |   68 ++
 arch/arm/include/asm/gpio.h   |2 +-
 arch/arm/mach-sti/Kconfig |   31 +
 board/st/stih410-b2260/Kconfig|   19 +
 board/st/stih410-b2260/MAINTAINERS|7 +
 board/st/stih410-b2260/Makefile   |8 +
 board/st/stih410-b2260/board.c|   28 +
 configs/stih410-b2260_defconfig   |   26 +
 drivers/mmc/Kconfig   |7 +
 drivers/mmc/Makefile  |1 +
 drivers/mmc/sti_sdhci.c   |  141 +++
 drivers/pinctrl/Kconfig   |   10 +
 drivers/pinctrl/Makefile  |1 +
 drivers/pinctrl/pinctrl-sti.c |  320 +
 drivers/serial/Kconfig|8 +
 drivers/serial/Makefile   |1 +
 drivers/serial/serial_sti_asc.c   |  211 
 drivers/sysreset/Makefile |1 +
 drivers/sysreset/sysreset_sti.c   |   82 ++
 drivers/timer/Kconfig |7 +
 drivers/timer/Makefile|1 +
 drivers/timer/sti-timer.c |   78 ++
 include/configs/stih410-b2260.h   |   60 +
 include/dt-bindings/clock/stih407-clks.h  |   90 ++
 include/dt-bindings/clock/stih410-clks.h  |   25 +
 include/dt-bindings/interrupt-controller/irq-st.h |   30 +
 include/dt-bindings/mfd/st-lpc.h  |   16 +
 include/dt-bindings/reset/stih407-resets.h|   65 +
 39 files changed, 5102 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/st-pincfg.h
 create mode 100644 arch/arm/dts/stih407-clock.dtsi
 create mode 100644 arch/arm/dts/stih407-family.dtsi
 create mode 100644 arch/arm/dts/stih407-pinctrl.dtsi
 create mode 100644 arch/arm/dts/stih410-b2260.dts
 create mode 100644 arch/arm/dts/stih410-clock.dtsi
 create mode 100644 arch/arm/dts/stih410-pinctrl.dtsi
 create mode 100644 arch/arm/dts/stih410.dtsi
 create mode 100644 arch/arm/include/asm/arch-stih410/sdhci.h
 create mode 100644 arch/arm/mach-sti/Kconfig
 create mode 100644 board/st/stih410-b2260/Kconfig
 create mode 100644 board/st/stih410-b2260/MAINTAINERS
 create mode 100644 board/st/stih410-b2260/Makefile
 create mode 100644 board/st/stih410-b2260/board.c
 create mode 100644 configs/stih410-b2260_defconfig
 create mode 100644 drivers/mmc/sti_sdhci.c
 create mode 100644 drivers/pinctrl/pinctrl-sti.c
 create mode 100644 drivers/serial/serial_sti_asc.c

[U-Boot] [PATCH v6 1/9] arm: Add support for STMicroelectronics STiH410 soc

2017-02-21 Thread patrice.chotard

From: Patrice Chotard 

The STiH410 is an advanced multi-HD AVC processor with 3D
graphics acceleration and 1.5-GHz ARM Cortex-A9 SMP CPU
part of the STiH407 family.

It has wide connectivity including USB 3.0, PCI-e, SATA
and gigabit ethernet.

Signed-off-by: Patrice Chotard 
---
 MAINTAINERS   | 6 ++
 arch/arm/Kconfig  | 9 +
 arch/arm/mach-sti/Kconfig | 6 ++
 3 files changed, 21 insertions(+)
 create mode 100644 arch/arm/mach-sti/Kconfig

diff --git a/MAINTAINERS b/MAINTAINERS
index eaa2c3b..19c0eed 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -165,6 +165,12 @@ S: Maintained
 F: arch/arm/cpu/armv7/stv0991/
 F: arch/arm/include/asm/arch-stv0991/
 
+ARM STI
+M: Patrice Chotard 
+S: Maintained
+F: arch/arm/mach-sti/
+F: arch/arm/include/asm/arch-sti*/
+
 ARM SUNXI
 M: Jagan Teki 
 M: Maxime Ripard 
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 0229800..4aa5eb9 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -982,6 +982,13 @@ config STM32
select DM
select DM_SERIAL
 
+config ARCH_STI
+   bool "Support STMicrolectronics SoCs"
+   select CPU_V7
+   help
+ Support for STMicroelectronics STiH407/10 SoC family.
+ This SoC is used on Linaro 96Board STiH410-B2260
+
 config ARCH_ROCKCHIP
bool "Support Rockchip SoCs"
select OF_CONTROL
@@ -1060,6 +1067,8 @@ source "arch/arm/mach-snapdragon/Kconfig"
 
 source "arch/arm/mach-socfpga/Kconfig"
 
+source "arch/arm/mach-sti/Kconfig"
+
 source "arch/arm/mach-stm32/Kconfig"
 
 source "arch/arm/mach-tegra/Kconfig"
diff --git a/arch/arm/mach-sti/Kconfig b/arch/arm/mach-sti/Kconfig
new file mode 100644
index 000..87c04b2
--- /dev/null
+++ b/arch/arm/mach-sti/Kconfig
@@ -0,0 +1,6 @@
+if ARCH_STI
+
+config SYS_SOC
+   default "stih410"
+
+endif
-- 
1.9.1

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[U-Boot] [PATCH v7 0/9] Add STMicroelectronics STiH410-B2260 board

2017-02-21 Thread patrice.chotard

From: Patrice Chotard 

v7: _ typo: replace "Slow" by "Low" in patch 9 Kconfig's help

v6: _ fix last minute bug in pinctrl driver

v5: _ Add Simon Glass's reviewed-by
_ move board Kconfig description from patch 1 to 9

v4: _ fix STi serial driver to be fully DT compliant
_ remove arch/arm/include/asm/arch-stih410/sti.h and
  include/dm/platform_data/serial_sti_asc.h which became useless
_ board file cleanup
_ fix some nits in sti_sdhci.c
_ rebased on top of v2017.03-rc2

v3: _ add reviewed-by
_ add top level MAINTAINERS entry and in the board MAINTAINERS
_ use the fallback table from include/config_fallbacks.h
_ minor update in sti_sdhci.c
_ reorder patches with functionnal board and defconfig in last
_ remove arch/arm/mach-sti/cpu.c and replace it by a sysreset DM driver
_ remove arch/arm/mach-sti/timer.c by a timer DM driver
_ remove useless arch/arm/include/asm/arch-stih410/syscfg.h
_ remove useless arch/arm/include/asm/arch-stih410/gpio.h and update 
  arch/arm/include/asm/gpio.h for ARCH_STI in patch 5

v2: _ fix remarks from Jaechon Chung on SDHCI patch
_ fix remarks from Antonio Borneo on board patch
_ replace some macro by U-boot generic's one
_ add missing maintainers in recipients

Patrice Chotard (9):
  arm: Add support for STMicroelectronics STiH410 soc
  STiH410: Add STi timer driver
  STiH410: Add STi sysreset driver
  STiH410: Add STi serial driver
  gpio: do not include  for ARCH_STI
  STiH410: Add STi SDHCI driver
  STiH410: Add STi pinctrl driver
  STiH410-B2260: Add device tree
  board: Add STMicroelectronics STiH410-B2260 support

 MAINTAINERS   |6 +
 arch/arm/Kconfig  |   13 +
 arch/arm/dts/Makefile |2 +
 arch/arm/dts/st-pincfg.h  |   71 ++
 arch/arm/dts/stih407-clock.dtsi   |  326 ++
 arch/arm/dts/stih407-family.dtsi  |  977 +++
 arch/arm/dts/stih407-pinctrl.dtsi | 1303 +
 arch/arm/dts/stih410-b2260.dts|  226 
 arch/arm/dts/stih410-clock.dtsi   |  347 ++
 arch/arm/dts/stih410-pinctrl.dtsi |   34 +
 arch/arm/dts/stih410.dtsi |  454 +++
 arch/arm/include/asm/arch-stih410/sdhci.h |   68 ++
 arch/arm/include/asm/gpio.h   |2 +-
 arch/arm/mach-sti/Kconfig |   31 +
 board/st/stih410-b2260/Kconfig|   19 +
 board/st/stih410-b2260/MAINTAINERS|7 +
 board/st/stih410-b2260/Makefile   |8 +
 board/st/stih410-b2260/board.c|   28 +
 configs/stih410-b2260_defconfig   |   26 +
 drivers/mmc/Kconfig   |7 +
 drivers/mmc/Makefile  |1 +
 drivers/mmc/sti_sdhci.c   |  141 +++
 drivers/pinctrl/Kconfig   |   10 +
 drivers/pinctrl/Makefile  |1 +
 drivers/pinctrl/pinctrl-sti.c |  320 +
 drivers/serial/Kconfig|8 +
 drivers/serial/Makefile   |1 +
 drivers/serial/serial_sti_asc.c   |  211 
 drivers/sysreset/Makefile |1 +
 drivers/sysreset/sysreset_sti.c   |   82 ++
 drivers/timer/Kconfig |7 +
 drivers/timer/Makefile|1 +
 drivers/timer/sti-timer.c |   78 ++
 include/configs/stih410-b2260.h   |   60 +
 include/dt-bindings/clock/stih407-clks.h  |   90 ++
 include/dt-bindings/clock/stih410-clks.h  |   25 +
 include/dt-bindings/interrupt-controller/irq-st.h |   30 +
 include/dt-bindings/mfd/st-lpc.h  |   16 +
 include/dt-bindings/reset/stih407-resets.h|   65 +
 39 files changed, 5102 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/st-pincfg.h
 create mode 100644 arch/arm/dts/stih407-clock.dtsi
 create mode 100644 arch/arm/dts/stih407-family.dtsi
 create mode 100644 arch/arm/dts/stih407-pinctrl.dtsi
 create mode 100644 arch/arm/dts/stih410-b2260.dts
 create mode 100644 arch/arm/dts/stih410-clock.dtsi
 create mode 100644 arch/arm/dts/stih410-pinctrl.dtsi
 create mode 100644 arch/arm/dts/stih410.dtsi
 create mode 100644 arch/arm/include/asm/arch-stih410/sdhci.h
 create mode 100644 arch/arm/mach-sti/Kconfig
 create mode 100644 board/st/stih410-b2260/Kconfig
 create mode 100644 board/st/stih410-b2260/MAINTAINERS
 create mode 100644 board/st/stih410-b2260/Makefile
 create mode 100644 board/st/stih410-b2260/board.c
 create mode 100644 configs/stih410-b2260_defconfig
 create mode 100644 drivers/mmc/sti_sdhci.c
 create mode 100644

[U-Boot] [PATCH v7 6/9] STiH410: Add STi SDHCI driver

2017-02-21 Thread patrice.chotard

From: Patrice Chotard 

Add SDHCI host controller found on STMicroelectronics SoCs

On some ST SoCs, i.e. STiH407/STiH410, the MMC devices can live
inside a dedicated flashSS sub-system that provides an extend subset
of registers that can be used to configure the Arasan MMC/SD Host
Controller.

This means, that the SDHCI Arasan Controller can be configured to be
eMMC4.5 or 4.3 spec compliant.

W/o these settings the SDHCI will configure and use the MMC/SD
controller with limited features e.g. PIO mode, no DMA, no HS etc.

Signed-off-by: Patrice Chotard 
Reviewed-by: Simon Glass 
Reviewed-by: Jaehoon Chung 
---
 arch/arm/Kconfig  |   2 +
 arch/arm/include/asm/arch-stih410/sdhci.h |  68 ++
 drivers/mmc/Kconfig   |   7 ++
 drivers/mmc/Makefile  |   1 +
 drivers/mmc/sti_sdhci.c   | 141 ++
 5 files changed, 219 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-stih410/sdhci.h
 create mode 100644 drivers/mmc/sti_sdhci.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b91a5b7..477f36b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -987,6 +987,8 @@ config ARCH_STI
select CPU_V7
select DM
select DM_SERIAL
+   select BLK
+   select DM_MMC
help
  Support for STMicroelectronics STiH407/10 SoC family.
  This SoC is used on Linaro 96Board STiH410-B2260
diff --git a/arch/arm/include/asm/arch-stih410/sdhci.h 
b/arch/arm/include/asm/arch-stih410/sdhci.h
new file mode 100644
index 000..8cd77fc
--- /dev/null
+++ b/arch/arm/include/asm/arch-stih410/sdhci.h
@@ -0,0 +1,68 @@
+/*
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __STI_SDHCI_H__
+#define __STI_SDHCI_H__
+
+#define FLASHSS_MMC_CORE_CONFIG_1  0x400
+#define FLASHSS_MMC_CORECFG_TIMEOUT_CLK_UNIT_MHZ   BIT(24)
+#define FLASHSS_MMC_CORECFG_TIMEOUT_CLK_FREQ_MIN   BIT(12)
+
+#define STI_FLASHSS_MMC_CORE_CONFIG_1  \
+   (FLASHSS_MMC_CORECFG_TIMEOUT_CLK_UNIT_MHZ   | \
+FLASHSS_MMC_CORECFG_TIMEOUT_CLK_FREQ_MIN)
+
+#define FLASHSS_MMC_CORE_CONFIG_2  0x404
+#define FLASHSS_MMC_CORECFG_HIGH_SPEED BIT(28)
+#define FLASHSS_MMC_CORECFG_8BIT_EMMC  BIT(20)
+#define MAX_BLK_LENGTH_1024BIT(16)
+#define BASE_CLK_FREQ_200  0xc8
+
+#define STI_FLASHSS_MMC_CORE_CONFIG2   \
+   (FLASHSS_MMC_CORECFG_HIGH_SPEED | \
+FLASHSS_MMC_CORECFG_8BIT_EMMC  | \
+MAX_BLK_LENGTH_1024| \
+BASE_CLK_FREQ_200 << 0)
+
+#define STI_FLASHSS_SDCARD_CORE_CONFIG2\
+   (FLASHSS_MMC_CORECFG_HIGH_SPEED | \
+MAX_BLK_LENGTH_1024| \
+BASE_CLK_FREQ_200)
+
+#define FLASHSS_MMC_CORE_CONFIG_3  0x408
+#define FLASHSS_MMC_CORECFG_SLOT_TYPE_EMMC BIT(28)
+#define FLASHSS_MMC_CORECFG_ASYNCH_INTR_SUPPORTBIT(20)
+#define FLASHSS_MMC_CORECFG_3P3_VOLT   BIT(8)
+#define FLASHSS_MMC_CORECFG_SUSP_RES_SUPPORT   BIT(4)
+#define FLASHSS_MMC_CORECFG_SDMA   BIT(0)
+
+#define STI_FLASHSS_MMC_CORE_CONFIG3   \
+(FLASHSS_MMC_CORECFG_SLOT_TYPE_EMMC| \
+FLASHSS_MMC_CORECFG_ASYNCH_INTR_SUPPORT| \
+FLASHSS_MMC_CORECFG_3P3_VOLT   | \
+FLASHSS_MMC_CORECFG_SUSP_RES_SUPPORT   | \
+FLASHSS_MMC_CORECFG_SDMA)
+
+#define STI_FLASHSS_SDCARD_CORE_CONFIG3\
+(FLASHSS_MMC_CORECFG_ASYNCH_INTR_SUPPORT   | \
+FLASHSS_MMC_CORECFG_3P3_VOLT   | \
+FLASHSS_MMC_CORECFG_SUSP_RES_SUPPORT   | \
+FLASHSS_MMC_CORECFG_SDMA)
+
+#define FLASHSS_MMC_CORE_CONFIG_4  0x40c
+#define FLASHSS_MMC_CORECFG_D_DRIVER_SUPPORT   BIT(20)
+#define FLASHSS_MMC_CORECFG_C_DRIVER_SUPPORT   BIT(16)
+#define FLASHSS_MMC_CORECFG_A_DRIVER_SUPPORT   BIT(12)
+
+#define STI_FLASHSS_MMC_CORE_CONFIG4   \
+   (FLASHSS_MMC_CORECFG_D_DRIVER_SUPPORT   | \
+FLASHSS_MMC_CORECFG_C_DRIVER_SUPPORT   | \
+FLASHSS_MMC_CORECFG_A_DRIVER_SUPPORT)
+
+#define ST_MMC_CCONFIG_REG_5   0x210
+#define SYSCONF_MMC1_ENABLE_BIT3
+
+#endif /* _STI_SDHCI_H_ */
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 01d1dbf..ea5ea08 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -299,6 +299,13 @@ config MMC_SDHCI_SPEAR
 
  If unsure, say N.
 
+config MMC_SDHCI_STI
+   bool "SDHCI support for STMicroelectronics SoC"
+   depends on MMC_SDHCI
+

[U-Boot] [PATCH v7 3/9] STiH410: Add STi sysreset driver

2017-02-21 Thread patrice.chotard

From: Patrice Chotard 

Signed-off-by: Patrice Chotard 
Reviewed-by: Simon Glass 
---
 drivers/sysreset/Makefile   |  1 +
 drivers/sysreset/sysreset_sti.c | 82 +
 2 files changed, 83 insertions(+)
 create mode 100644 drivers/sysreset/sysreset_sti.c

diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index 37638a8..21bcc21 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -13,5 +13,6 @@ obj-$(CONFIG_ROCKCHIP_RK3288) += sysreset_rk3288.o
 obj-$(CONFIG_ROCKCHIP_RK3399) += sysreset_rk3399.o
 obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o
 obj-$(CONFIG_ARCH_SNAPDRAGON) += sysreset_snapdragon.o
+obj-$(CONFIG_ARCH_STI) += sysreset_sti.o
 obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o
 obj-$(CONFIG_ARCH_ASPEED) += sysreset_ast.o
diff --git a/drivers/sysreset/sysreset_sti.c b/drivers/sysreset/sysreset_sti.c
new file mode 100644
index 000..9b58aa8
--- /dev/null
+++ b/drivers/sysreset/sysreset_sti.c
@@ -0,0 +1,82 @@
+/*
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct sti_sysreset_priv {
+   phys_addr_t base;
+};
+
+static int sti_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+   struct sti_sysreset_priv *priv = dev_get_priv(dev);
+
+   generic_clear_bit(0, (void __iomem *)priv->base);
+
+   return -EINPROGRESS;
+}
+
+static int sti_sysreset_probe(struct udevice *dev)
+{
+   struct sti_sysreset_priv *priv = dev_get_priv(dev);
+   struct udevice *syscon;
+   struct regmap *regmap;
+   struct fdtdec_phandle_args syscfg_phandle;
+   int ret;
+
+   /* get corresponding syscon phandle */
+   ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, dev_of_offset(dev),
+"st,syscfg", NULL, 0, 0,
+_phandle);
+   if (ret < 0) {
+   error("Can't get syscfg phandle: %d\n", ret);
+   return ret;
+   }
+
+   ret = uclass_get_device_by_of_offset(UCLASS_SYSCON,
+syscfg_phandle.node,
+);
+   if (ret) {
+   error("%s: uclass_get_device_by_of_offset failed: %d\n",
+ __func__, ret);
+   return ret;
+   }
+
+   regmap = syscon_get_regmap(syscon);
+   if (!regmap) {
+   error("unable to get regmap for %s\n", syscon->name);
+   return -ENODEV;
+   }
+
+   priv->base = regmap->base;
+
+   return 0;
+}
+
+static struct sysreset_ops sti_sysreset = {
+   .request= sti_sysreset_request,
+};
+
+static const struct udevice_id sti_sysreset_ids[] = {
+   { .compatible = "st,stih407-restart" },
+   { }
+};
+
+U_BOOT_DRIVER(sysreset_sti) = {
+   .name = "sysreset_sti",
+   .id = UCLASS_SYSRESET,
+   .ops = _sysreset,
+   .probe = sti_sysreset_probe,
+   .of_match = sti_sysreset_ids,
+   .priv_auto_alloc_size = sizeof(struct sti_sysreset_priv),
+};
-- 
1.9.1

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[U-Boot] [PATCH v6 5/9] gpio: do not include for ARCH_STI

2017-02-21 Thread patrice.chotard

From: Patrice Chotard 

As no gpio.h is defined in arch/arm/include/asm/arch-stih410,
to avoid compilation failure, do not include asm/arch/gpio.h.

This is needed for example when including sdhci.h, which include
asm/gpio.h>.

Signed-off-by: Patrice Chotard 
Reviewed-by: Simon Glass 
---
 arch/arm/include/asm/gpio.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h
index fe4419c..1c5e873 100644
--- a/arch/arm/include/asm/gpio.h
+++ b/arch/arm/include/asm/gpio.h
@@ -1,4 +1,4 @@
-#ifndef CONFIG_ARCH_UNIPHIER
+#if !defined(CONFIG_ARCH_UNIPHIER) && !defined(CONFIG_ARCH_STI)
 #include 
 #endif
 #include 
-- 
1.9.1

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[U-Boot] [PATCH v6 6/9] STiH410: Add STi SDHCI driver

2017-02-21 Thread patrice.chotard

From: Patrice Chotard 

Add SDHCI host controller found on STMicroelectronics SoCs

On some ST SoCs, i.e. STiH407/STiH410, the MMC devices can live
inside a dedicated flashSS sub-system that provides an extend subset
of registers that can be used to configure the Arasan MMC/SD Host
Controller.

This means, that the SDHCI Arasan Controller can be configured to be
eMMC4.5 or 4.3 spec compliant.

W/o these settings the SDHCI will configure and use the MMC/SD
controller with limited features e.g. PIO mode, no DMA, no HS etc.

Signed-off-by: Patrice Chotard 
Reviewed-by: Simon Glass 
Reviewed-by: Jaehoon Chung 
---
 arch/arm/Kconfig  |   2 +
 arch/arm/include/asm/arch-stih410/sdhci.h |  68 ++
 drivers/mmc/Kconfig   |   7 ++
 drivers/mmc/Makefile  |   1 +
 drivers/mmc/sti_sdhci.c   | 141 ++
 5 files changed, 219 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-stih410/sdhci.h
 create mode 100644 drivers/mmc/sti_sdhci.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b91a5b7..477f36b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -987,6 +987,8 @@ config ARCH_STI
select CPU_V7
select DM
select DM_SERIAL
+   select BLK
+   select DM_MMC
help
  Support for STMicroelectronics STiH407/10 SoC family.
  This SoC is used on Linaro 96Board STiH410-B2260
diff --git a/arch/arm/include/asm/arch-stih410/sdhci.h 
b/arch/arm/include/asm/arch-stih410/sdhci.h
new file mode 100644
index 000..8cd77fc
--- /dev/null
+++ b/arch/arm/include/asm/arch-stih410/sdhci.h
@@ -0,0 +1,68 @@
+/*
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __STI_SDHCI_H__
+#define __STI_SDHCI_H__
+
+#define FLASHSS_MMC_CORE_CONFIG_1  0x400
+#define FLASHSS_MMC_CORECFG_TIMEOUT_CLK_UNIT_MHZ   BIT(24)
+#define FLASHSS_MMC_CORECFG_TIMEOUT_CLK_FREQ_MIN   BIT(12)
+
+#define STI_FLASHSS_MMC_CORE_CONFIG_1  \
+   (FLASHSS_MMC_CORECFG_TIMEOUT_CLK_UNIT_MHZ   | \
+FLASHSS_MMC_CORECFG_TIMEOUT_CLK_FREQ_MIN)
+
+#define FLASHSS_MMC_CORE_CONFIG_2  0x404
+#define FLASHSS_MMC_CORECFG_HIGH_SPEED BIT(28)
+#define FLASHSS_MMC_CORECFG_8BIT_EMMC  BIT(20)
+#define MAX_BLK_LENGTH_1024BIT(16)
+#define BASE_CLK_FREQ_200  0xc8
+
+#define STI_FLASHSS_MMC_CORE_CONFIG2   \
+   (FLASHSS_MMC_CORECFG_HIGH_SPEED | \
+FLASHSS_MMC_CORECFG_8BIT_EMMC  | \
+MAX_BLK_LENGTH_1024| \
+BASE_CLK_FREQ_200 << 0)
+
+#define STI_FLASHSS_SDCARD_CORE_CONFIG2\
+   (FLASHSS_MMC_CORECFG_HIGH_SPEED | \
+MAX_BLK_LENGTH_1024| \
+BASE_CLK_FREQ_200)
+
+#define FLASHSS_MMC_CORE_CONFIG_3  0x408
+#define FLASHSS_MMC_CORECFG_SLOT_TYPE_EMMC BIT(28)
+#define FLASHSS_MMC_CORECFG_ASYNCH_INTR_SUPPORTBIT(20)
+#define FLASHSS_MMC_CORECFG_3P3_VOLT   BIT(8)
+#define FLASHSS_MMC_CORECFG_SUSP_RES_SUPPORT   BIT(4)
+#define FLASHSS_MMC_CORECFG_SDMA   BIT(0)
+
+#define STI_FLASHSS_MMC_CORE_CONFIG3   \
+(FLASHSS_MMC_CORECFG_SLOT_TYPE_EMMC| \
+FLASHSS_MMC_CORECFG_ASYNCH_INTR_SUPPORT| \
+FLASHSS_MMC_CORECFG_3P3_VOLT   | \
+FLASHSS_MMC_CORECFG_SUSP_RES_SUPPORT   | \
+FLASHSS_MMC_CORECFG_SDMA)
+
+#define STI_FLASHSS_SDCARD_CORE_CONFIG3\
+(FLASHSS_MMC_CORECFG_ASYNCH_INTR_SUPPORT   | \
+FLASHSS_MMC_CORECFG_3P3_VOLT   | \
+FLASHSS_MMC_CORECFG_SUSP_RES_SUPPORT   | \
+FLASHSS_MMC_CORECFG_SDMA)
+
+#define FLASHSS_MMC_CORE_CONFIG_4  0x40c
+#define FLASHSS_MMC_CORECFG_D_DRIVER_SUPPORT   BIT(20)
+#define FLASHSS_MMC_CORECFG_C_DRIVER_SUPPORT   BIT(16)
+#define FLASHSS_MMC_CORECFG_A_DRIVER_SUPPORT   BIT(12)
+
+#define STI_FLASHSS_MMC_CORE_CONFIG4   \
+   (FLASHSS_MMC_CORECFG_D_DRIVER_SUPPORT   | \
+FLASHSS_MMC_CORECFG_C_DRIVER_SUPPORT   | \
+FLASHSS_MMC_CORECFG_A_DRIVER_SUPPORT)
+
+#define ST_MMC_CCONFIG_REG_5   0x210
+#define SYSCONF_MMC1_ENABLE_BIT3
+
+#endif /* _STI_SDHCI_H_ */
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 01d1dbf..ea5ea08 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -299,6 +299,13 @@ config MMC_SDHCI_SPEAR
 
  If unsure, say N.
 
+config MMC_SDHCI_STI
+   bool "SDHCI support for STMicroelectronics SoC"
+   depends on MMC_SDHCI
+

[U-Boot] [PATCH v6 7/9] STiH410: Add STi pinctrl driver

2017-02-21 Thread patrice.chotard

From: Patrice Chotard 

Add STMicroelectronics STiH410 pinctrl driver

Signed-off-by: Patrice Chotard 
Reviewed-by: Tom Rini 
Reviewed-by: Simon Glass 
---

v6: _ add missing return value to bitfield_replace() in sti_alternate_select()

 drivers/pinctrl/Kconfig   |  10 ++
 drivers/pinctrl/Makefile  |   1 +
 drivers/pinctrl/pinctrl-sti.c | 320 ++
 3 files changed, 331 insertions(+)
 create mode 100644 drivers/pinctrl/pinctrl-sti.c

diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index efcb4c0..0c832e1 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -175,6 +175,16 @@ config PIC32_PINCTRL
  by a device tree node which contains both GPIO defintion and pin 
control
  functions.
 
+config PINCTRL_STI
+   bool "STMicroelectronics STi pin-control and pin-mux driver"
+   depends on DM && ARCH_STI
+   default y
+   help
+ Support pin multiplexing control on STMicrolectronics STi SoCs.
+ The driver is controlled by a device tree node which contains both
+ the GPIO definitions and pin control functions for each available 
multiplex
+ function.
+
 endif
 
 source "drivers/pinctrl/meson/Kconfig"
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 512112a..a2f8101 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -16,3 +16,4 @@ obj-$(CONFIG_PIC32_PINCTRL)   += pinctrl_pic32.o
 obj-$(CONFIG_PINCTRL_EXYNOS)   += exynos/
 obj-$(CONFIG_PINCTRL_MESON)+= meson/
 obj-$(CONFIG_PINCTRL_MVEBU)+= mvebu/
+obj-$(CONFIG_PINCTRL_STI)  += pinctrl-sti.o
diff --git a/drivers/pinctrl/pinctrl-sti.c b/drivers/pinctrl/pinctrl-sti.c
new file mode 100644
index 000..40341b4
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-sti.c
@@ -0,0 +1,320 @@
+/*
+ * Pinctrl driver for STMicroelectronics STi SoCs
+ *
+ *  Copyright (c) 2017
+ *  Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define MAX_STI_PINCONF_ENTRIES7
+/* Output enable */
+#define OE (1 << 27)
+/* Pull Up */
+#define PU (1 << 26)
+/* Open Drain */
+#define OD (1 << 25)
+
+/* User-frendly defines for Pin Direction */
+   /* oe = 0, pu = 0, od = 0 */
+#define IN (0)
+   /* oe = 0, pu = 1, od = 0 */
+#define IN_PU  (PU)
+   /* oe = 1, pu = 0, od = 0 */
+#define OUT(OE)
+   /* oe = 1, pu = 1, od = 0 */
+#define OUT_PU (OE | PU)
+   /* oe = 1, pu = 0, od = 1 */
+#define BIDIR  (OE | OD)
+   /* oe = 1, pu = 1, od = 1 */
+#define BIDIR_PU   (OE | PU | OD)
+
+struct sti_pinctrl_platdata {
+   struct regmap *regmap;
+};
+
+struct sti_pin_desc {
+   unsigned char bank;
+   unsigned char pin;
+   unsigned char alt;
+   int dir;
+};
+
+/*
+ * PIO alternative Function selector
+ */
+void sti_alternate_select(struct udevice *dev, struct sti_pin_desc *pin_desc)
+{
+   struct sti_pinctrl_platdata *plat = dev_get_platdata(dev);
+   unsigned long sysconf, *sysconfreg;
+   int alt = pin_desc->alt;
+   int bank = pin_desc->bank;
+   int pin = pin_desc->pin;
+
+   sysconfreg = (unsigned long *)plat->regmap->base;
+
+   switch (bank) {
+   case 0 ... 5:   /* in "SBC Bank" */
+   sysconfreg += bank;
+   break;
+   case 10 ... 20: /* in "FRONT Bank" */
+   sysconfreg += bank - 10;
+   break;
+   case 30 ... 35: /* in "REAR Bank" */
+   sysconfreg += bank - 30;
+   break;
+   case 40 ... 42: /* in "FLASH Bank" */
+   sysconfreg += bank - 40;
+   break;
+   default:
+   BUG();
+   return;
+   }
+
+   sysconf = readl(sysconfreg);
+   sysconf = bitfield_replace(sysconf, pin * 4, 3, alt);
+   writel(sysconf, sysconfreg);
+}
+
+/* pin configuration */
+void sti_pin_configure(struct udevice *dev, struct sti_pin_desc *pin_desc)
+{
+   struct sti_pinctrl_platdata *plat = dev_get_platdata(dev);
+   int bit;
+   int oe = 0, pu = 0, od = 0;
+   unsigned long *sysconfreg;
+   int bank = pin_desc->bank;
+
+   sysconfreg = (unsigned long *)plat->regmap->base + 40;
+
+   /*
+* NOTE: The PIO configuration for the PIO pins in the
+* "FLASH Bank" are different from all the other banks!
+* Specifically, the output-enable pin control register
+* (SYS_CFG_3040) and the pull-up pin control register
+* (SYS_CFG_3050), are both classed as being

[U-Boot] [PATCH v6 9/9] board: Add STMicroelectronics STiH410-B2260 support

2017-02-21 Thread patrice.chotard

From: Patrice Chotard 

This is a 96Board compliant board based on STiH410 SoC:
  - 1GB DDR
  - On-Board USB combo WiFi/Bluetooth RTL8723BU
with PCB soldered antenna
  - Ethernet 1000-BaseT
  - SATA
  - HDMI
  - 2 x USB2.0 type A
  - 1 x USB2.0 type micro-AB
  - SD card slot
  - High speed connector (SD/I2C/USB interfaces)
  - Low speed connector (UART/I2C/GPIO/SPI/PCM interfaces)

Signed-off-by: Patrice Chotard 
Reviewed-by: Tom Rini 
Reviewed-by: Simon Glass 
---
 arch/arm/mach-sti/Kconfig  | 25 
 board/st/stih410-b2260/Kconfig | 19 
 board/st/stih410-b2260/MAINTAINERS |  7 +
 board/st/stih410-b2260/Makefile|  8 +
 board/st/stih410-b2260/board.c | 28 ++
 configs/stih410-b2260_defconfig| 26 +
 include/configs/stih410-b2260.h| 60 ++
 7 files changed, 173 insertions(+)
 create mode 100644 board/st/stih410-b2260/Kconfig
 create mode 100644 board/st/stih410-b2260/MAINTAINERS
 create mode 100644 board/st/stih410-b2260/Makefile
 create mode 100644 board/st/stih410-b2260/board.c
 create mode 100644 configs/stih410-b2260_defconfig
 create mode 100644 include/configs/stih410-b2260.h

diff --git a/arch/arm/mach-sti/Kconfig b/arch/arm/mach-sti/Kconfig
index 87c04b2..67a3b24 100644
--- a/arch/arm/mach-sti/Kconfig
+++ b/arch/arm/mach-sti/Kconfig
@@ -3,4 +3,29 @@ if ARCH_STI
 config SYS_SOC
default "stih410"
 
+choice
+   prompt "STiH410 board select"
+
+config TARGET_STIH410_B2260
+   bool "96Boards STiH410-B2260"
+   help
+ Support for 96Board STiH410-B2260 based on STMicrolectronics
+ STiH410 soc. This board complies with 96Board Open Platform
+ Specifications. Features:
+ - 1GB DDR
+ - On-Board USB combo WiFi/Bluetooth RTL8723BU
+   with PCB soldered antenna
+ - Ethernet 1000-BaseT
+ - Sata
+ - HDMI
+ - 2 x USB2 type A
+ - micro USB2 type AB
+ - SD card slot
+ - High speed connector (SD/I2C/USB interfaces)
+ - Slow speed connector (UART/I2C/GPIO/SPI/PCM interfaces)
+
+endchoice
+
+source "board/st/stih410-b2260/Kconfig"
+
 endif
diff --git a/board/st/stih410-b2260/Kconfig b/board/st/stih410-b2260/Kconfig
new file mode 100644
index 000..590add0
--- /dev/null
+++ b/board/st/stih410-b2260/Kconfig
@@ -0,0 +1,19 @@
+if TARGET_STIH410_B2260
+
+config SYS_BOARD
+   string
+   default "stih410-b2260"
+
+config SYS_VENDOR
+   string
+   default "st"
+
+config SYS_SOC
+   string
+   default "stih410"
+
+config SYS_CONFIG_NAME
+   string
+   default "stih410-b2260"
+
+endif
diff --git a/board/st/stih410-b2260/MAINTAINERS 
b/board/st/stih410-b2260/MAINTAINERS
new file mode 100644
index 000..4f557ac
--- /dev/null
+++ b/board/st/stih410-b2260/MAINTAINERS
@@ -0,0 +1,7 @@
+STIH410-B2260 BOARD
+M: Patrice Chotard 
+S: Maintained
+F: board/st/stih410-b2260/
+F: include/configs/stih410-b2260.h
+F: configs/stih410-b2260_defconfig
+F: arch/arm/dts/stih*
diff --git a/board/st/stih410-b2260/Makefile b/board/st/stih410-b2260/Makefile
new file mode 100644
index 000..68a7903
--- /dev/null
+++ b/board/st/stih410-b2260/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2017
+# Patrice Chotard, 
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y  = board.o
diff --git a/board/st/stih410-b2260/board.c b/board/st/stih410-b2260/board.c
new file mode 100644
index 000..0c06bca
--- /dev/null
+++ b/board/st/stih410-b2260/board.c
@@ -0,0 +1,28 @@
+/*
+ * Board init file for STiH410-B2260
+ *
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+   gd->ram_size = PHYS_SDRAM_1_SIZE;
+   return 0;
+}
+
+void dram_init_banksize(void)
+{
+   gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+   gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+}
+
+int board_init(void)
+{
+   return 0;
+}
diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig
new file mode 100644
index 000..4e6942f
--- /dev/null
+++ b/configs/stih410-b2260_defconfig
@@ -0,0 +1,26 @@
+CONFIG_ARM=y
+CONFIG_ARCH_STI=y
+CONFIG_IDENT_STRING="STMicroelectronics STiH410-B2260"
+CONFIG_DEFAULT_DEVICE_TREE="stih410-b2260"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SYS_PROMPT="stih410-b2260 => "
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_OF_CONTROL=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_STI=y
+CONFIG_PINCTRL=y
+CONFIG_STI_ASC_SERIAL=y
+CONFIG_SYSRESET=y
+CONFIG_TIMER=y

[U-Boot] [PATCH v7 8/9] STiH410-B2260: Add device tree

2017-02-21 Thread patrice.chotard

From: Patrice Chotard 

This device tree has been extracted from v4.9 kernel

Signed-off-by: Patrice Chotard 
Reviewed-by: Tom Rini 
Reviewed-by: Simon Glass 
---
 arch/arm/dts/Makefile |2 +
 arch/arm/dts/st-pincfg.h  |   71 ++
 arch/arm/dts/stih407-clock.dtsi   |  326 ++
 arch/arm/dts/stih407-family.dtsi  |  977 +++
 arch/arm/dts/stih407-pinctrl.dtsi | 1303 +
 arch/arm/dts/stih410-b2260.dts|  226 
 arch/arm/dts/stih410-clock.dtsi   |  347 ++
 arch/arm/dts/stih410-pinctrl.dtsi |   34 +
 arch/arm/dts/stih410.dtsi |  454 +++
 drivers/mmc/Kconfig   |2 +-
 include/dt-bindings/clock/stih407-clks.h  |   90 ++
 include/dt-bindings/clock/stih410-clks.h  |   25 +
 include/dt-bindings/interrupt-controller/irq-st.h |   30 +
 include/dt-bindings/mfd/st-lpc.h  |   16 +
 include/dt-bindings/reset/stih407-resets.h|   65 +
 15 files changed, 3967 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/st-pincfg.h
 create mode 100644 arch/arm/dts/stih407-clock.dtsi
 create mode 100644 arch/arm/dts/stih407-family.dtsi
 create mode 100644 arch/arm/dts/stih407-pinctrl.dtsi
 create mode 100644 arch/arm/dts/stih410-b2260.dts
 create mode 100644 arch/arm/dts/stih410-clock.dtsi
 create mode 100644 arch/arm/dts/stih410-pinctrl.dtsi
 create mode 100644 arch/arm/dts/stih410.dtsi
 create mode 100644 include/dt-bindings/clock/stih407-clks.h
 create mode 100644 include/dt-bindings/clock/stih410-clks.h
 create mode 100644 include/dt-bindings/interrupt-controller/irq-st.h
 create mode 100644 include/dt-bindings/mfd/st-lpc.h
 create mode 100644 include/dt-bindings/reset/stih407-resets.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index eb68c20..231ebfa 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -339,6 +339,8 @@ dtb-$(CONFIG_ARCH_BCM283X) += \
 
 dtb-$(CONFIG_ARCH_ASPEED) += ast2500-evb.dtb
 
+dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb
+
 targets += $(dtb-y)
 
 # Add any required device tree compiler flags here
diff --git a/arch/arm/dts/st-pincfg.h b/arch/arm/dts/st-pincfg.h
new file mode 100644
index 000..4851c38
--- /dev/null
+++ b/arch/arm/dts/st-pincfg.h
@@ -0,0 +1,71 @@
+#ifndef _ST_PINCFG_H_
+#define _ST_PINCFG_H_
+
+/* Alternate functions */
+#define ALT1   1
+#define ALT2   2
+#define ALT3   3
+#define ALT4   4
+#define ALT5   5
+#define ALT6   6
+#define ALT7   7
+
+/* Output enable */
+#define OE (1 << 27)
+/* Pull Up */
+#define PU (1 << 26)
+/* Open Drain */
+#define OD (1 << 25)
+#define RT (1 << 23)
+#define INVERTCLK  (1 << 22)
+#define CLKNOTDATA (1 << 21)
+#define DOUBLE_EDGE(1 << 20)
+#define CLK_A  (0 << 18)
+#define CLK_B  (1 << 18)
+#define CLK_C  (2 << 18)
+#define CLK_D  (3 << 18)
+
+/* User-frendly defines for Pin Direction */
+   /* oe = 0, pu = 0, od = 0 */
+#define IN (0)
+   /* oe = 0, pu = 1, od = 0 */
+#define IN_PU  (PU)
+   /* oe = 1, pu = 0, od = 0 */
+#define OUT(OE)
+   /* oe = 1, pu = 0, od = 1 */
+#define BIDIR  (OE | OD)
+   /* oe = 1, pu = 1, od = 1 */
+#define BIDIR_PU   (OE | PU | OD)
+
+/* RETIME_TYPE */
+/*
+ * B Mode
+ * Bypass retime with optional delay parameter
+ */
+#define BYPASS (0)
+/*
+ * R0, R1, R0D, R1D modes
+ * single-edge data non inverted clock, retime data with clk
+ */
+#define SE_NICLK_IO(RT)
+/*
+ * RIV0, RIV1, RIV0D, RIV1D modes
+ * single-edge data inverted clock, retime data with clk
+ */
+#define SE_ICLK_IO (RT | INVERTCLK)
+/*
+ * R0E, R1E, R0ED, R1ED modes
+ * double-edge data, retime data with clk
+ */
+#define DE_IO  (RT | DOUBLE_EDGE)
+/*
+ * CIV0, CIV1 modes with inverted clock
+ * Retiming the clk pins will park clock & reduce the noise within the core.
+ */
+#define ICLK   (RT | CLKNOTDATA | INVERTCLK)
+/*
+ * CLK0, CLK1 modes with non-inverted clock
+ * Retiming the clk pins will park clock & reduce the noise within the core.
+ */
+#define NICLK  (RT | CLKNOTDATA)
+#endif /* _ST_PINCFG_H_ */
diff --git a/arch/arm/dts/stih407-clock.dtsi b/arch/arm/dts/stih407-clock.dtsi
new file mode 100644
index 000..13029c0
--- /dev/null
+++ b/arch/arm/dts/stih407-clock.dtsi
@@ -0,0 +1,326 @@
+/*
+ * Copyright (C) 2014 STMicroelectronics R Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as

[U-Boot] [PATCH v6 8/9] STiH410-B2260: Add device tree

2017-02-21 Thread patrice.chotard

From: Patrice Chotard 

This device tree has been extracted from v4.9 kernel

Signed-off-by: Patrice Chotard 
Reviewed-by: Tom Rini 
Reviewed-by: Simon Glass 
---
 arch/arm/dts/Makefile |2 +
 arch/arm/dts/st-pincfg.h  |   71 ++
 arch/arm/dts/stih407-clock.dtsi   |  326 ++
 arch/arm/dts/stih407-family.dtsi  |  977 +++
 arch/arm/dts/stih407-pinctrl.dtsi | 1303 +
 arch/arm/dts/stih410-b2260.dts|  226 
 arch/arm/dts/stih410-clock.dtsi   |  347 ++
 arch/arm/dts/stih410-pinctrl.dtsi |   34 +
 arch/arm/dts/stih410.dtsi |  454 +++
 drivers/mmc/Kconfig   |2 +-
 include/dt-bindings/clock/stih407-clks.h  |   90 ++
 include/dt-bindings/clock/stih410-clks.h  |   25 +
 include/dt-bindings/interrupt-controller/irq-st.h |   30 +
 include/dt-bindings/mfd/st-lpc.h  |   16 +
 include/dt-bindings/reset/stih407-resets.h|   65 +
 15 files changed, 3967 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/st-pincfg.h
 create mode 100644 arch/arm/dts/stih407-clock.dtsi
 create mode 100644 arch/arm/dts/stih407-family.dtsi
 create mode 100644 arch/arm/dts/stih407-pinctrl.dtsi
 create mode 100644 arch/arm/dts/stih410-b2260.dts
 create mode 100644 arch/arm/dts/stih410-clock.dtsi
 create mode 100644 arch/arm/dts/stih410-pinctrl.dtsi
 create mode 100644 arch/arm/dts/stih410.dtsi
 create mode 100644 include/dt-bindings/clock/stih407-clks.h
 create mode 100644 include/dt-bindings/clock/stih410-clks.h
 create mode 100644 include/dt-bindings/interrupt-controller/irq-st.h
 create mode 100644 include/dt-bindings/mfd/st-lpc.h
 create mode 100644 include/dt-bindings/reset/stih407-resets.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index eb68c20..231ebfa 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -339,6 +339,8 @@ dtb-$(CONFIG_ARCH_BCM283X) += \
 
 dtb-$(CONFIG_ARCH_ASPEED) += ast2500-evb.dtb
 
+dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb
+
 targets += $(dtb-y)
 
 # Add any required device tree compiler flags here
diff --git a/arch/arm/dts/st-pincfg.h b/arch/arm/dts/st-pincfg.h
new file mode 100644
index 000..4851c38
--- /dev/null
+++ b/arch/arm/dts/st-pincfg.h
@@ -0,0 +1,71 @@
+#ifndef _ST_PINCFG_H_
+#define _ST_PINCFG_H_
+
+/* Alternate functions */
+#define ALT1   1
+#define ALT2   2
+#define ALT3   3
+#define ALT4   4
+#define ALT5   5
+#define ALT6   6
+#define ALT7   7
+
+/* Output enable */
+#define OE (1 << 27)
+/* Pull Up */
+#define PU (1 << 26)
+/* Open Drain */
+#define OD (1 << 25)
+#define RT (1 << 23)
+#define INVERTCLK  (1 << 22)
+#define CLKNOTDATA (1 << 21)
+#define DOUBLE_EDGE(1 << 20)
+#define CLK_A  (0 << 18)
+#define CLK_B  (1 << 18)
+#define CLK_C  (2 << 18)
+#define CLK_D  (3 << 18)
+
+/* User-frendly defines for Pin Direction */
+   /* oe = 0, pu = 0, od = 0 */
+#define IN (0)
+   /* oe = 0, pu = 1, od = 0 */
+#define IN_PU  (PU)
+   /* oe = 1, pu = 0, od = 0 */
+#define OUT(OE)
+   /* oe = 1, pu = 0, od = 1 */
+#define BIDIR  (OE | OD)
+   /* oe = 1, pu = 1, od = 1 */
+#define BIDIR_PU   (OE | PU | OD)
+
+/* RETIME_TYPE */
+/*
+ * B Mode
+ * Bypass retime with optional delay parameter
+ */
+#define BYPASS (0)
+/*
+ * R0, R1, R0D, R1D modes
+ * single-edge data non inverted clock, retime data with clk
+ */
+#define SE_NICLK_IO(RT)
+/*
+ * RIV0, RIV1, RIV0D, RIV1D modes
+ * single-edge data inverted clock, retime data with clk
+ */
+#define SE_ICLK_IO (RT | INVERTCLK)
+/*
+ * R0E, R1E, R0ED, R1ED modes
+ * double-edge data, retime data with clk
+ */
+#define DE_IO  (RT | DOUBLE_EDGE)
+/*
+ * CIV0, CIV1 modes with inverted clock
+ * Retiming the clk pins will park clock & reduce the noise within the core.
+ */
+#define ICLK   (RT | CLKNOTDATA | INVERTCLK)
+/*
+ * CLK0, CLK1 modes with non-inverted clock
+ * Retiming the clk pins will park clock & reduce the noise within the core.
+ */
+#define NICLK  (RT | CLKNOTDATA)
+#endif /* _ST_PINCFG_H_ */
diff --git a/arch/arm/dts/stih407-clock.dtsi b/arch/arm/dts/stih407-clock.dtsi
new file mode 100644
index 000..13029c0
--- /dev/null
+++ b/arch/arm/dts/stih407-clock.dtsi
@@ -0,0 +1,326 @@
+/*
+ * Copyright (C) 2014 STMicroelectronics R Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as

[U-Boot] [PATCH v5 9/9] board: Add STMicroelectronics STiH410-B2260 support

2017-02-20 Thread patrice.chotard

From: Patrice Chotard 

This is a 96Board compliant board based on STiH410 SoC:
  - 1GB DDR
  - On-Board USB combo WiFi/Bluetooth RTL8723BU
with PCB soldered antenna
  - Ethernet 1000-BaseT
  - SATA
  - HDMI
  - 2 x USB2.0 type A
  - 1 x USB2.0 type micro-AB
  - SD card slot
  - High speed connector (SD/I2C/USB interfaces)
  - Low speed connector (UART/I2C/GPIO/SPI/PCM interfaces)

Signed-off-by: Patrice Chotard 
Reviewed-by: Tom Rini 
Reviewed-by: Simon Glass 
---

v5:  _ migrate board description from patch 1 to 9

 arch/arm/mach-sti/Kconfig  | 25 
 board/st/stih410-b2260/Kconfig | 19 
 board/st/stih410-b2260/MAINTAINERS |  7 +
 board/st/stih410-b2260/Makefile|  8 +
 board/st/stih410-b2260/board.c | 28 ++
 configs/stih410-b2260_defconfig| 26 +
 include/configs/stih410-b2260.h| 60 ++
 7 files changed, 173 insertions(+)
 create mode 100644 board/st/stih410-b2260/Kconfig
 create mode 100644 board/st/stih410-b2260/MAINTAINERS
 create mode 100644 board/st/stih410-b2260/Makefile
 create mode 100644 board/st/stih410-b2260/board.c
 create mode 100644 configs/stih410-b2260_defconfig
 create mode 100644 include/configs/stih410-b2260.h

diff --git a/arch/arm/mach-sti/Kconfig b/arch/arm/mach-sti/Kconfig
index 87c04b2..67a3b24 100644
--- a/arch/arm/mach-sti/Kconfig
+++ b/arch/arm/mach-sti/Kconfig
@@ -3,4 +3,29 @@ if ARCH_STI
 config SYS_SOC
default "stih410"
 
+choice
+   prompt "STiH410 board select"
+
+config TARGET_STIH410_B2260
+   bool "96Boards STiH410-B2260"
+   help
+ Support for 96Board STiH410-B2260 based on STMicrolectronics
+ STiH410 soc. This board complies with 96Board Open Platform
+ Specifications. Features:
+ - 1GB DDR
+ - On-Board USB combo WiFi/Bluetooth RTL8723BU
+   with PCB soldered antenna
+ - Ethernet 1000-BaseT
+ - Sata
+ - HDMI
+ - 2 x USB2 type A
+ - micro USB2 type AB
+ - SD card slot
+ - High speed connector (SD/I2C/USB interfaces)
+ - Slow speed connector (UART/I2C/GPIO/SPI/PCM interfaces)
+
+endchoice
+
+source "board/st/stih410-b2260/Kconfig"
+
 endif
diff --git a/board/st/stih410-b2260/Kconfig b/board/st/stih410-b2260/Kconfig
new file mode 100644
index 000..590add0
--- /dev/null
+++ b/board/st/stih410-b2260/Kconfig
@@ -0,0 +1,19 @@
+if TARGET_STIH410_B2260
+
+config SYS_BOARD
+   string
+   default "stih410-b2260"
+
+config SYS_VENDOR
+   string
+   default "st"
+
+config SYS_SOC
+   string
+   default "stih410"
+
+config SYS_CONFIG_NAME
+   string
+   default "stih410-b2260"
+
+endif
diff --git a/board/st/stih410-b2260/MAINTAINERS 
b/board/st/stih410-b2260/MAINTAINERS
new file mode 100644
index 000..4f557ac
--- /dev/null
+++ b/board/st/stih410-b2260/MAINTAINERS
@@ -0,0 +1,7 @@
+STIH410-B2260 BOARD
+M: Patrice Chotard 
+S: Maintained
+F: board/st/stih410-b2260/
+F: include/configs/stih410-b2260.h
+F: configs/stih410-b2260_defconfig
+F: arch/arm/dts/stih*
diff --git a/board/st/stih410-b2260/Makefile b/board/st/stih410-b2260/Makefile
new file mode 100644
index 000..68a7903
--- /dev/null
+++ b/board/st/stih410-b2260/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2017
+# Patrice Chotard, 
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y  = board.o
diff --git a/board/st/stih410-b2260/board.c b/board/st/stih410-b2260/board.c
new file mode 100644
index 000..0c06bca
--- /dev/null
+++ b/board/st/stih410-b2260/board.c
@@ -0,0 +1,28 @@
+/*
+ * Board init file for STiH410-B2260
+ *
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+   gd->ram_size = PHYS_SDRAM_1_SIZE;
+   return 0;
+}
+
+void dram_init_banksize(void)
+{
+   gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+   gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+}
+
+int board_init(void)
+{
+   return 0;
+}
diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig
new file mode 100644
index 000..4e6942f
--- /dev/null
+++ b/configs/stih410-b2260_defconfig
@@ -0,0 +1,26 @@
+CONFIG_ARM=y
+CONFIG_ARCH_STI=y
+CONFIG_IDENT_STRING="STMicroelectronics STiH410-B2260"
+CONFIG_DEFAULT_DEVICE_TREE="stih410-b2260"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SYS_PROMPT="stih410-b2260 => "
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_OF_CONTROL=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_STI=y
+CONFIG_PINCTRL=y

[U-Boot] [PATCH v5 6/9] STiH410: Add STi SDHCI driver

2017-02-20 Thread patrice.chotard

From: Patrice Chotard 

Add SDHCI host controller found on STMicroelectronics SoCs

On some ST SoCs, i.e. STiH407/STiH410, the MMC devices can live
inside a dedicated flashSS sub-system that provides an extend subset
of registers that can be used to configure the Arasan MMC/SD Host
Controller.

This means, that the SDHCI Arasan Controller can be configured to be
eMMC4.5 or 4.3 spec compliant.

W/o these settings the SDHCI will configure and use the MMC/SD
controller with limited features e.g. PIO mode, no DMA, no HS etc.

Signed-off-by: Patrice Chotard 
Reviewed-by: Simon Glass 
Reviewed-by: Jaehoon Chung 
---
 arch/arm/Kconfig  |   2 +
 arch/arm/include/asm/arch-stih410/sdhci.h |  68 ++
 drivers/mmc/Kconfig   |   7 ++
 drivers/mmc/Makefile  |   1 +
 drivers/mmc/sti_sdhci.c   | 141 ++
 5 files changed, 219 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-stih410/sdhci.h
 create mode 100644 drivers/mmc/sti_sdhci.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b91a5b7..477f36b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -987,6 +987,8 @@ config ARCH_STI
select CPU_V7
select DM
select DM_SERIAL
+   select BLK
+   select DM_MMC
help
  Support for STMicroelectronics STiH407/10 SoC family.
  This SoC is used on Linaro 96Board STiH410-B2260
diff --git a/arch/arm/include/asm/arch-stih410/sdhci.h 
b/arch/arm/include/asm/arch-stih410/sdhci.h
new file mode 100644
index 000..8cd77fc
--- /dev/null
+++ b/arch/arm/include/asm/arch-stih410/sdhci.h
@@ -0,0 +1,68 @@
+/*
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __STI_SDHCI_H__
+#define __STI_SDHCI_H__
+
+#define FLASHSS_MMC_CORE_CONFIG_1  0x400
+#define FLASHSS_MMC_CORECFG_TIMEOUT_CLK_UNIT_MHZ   BIT(24)
+#define FLASHSS_MMC_CORECFG_TIMEOUT_CLK_FREQ_MIN   BIT(12)
+
+#define STI_FLASHSS_MMC_CORE_CONFIG_1  \
+   (FLASHSS_MMC_CORECFG_TIMEOUT_CLK_UNIT_MHZ   | \
+FLASHSS_MMC_CORECFG_TIMEOUT_CLK_FREQ_MIN)
+
+#define FLASHSS_MMC_CORE_CONFIG_2  0x404
+#define FLASHSS_MMC_CORECFG_HIGH_SPEED BIT(28)
+#define FLASHSS_MMC_CORECFG_8BIT_EMMC  BIT(20)
+#define MAX_BLK_LENGTH_1024BIT(16)
+#define BASE_CLK_FREQ_200  0xc8
+
+#define STI_FLASHSS_MMC_CORE_CONFIG2   \
+   (FLASHSS_MMC_CORECFG_HIGH_SPEED | \
+FLASHSS_MMC_CORECFG_8BIT_EMMC  | \
+MAX_BLK_LENGTH_1024| \
+BASE_CLK_FREQ_200 << 0)
+
+#define STI_FLASHSS_SDCARD_CORE_CONFIG2\
+   (FLASHSS_MMC_CORECFG_HIGH_SPEED | \
+MAX_BLK_LENGTH_1024| \
+BASE_CLK_FREQ_200)
+
+#define FLASHSS_MMC_CORE_CONFIG_3  0x408
+#define FLASHSS_MMC_CORECFG_SLOT_TYPE_EMMC BIT(28)
+#define FLASHSS_MMC_CORECFG_ASYNCH_INTR_SUPPORTBIT(20)
+#define FLASHSS_MMC_CORECFG_3P3_VOLT   BIT(8)
+#define FLASHSS_MMC_CORECFG_SUSP_RES_SUPPORT   BIT(4)
+#define FLASHSS_MMC_CORECFG_SDMA   BIT(0)
+
+#define STI_FLASHSS_MMC_CORE_CONFIG3   \
+(FLASHSS_MMC_CORECFG_SLOT_TYPE_EMMC| \
+FLASHSS_MMC_CORECFG_ASYNCH_INTR_SUPPORT| \
+FLASHSS_MMC_CORECFG_3P3_VOLT   | \
+FLASHSS_MMC_CORECFG_SUSP_RES_SUPPORT   | \
+FLASHSS_MMC_CORECFG_SDMA)
+
+#define STI_FLASHSS_SDCARD_CORE_CONFIG3\
+(FLASHSS_MMC_CORECFG_ASYNCH_INTR_SUPPORT   | \
+FLASHSS_MMC_CORECFG_3P3_VOLT   | \
+FLASHSS_MMC_CORECFG_SUSP_RES_SUPPORT   | \
+FLASHSS_MMC_CORECFG_SDMA)
+
+#define FLASHSS_MMC_CORE_CONFIG_4  0x40c
+#define FLASHSS_MMC_CORECFG_D_DRIVER_SUPPORT   BIT(20)
+#define FLASHSS_MMC_CORECFG_C_DRIVER_SUPPORT   BIT(16)
+#define FLASHSS_MMC_CORECFG_A_DRIVER_SUPPORT   BIT(12)
+
+#define STI_FLASHSS_MMC_CORE_CONFIG4   \
+   (FLASHSS_MMC_CORECFG_D_DRIVER_SUPPORT   | \
+FLASHSS_MMC_CORECFG_C_DRIVER_SUPPORT   | \
+FLASHSS_MMC_CORECFG_A_DRIVER_SUPPORT)
+
+#define ST_MMC_CCONFIG_REG_5   0x210
+#define SYSCONF_MMC1_ENABLE_BIT3
+
+#endif /* _STI_SDHCI_H_ */
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 01d1dbf..ea5ea08 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -299,6 +299,13 @@ config MMC_SDHCI_SPEAR
 
  If unsure, say N.
 
+config MMC_SDHCI_STI
+   bool "SDHCI support for STMicroelectronics SoC"
+   depends on MMC_SDHCI
+

[U-Boot] [PATCH v5 3/9] STiH410: Add STi sysreset driver

2017-02-20 Thread patrice.chotard

From: Patrice Chotard 

Signed-off-by: Patrice Chotard 
Reviewed-by: Simon Glass 
---
 drivers/sysreset/Makefile   |  1 +
 drivers/sysreset/sysreset_sti.c | 82 +
 2 files changed, 83 insertions(+)
 create mode 100644 drivers/sysreset/sysreset_sti.c

diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index 37638a8..21bcc21 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -13,5 +13,6 @@ obj-$(CONFIG_ROCKCHIP_RK3288) += sysreset_rk3288.o
 obj-$(CONFIG_ROCKCHIP_RK3399) += sysreset_rk3399.o
 obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o
 obj-$(CONFIG_ARCH_SNAPDRAGON) += sysreset_snapdragon.o
+obj-$(CONFIG_ARCH_STI) += sysreset_sti.o
 obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o
 obj-$(CONFIG_ARCH_ASPEED) += sysreset_ast.o
diff --git a/drivers/sysreset/sysreset_sti.c b/drivers/sysreset/sysreset_sti.c
new file mode 100644
index 000..9b58aa8
--- /dev/null
+++ b/drivers/sysreset/sysreset_sti.c
@@ -0,0 +1,82 @@
+/*
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct sti_sysreset_priv {
+   phys_addr_t base;
+};
+
+static int sti_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+   struct sti_sysreset_priv *priv = dev_get_priv(dev);
+
+   generic_clear_bit(0, (void __iomem *)priv->base);
+
+   return -EINPROGRESS;
+}
+
+static int sti_sysreset_probe(struct udevice *dev)
+{
+   struct sti_sysreset_priv *priv = dev_get_priv(dev);
+   struct udevice *syscon;
+   struct regmap *regmap;
+   struct fdtdec_phandle_args syscfg_phandle;
+   int ret;
+
+   /* get corresponding syscon phandle */
+   ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, dev_of_offset(dev),
+"st,syscfg", NULL, 0, 0,
+_phandle);
+   if (ret < 0) {
+   error("Can't get syscfg phandle: %d\n", ret);
+   return ret;
+   }
+
+   ret = uclass_get_device_by_of_offset(UCLASS_SYSCON,
+syscfg_phandle.node,
+);
+   if (ret) {
+   error("%s: uclass_get_device_by_of_offset failed: %d\n",
+ __func__, ret);
+   return ret;
+   }
+
+   regmap = syscon_get_regmap(syscon);
+   if (!regmap) {
+   error("unable to get regmap for %s\n", syscon->name);
+   return -ENODEV;
+   }
+
+   priv->base = regmap->base;
+
+   return 0;
+}
+
+static struct sysreset_ops sti_sysreset = {
+   .request= sti_sysreset_request,
+};
+
+static const struct udevice_id sti_sysreset_ids[] = {
+   { .compatible = "st,stih407-restart" },
+   { }
+};
+
+U_BOOT_DRIVER(sysreset_sti) = {
+   .name = "sysreset_sti",
+   .id = UCLASS_SYSRESET,
+   .ops = _sysreset,
+   .probe = sti_sysreset_probe,
+   .of_match = sti_sysreset_ids,
+   .priv_auto_alloc_size = sizeof(struct sti_sysreset_priv),
+};
-- 
1.9.1

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[U-Boot] [PATCH v5 5/9] gpio: do not include for ARCH_STI

2017-02-20 Thread patrice.chotard

From: Patrice Chotard 

As no gpio.h is defined in arch/arm/include/asm/arch-stih410,
to avoid compilation failure, do not include asm/arch/gpio.h.

This is needed for example when including sdhci.h, which include
asm/gpio.h>.

Signed-off-by: Patrice Chotard 
Reviewed-by: Simon Glass 
---
 arch/arm/include/asm/gpio.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h
index fe4419c..1c5e873 100644
--- a/arch/arm/include/asm/gpio.h
+++ b/arch/arm/include/asm/gpio.h
@@ -1,4 +1,4 @@
-#ifndef CONFIG_ARCH_UNIPHIER
+#if !defined(CONFIG_ARCH_UNIPHIER) && !defined(CONFIG_ARCH_STI)
 #include 
 #endif
 #include 
-- 
1.9.1

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[U-Boot] [PATCH v5 0/9] Add STMicroelectronics STiH410-B2260 board

2017-02-20 Thread patrice.chotard

From: Patrice Chotard 

v5: _ Add Simon Glass's reviewed-by
_ move board Kconfig description from patch 1 to 9

v4: _ fix STi serial driver to be fully DT compliant
_ remove arch/arm/include/asm/arch-stih410/sti.h and
  include/dm/platform_data/serial_sti_asc.h which became useless
_ board file cleanup
_ fix some nits in sti_sdhci.c
_ rebased on top of v2017.03-rc2

v3: _ add reviewed-by
_ add top level MAINTAINERS entry and in the board MAINTAINERS
_ use the fallback table from include/config_fallbacks.h
_ minor update in sti_sdhci.c
_ reorder patches with functionnal board and defconfig in last
_ remove arch/arm/mach-sti/cpu.c and replace it by a sysreset DM driver
_ remove arch/arm/mach-sti/timer.c by a timer DM driver
_ remove useless arch/arm/include/asm/arch-stih410/syscfg.h
_ remove useless arch/arm/include/asm/arch-stih410/gpio.h and update 
  arch/arm/include/asm/gpio.h for ARCH_STI in patch 5

v2: _ fix remarks from Jaechon Chung on SDHCI patch
_ fix remarks from Antonio Borneo on board patch
_ replace some macro by U-boot generic's one
_ add missing maintainers in recipients

Patrice Chotard (9):
  arm: Add support for STMicroelectronics STiH410 soc
  STiH410: Add STi timer driver
  STiH410: Add STi sysreset driver
  STiH410: Add STi serial driver
  gpio: do not include  for ARCH_STI
  STiH410: Add STi SDHCI driver
  STiH410: Add STi pinctrl driver
  STiH410-B2260: Add device tree
  board: Add STMicroelectronics STiH410-B2260 support
Patrice Chotard (9):
  arm: Add support for STMicroelectronics STiH410 soc
  STiH410: Add STi timer driver
  STiH410: Add STi sysreset driver
  STiH410: Add STi serial driver
  gpio: do not include  for ARCH_STI
  STiH410: Add STi SDHCI driver
  STiH410: Add STi pinctrl driver
  STiH410-B2260: Add device tree
  board: Add STMicroelectronics STiH410-B2260 support

 MAINTAINERS   |6 +
 arch/arm/Kconfig  |   13 +
 arch/arm/dts/Makefile |2 +
 arch/arm/dts/st-pincfg.h  |   71 ++
 arch/arm/dts/stih407-clock.dtsi   |  326 ++
 arch/arm/dts/stih407-family.dtsi  |  977 +++
 arch/arm/dts/stih407-pinctrl.dtsi | 1303 +
 arch/arm/dts/stih410-b2260.dts|  226 
 arch/arm/dts/stih410-clock.dtsi   |  347 ++
 arch/arm/dts/stih410-pinctrl.dtsi |   34 +
 arch/arm/dts/stih410.dtsi |  454 +++
 arch/arm/include/asm/arch-stih410/sdhci.h |   68 ++
 arch/arm/include/asm/gpio.h   |2 +-
 arch/arm/mach-sti/Kconfig |   31 +
 board/st/stih410-b2260/Kconfig|   19 +
 board/st/stih410-b2260/MAINTAINERS|7 +
 board/st/stih410-b2260/Makefile   |8 +
 board/st/stih410-b2260/board.c|   28 +
 configs/stih410-b2260_defconfig   |   26 +
 drivers/mmc/Kconfig   |7 +
 drivers/mmc/Makefile  |1 +
 drivers/mmc/sti_sdhci.c   |  141 +++
 drivers/pinctrl/Kconfig   |   10 +
 drivers/pinctrl/Makefile  |1 +
 drivers/pinctrl/pinctrl-sti.c |  320 +
 drivers/serial/Kconfig|8 +
 drivers/serial/Makefile   |1 +
 drivers/serial/serial_sti_asc.c   |  211 
 drivers/sysreset/Makefile |1 +
 drivers/sysreset/sysreset_sti.c   |   82 ++
 drivers/timer/Kconfig |7 +
 drivers/timer/Makefile|1 +
 drivers/timer/sti-timer.c |   78 ++
 include/configs/stih410-b2260.h   |   60 +
 include/dt-bindings/clock/stih407-clks.h  |   90 ++
 include/dt-bindings/clock/stih410-clks.h  |   25 +
 include/dt-bindings/interrupt-controller/irq-st.h |   30 +
 include/dt-bindings/mfd/st-lpc.h  |   16 +
 include/dt-bindings/reset/stih407-resets.h|   65 +
 39 files changed, 5102 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/st-pincfg.h
 create mode 100644 arch/arm/dts/stih407-clock.dtsi
 create mode 100644 arch/arm/dts/stih407-family.dtsi
 create mode 100644 arch/arm/dts/stih407-pinctrl.dtsi
 create mode 100644 arch/arm/dts/stih410-b2260.dts
 create mode 100644 arch/arm/dts/stih410-clock.dtsi
 create mode 100644 arch/arm/dts/stih410-pinctrl.dtsi
 create mode 100644 arch/arm/dts/stih410.dtsi
 create mode 100644 arch/arm/include/asm/arch-stih410/sdhci.h
 create mode 100644 arch/arm/mach-sti/Kconfig
 create mode 100644 board/st/stih410-b2260/Kconfig
 create mode 100644

[U-Boot] [PATCH v5 7/9] STiH410: Add STi pinctrl driver

2017-02-20 Thread patrice.chotard

From: Patrice Chotard 

Add STMicroelectronics STiH410 pinctrl driver

Signed-off-by: Patrice Chotard 
Reviewed-by: Tom Rini 
Reviewed-by: Simon Glass 
---
 drivers/pinctrl/Kconfig   |  10 ++
 drivers/pinctrl/Makefile  |   1 +
 drivers/pinctrl/pinctrl-sti.c | 320 ++
 3 files changed, 331 insertions(+)
 create mode 100644 drivers/pinctrl/pinctrl-sti.c

diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index efcb4c0..0c832e1 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -175,6 +175,16 @@ config PIC32_PINCTRL
  by a device tree node which contains both GPIO defintion and pin 
control
  functions.
 
+config PINCTRL_STI
+   bool "STMicroelectronics STi pin-control and pin-mux driver"
+   depends on DM && ARCH_STI
+   default y
+   help
+ Support pin multiplexing control on STMicrolectronics STi SoCs.
+ The driver is controlled by a device tree node which contains both
+ the GPIO definitions and pin control functions for each available 
multiplex
+ function.
+
 endif
 
 source "drivers/pinctrl/meson/Kconfig"
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 512112a..a2f8101 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -16,3 +16,4 @@ obj-$(CONFIG_PIC32_PINCTRL)   += pinctrl_pic32.o
 obj-$(CONFIG_PINCTRL_EXYNOS)   += exynos/
 obj-$(CONFIG_PINCTRL_MESON)+= meson/
 obj-$(CONFIG_PINCTRL_MVEBU)+= mvebu/
+obj-$(CONFIG_PINCTRL_STI)  += pinctrl-sti.o
diff --git a/drivers/pinctrl/pinctrl-sti.c b/drivers/pinctrl/pinctrl-sti.c
new file mode 100644
index 000..6ee7fa7
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-sti.c
@@ -0,0 +1,320 @@
+/*
+ * Pinctrl driver for STMicroelectronics STi SoCs
+ *
+ *  Copyright (c) 2017
+ *  Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define MAX_STI_PINCONF_ENTRIES7
+/* Output enable */
+#define OE (1 << 27)
+/* Pull Up */
+#define PU (1 << 26)
+/* Open Drain */
+#define OD (1 << 25)
+
+/* User-frendly defines for Pin Direction */
+   /* oe = 0, pu = 0, od = 0 */
+#define IN (0)
+   /* oe = 0, pu = 1, od = 0 */
+#define IN_PU  (PU)
+   /* oe = 1, pu = 0, od = 0 */
+#define OUT(OE)
+   /* oe = 1, pu = 1, od = 0 */
+#define OUT_PU (OE | PU)
+   /* oe = 1, pu = 0, od = 1 */
+#define BIDIR  (OE | OD)
+   /* oe = 1, pu = 1, od = 1 */
+#define BIDIR_PU   (OE | PU | OD)
+
+struct sti_pinctrl_platdata {
+   struct regmap *regmap;
+};
+
+struct sti_pin_desc {
+   unsigned char bank;
+   unsigned char pin;
+   unsigned char alt;
+   int dir;
+};
+
+/*
+ * PIO alternative Function selector
+ */
+void sti_alternate_select(struct udevice *dev, struct sti_pin_desc *pin_desc)
+{
+   struct sti_pinctrl_platdata *plat = dev_get_platdata(dev);
+   unsigned long sysconf, *sysconfreg;
+   int alt = pin_desc->alt;
+   int bank = pin_desc->bank;
+   int pin = pin_desc->pin;
+
+   sysconfreg = (unsigned long *)plat->regmap->base;
+
+   switch (bank) {
+   case 0 ... 5:   /* in "SBC Bank" */
+   sysconfreg += bank;
+   break;
+   case 10 ... 20: /* in "FRONT Bank" */
+   sysconfreg += bank - 10;
+   break;
+   case 30 ... 35: /* in "REAR Bank" */
+   sysconfreg += bank - 30;
+   break;
+   case 40 ... 42: /* in "FLASH Bank" */
+   sysconfreg += bank - 40;
+   break;
+   default:
+   BUG();
+   return;
+   }
+
+   sysconf = readl(sysconfreg);
+   bitfield_replace(sysconf, pin * 4, 3, alt);
+   writel(sysconf, sysconfreg);
+}
+
+/* pin configuration */
+void sti_pin_configure(struct udevice *dev, struct sti_pin_desc *pin_desc)
+{
+   struct sti_pinctrl_platdata *plat = dev_get_platdata(dev);
+   int bit;
+   int oe = 0, pu = 0, od = 0;
+   unsigned long *sysconfreg;
+   int bank = pin_desc->bank;
+
+   sysconfreg = (unsigned long *)plat->regmap->base + 40;
+
+   /*
+* NOTE: The PIO configuration for the PIO pins in the
+* "FLASH Bank" are different from all the other banks!
+* Specifically, the output-enable pin control register
+* (SYS_CFG_3040) and the pull-up pin control register
+* (SYS_CFG_3050), are both classed as being "reserved".
+* Hence, we do not write to these registers to configure
+* the OE

[U-Boot] [PATCH v5 8/9] STiH410-B2260: Add device tree

2017-02-20 Thread patrice.chotard

From: Patrice Chotard 

This device tree has been extracted from v4.9 kernel

Signed-off-by: Patrice Chotard 
Reviewed-by: Tom Rini 
Reviewed-by: Simon Glass 
---
 arch/arm/dts/Makefile |2 +
 arch/arm/dts/st-pincfg.h  |   71 ++
 arch/arm/dts/stih407-clock.dtsi   |  326 ++
 arch/arm/dts/stih407-family.dtsi  |  977 +++
 arch/arm/dts/stih407-pinctrl.dtsi | 1303 +
 arch/arm/dts/stih410-b2260.dts|  226 
 arch/arm/dts/stih410-clock.dtsi   |  347 ++
 arch/arm/dts/stih410-pinctrl.dtsi |   34 +
 arch/arm/dts/stih410.dtsi |  454 +++
 drivers/mmc/Kconfig   |2 +-
 include/dt-bindings/clock/stih407-clks.h  |   90 ++
 include/dt-bindings/clock/stih410-clks.h  |   25 +
 include/dt-bindings/interrupt-controller/irq-st.h |   30 +
 include/dt-bindings/mfd/st-lpc.h  |   16 +
 include/dt-bindings/reset/stih407-resets.h|   65 +
 15 files changed, 3967 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/st-pincfg.h
 create mode 100644 arch/arm/dts/stih407-clock.dtsi
 create mode 100644 arch/arm/dts/stih407-family.dtsi
 create mode 100644 arch/arm/dts/stih407-pinctrl.dtsi
 create mode 100644 arch/arm/dts/stih410-b2260.dts
 create mode 100644 arch/arm/dts/stih410-clock.dtsi
 create mode 100644 arch/arm/dts/stih410-pinctrl.dtsi
 create mode 100644 arch/arm/dts/stih410.dtsi
 create mode 100644 include/dt-bindings/clock/stih407-clks.h
 create mode 100644 include/dt-bindings/clock/stih410-clks.h
 create mode 100644 include/dt-bindings/interrupt-controller/irq-st.h
 create mode 100644 include/dt-bindings/mfd/st-lpc.h
 create mode 100644 include/dt-bindings/reset/stih407-resets.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index eb68c20..231ebfa 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -339,6 +339,8 @@ dtb-$(CONFIG_ARCH_BCM283X) += \
 
 dtb-$(CONFIG_ARCH_ASPEED) += ast2500-evb.dtb
 
+dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb
+
 targets += $(dtb-y)
 
 # Add any required device tree compiler flags here
diff --git a/arch/arm/dts/st-pincfg.h b/arch/arm/dts/st-pincfg.h
new file mode 100644
index 000..4851c38
--- /dev/null
+++ b/arch/arm/dts/st-pincfg.h
@@ -0,0 +1,71 @@
+#ifndef _ST_PINCFG_H_
+#define _ST_PINCFG_H_
+
+/* Alternate functions */
+#define ALT1   1
+#define ALT2   2
+#define ALT3   3
+#define ALT4   4
+#define ALT5   5
+#define ALT6   6
+#define ALT7   7
+
+/* Output enable */
+#define OE (1 << 27)
+/* Pull Up */
+#define PU (1 << 26)
+/* Open Drain */
+#define OD (1 << 25)
+#define RT (1 << 23)
+#define INVERTCLK  (1 << 22)
+#define CLKNOTDATA (1 << 21)
+#define DOUBLE_EDGE(1 << 20)
+#define CLK_A  (0 << 18)
+#define CLK_B  (1 << 18)
+#define CLK_C  (2 << 18)
+#define CLK_D  (3 << 18)
+
+/* User-frendly defines for Pin Direction */
+   /* oe = 0, pu = 0, od = 0 */
+#define IN (0)
+   /* oe = 0, pu = 1, od = 0 */
+#define IN_PU  (PU)
+   /* oe = 1, pu = 0, od = 0 */
+#define OUT(OE)
+   /* oe = 1, pu = 0, od = 1 */
+#define BIDIR  (OE | OD)
+   /* oe = 1, pu = 1, od = 1 */
+#define BIDIR_PU   (OE | PU | OD)
+
+/* RETIME_TYPE */
+/*
+ * B Mode
+ * Bypass retime with optional delay parameter
+ */
+#define BYPASS (0)
+/*
+ * R0, R1, R0D, R1D modes
+ * single-edge data non inverted clock, retime data with clk
+ */
+#define SE_NICLK_IO(RT)
+/*
+ * RIV0, RIV1, RIV0D, RIV1D modes
+ * single-edge data inverted clock, retime data with clk
+ */
+#define SE_ICLK_IO (RT | INVERTCLK)
+/*
+ * R0E, R1E, R0ED, R1ED modes
+ * double-edge data, retime data with clk
+ */
+#define DE_IO  (RT | DOUBLE_EDGE)
+/*
+ * CIV0, CIV1 modes with inverted clock
+ * Retiming the clk pins will park clock & reduce the noise within the core.
+ */
+#define ICLK   (RT | CLKNOTDATA | INVERTCLK)
+/*
+ * CLK0, CLK1 modes with non-inverted clock
+ * Retiming the clk pins will park clock & reduce the noise within the core.
+ */
+#define NICLK  (RT | CLKNOTDATA)
+#endif /* _ST_PINCFG_H_ */
diff --git a/arch/arm/dts/stih407-clock.dtsi b/arch/arm/dts/stih407-clock.dtsi
new file mode 100644
index 000..13029c0
--- /dev/null
+++ b/arch/arm/dts/stih407-clock.dtsi
@@ -0,0 +1,326 @@
+/*
+ * Copyright (C) 2014 STMicroelectronics R Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as

[U-Boot] [PATCH v5 4/9] STiH410: Add STi serial driver

2017-02-20 Thread patrice.chotard

From: Patrice Chotard 

This patch adds support to ASC (asynchronous serial controller)
driver, which is basically a standard serial driver. This IP
is common across other STMicroelectronics SoCs

Signed-off-by: Patrice Chotard 
Reviewed-by: Simon Glass 
---
 arch/arm/Kconfig|   2 +
 drivers/serial/Kconfig  |   8 ++
 drivers/serial/Makefile |   1 +
 drivers/serial/serial_sti_asc.c | 211 
 4 files changed, 222 insertions(+)
 create mode 100644 drivers/serial/serial_sti_asc.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 4aa5eb9..b91a5b7 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -985,6 +985,8 @@ config STM32
 config ARCH_STI
bool "Support STMicrolectronics SoCs"
select CPU_V7
+   select DM
+   select DM_SERIAL
help
  Support for STMicroelectronics STiH407/10 SoC family.
  This SoC is used on Linaro 96Board STiH410-B2260
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index b11f3ff..7cb0eaa 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -413,4 +413,12 @@ config PXA_SERIAL
  If you have a machine based on a Marvell XScale PXA2xx CPU you
  can enable its onboard serial ports by enabling this option.
 
+config STI_ASC_SERIAL
+   bool "STMicroelectronics on-chip UART"
+   depends on DM_SERIAL && ARCH_STI
+   help
+ Select this to enable Asynchronous Serial Controller available
+ on STiH410 SoC. This is a basic implementation,  it supports
+ following baudrate 9600, 19200, 38400, 57600 and 115200.
+
 endmenu
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 8430668..84a22ce 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -41,6 +41,7 @@ obj-$(CONFIG_FSL_LINFLEXUART) += serial_linflexuart.o
 obj-$(CONFIG_ARC_SERIAL) += serial_arc.o
 obj-$(CONFIG_UNIPHIER_SERIAL) += serial_uniphier.o
 obj-$(CONFIG_STM32_SERIAL) += serial_stm32.o
+obj-$(CONFIG_STI_ASC_SERIAL) += serial_sti_asc.o
 obj-$(CONFIG_PIC32_SERIAL) += serial_pic32.o
 obj-$(CONFIG_STM32X7_SERIAL) += serial_stm32x7.o
 obj-$(CONFIG_BCM283X_MU_SERIAL) += serial_bcm283x_mu.o
diff --git a/drivers/serial/serial_sti_asc.c b/drivers/serial/serial_sti_asc.c
new file mode 100644
index 000..ce26c94
--- /dev/null
+++ b/drivers/serial/serial_sti_asc.c
@@ -0,0 +1,211 @@
+/*
+ * Support for Serial I/O using STMicroelectronics' on-chip ASC.
+ *
+ *  Copyright (c) 2017
+ *  Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define BAUDMODE   0x1000
+#define RXENABLE   0x0100
+#define RUN0x0080
+#define MODE   0x0001
+#define MODE_8BIT  0x0001
+#define STOP_1BIT  0x0008
+#define PARITYODD  0x0020
+
+#define STA_TF BIT(9)
+#define STA_RBFBIT(0)
+
+struct sti_asc_uart {
+   u32 baudrate;
+   u32 txbuf;
+   u32 rxbuf;
+   u32 control;
+   u32 inten;
+   u32 status;
+   u32 guardtime;
+   u32 timeout;
+   u32 txreset;
+   u32 rxreset;
+};
+
+struct sti_asc_serial {
+   /* address of registers in physical memory */
+   struct sti_asc_uart *regs;
+};
+
+/* Values for the BAUDRATE Register */
+#define PCLK   (200ul * 100ul)
+#define BAUDRATE_VAL_M0(bps)   (PCLK / (16 * (bps)))
+#define BAUDRATE_VAL_M1(bps)   ((bps * (1 << 14)) + (1<<13)) / (PCLK/(1 << 6))
+
+/*
+ * MODE 0
+ *   ICCLK
+ * ASCBaudRate =   
+ *   baudrate * 16
+ *
+ * MODE 1
+ *   baudrate * 16 * 2^16
+ * ASCBaudRate =   
+ *  ICCLK
+ *
+ * NOTE:
+ * Mode 1 should be used for baudrates of 19200, and above, as it
+ * has a lower deviation error than Mode 0 for higher frequencies.
+ * Mode 0 should be used for all baudrates below 19200.
+ */
+
+static int sti_asc_pending(struct udevice *dev, bool input)
+{
+   struct sti_asc_serial *priv = dev_get_priv(dev);
+   struct sti_asc_uart *const uart = priv->regs;
+   unsigned long status;
+
+   status = readl(>status);
+   if (input)
+   return status & STA_RBF;
+   else
+   return status & STA_TF;
+}
+
+static int _sti_asc_serial_setbrg(struct sti_asc_uart *uart, int baudrate)
+{
+   unsigned long val;
+   int t, mode = 1;
+
+   switch (baudrate) {
+   case 9600:
+   t = BAUDRATE_VAL_M0(9600);
+   mode = 0;
+   break;
+   case 19200:
+   t = BAUDRATE_VAL_M1(19200);
+   break;
+   case 38400:
+   t = BAUDRATE_VAL_M1(38400);
+   break;
+   case 57600:
+   t = BAUDRATE_VAL_M1(57600);
+

[U-Boot] [PATCH v5 1/9] arm: Add support for STMicroelectronics STiH410 soc

2017-02-20 Thread patrice.chotard

From: Patrice Chotard 

The STiH410 is an advanced multi-HD AVC processor with 3D
graphics acceleration and 1.5-GHz ARM Cortex-A9 SMP CPU
part of the STiH407 family.

It has wide connectivity including USB 3.0, PCI-e, SATA
and gigabit ethernet.

Signed-off-by: Patrice Chotard 
---

v5:  _ migrate board description from patch 1 to 9

 MAINTAINERS   | 6 ++
 arch/arm/Kconfig  | 9 +
 arch/arm/mach-sti/Kconfig | 6 ++
 3 files changed, 21 insertions(+)
 create mode 100644 arch/arm/mach-sti/Kconfig

diff --git a/MAINTAINERS b/MAINTAINERS
index eaa2c3b..19c0eed 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -165,6 +165,12 @@ S: Maintained
 F: arch/arm/cpu/armv7/stv0991/
 F: arch/arm/include/asm/arch-stv0991/
 
+ARM STI
+M: Patrice Chotard 
+S: Maintained
+F: arch/arm/mach-sti/
+F: arch/arm/include/asm/arch-sti*/
+
 ARM SUNXI
 M: Jagan Teki 
 M: Maxime Ripard 
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 0229800..4aa5eb9 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -982,6 +982,13 @@ config STM32
select DM
select DM_SERIAL
 
+config ARCH_STI
+   bool "Support STMicrolectronics SoCs"
+   select CPU_V7
+   help
+ Support for STMicroelectronics STiH407/10 SoC family.
+ This SoC is used on Linaro 96Board STiH410-B2260
+
 config ARCH_ROCKCHIP
bool "Support Rockchip SoCs"
select OF_CONTROL
@@ -1060,6 +1067,8 @@ source "arch/arm/mach-snapdragon/Kconfig"
 
 source "arch/arm/mach-socfpga/Kconfig"
 
+source "arch/arm/mach-sti/Kconfig"
+
 source "arch/arm/mach-stm32/Kconfig"
 
 source "arch/arm/mach-tegra/Kconfig"
diff --git a/arch/arm/mach-sti/Kconfig b/arch/arm/mach-sti/Kconfig
new file mode 100644
index 000..87c04b2
--- /dev/null
+++ b/arch/arm/mach-sti/Kconfig
@@ -0,0 +1,6 @@
+if ARCH_STI
+
+config SYS_SOC
+   default "stih410"
+
+endif
-- 
1.9.1

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[U-Boot] [PATCH v5 2/9] STiH410: Add STi timer driver

2017-02-20 Thread patrice.chotard

From: Patrice Chotard 

Add ARM global timer based timer

Signed-off-by: Patrice Chotard 
Reviewed-by: Simon Glass 
---
 drivers/timer/Kconfig |  7 +
 drivers/timer/Makefile|  1 +
 drivers/timer/sti-timer.c | 78 +++
 3 files changed, 86 insertions(+)
 create mode 100644 drivers/timer/sti-timer.c

diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig
index cd38a6d..72c1416 100644
--- a/drivers/timer/Kconfig
+++ b/drivers/timer/Kconfig
@@ -58,4 +58,11 @@ config AST_TIMER
  This is mostly because they all share several registers which
  makes it difficult to completely separate them.
 
+config STI_TIMER
+   bool "STi timer support"
+   depends on TIMER
+   default y if ARCH_STI
+   help
+ Select this to enable a timer for STi devices.
+
 endmenu
diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile
index a4b1a48..ae94be8 100644
--- a/drivers/timer/Makefile
+++ b/drivers/timer/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_SANDBOX_TIMER)   += sandbox_timer.o
 obj-$(CONFIG_X86_TSC_TIMER)+= tsc_timer.o
 obj-$(CONFIG_OMAP_TIMER)   += omap-timer.o
 obj-$(CONFIG_AST_TIMER)+= ast_timer.o
+obj-$(CONFIG_STI_TIMER)+= sti-timer.o
diff --git a/drivers/timer/sti-timer.c b/drivers/timer/sti-timer.c
new file mode 100644
index 000..e1419c4
--- /dev/null
+++ b/drivers/timer/sti-timer.c
@@ -0,0 +1,78 @@
+/*
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct sti_timer_priv {
+   struct globaltimer *global_timer;
+};
+
+static int sti_timer_get_count(struct udevice *dev, u64 *count)
+{
+   struct sti_timer_priv *priv = dev_get_priv(dev);
+   struct globaltimer *global_timer = priv->global_timer;
+   u32 low, high;
+   u64 timer;
+   u32 old = readl(_timer->cnt_h);
+
+   while (1) {
+   low = readl(_timer->cnt_l);
+   high = readl(_timer->cnt_h);
+   if (old == high)
+   break;
+   else
+   old = high;
+   }
+   timer = high;
+   *count = (u64)((timer << 32) | low);
+
+   return 0;
+}
+
+static int sti_timer_probe(struct udevice *dev)
+{
+   struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+   struct sti_timer_priv *priv = dev_get_priv(dev);
+   fdt_addr_t addr;
+
+   uc_priv->clock_rate = CONFIG_SYS_HZ_CLOCK;
+
+   /* get arm global timer base address */
+   addr = fdtdec_get_addr(gd->fdt_blob, dev_of_offset(dev), "reg");
+   priv->global_timer = (struct globaltimer *)addr;
+
+   /* init timer */
+   writel(0x01, >global_timer->ctl);
+
+   return 0;
+}
+
+static const struct timer_ops sti_timer_ops = {
+   .get_count = sti_timer_get_count,
+};
+
+static const struct udevice_id sti_timer_ids[] = {
+   { .compatible = "arm,cortex-a9-global-timer" },
+   {}
+};
+
+U_BOOT_DRIVER(sti_timer) = {
+   .name = "sti_timer",
+   .id = UCLASS_TIMER,
+   .of_match = sti_timer_ids,
+   .priv_auto_alloc_size = sizeof(struct sti_timer_priv),
+   .probe = sti_timer_probe,
+   .ops = _timer_ops,
+   .flags = DM_FLAG_PRE_RELOC,
+};
-- 
1.9.1

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[U-Boot] [PATCH v3 8/9] STiH410-B2260: Add device tree

2017-02-10 Thread patrice.chotard

From: Patrice Chotard 

This device tree has been extracted from v4.9 kernel

Signed-off-by: Patrice Chotard 
Reviewed-by: Tom Rini 
---
 arch/arm/dts/Makefile |2 +
 arch/arm/dts/st-pincfg.h  |   71 ++
 arch/arm/dts/stih407-clock.dtsi   |  326 ++
 arch/arm/dts/stih407-family.dtsi  |  977 +++
 arch/arm/dts/stih407-pinctrl.dtsi | 1303 +
 arch/arm/dts/stih410-b2260.dts|  225 
 arch/arm/dts/stih410-clock.dtsi   |  347 ++
 arch/arm/dts/stih410-pinctrl.dtsi |   34 +
 arch/arm/dts/stih410.dtsi |  454 +++
 drivers/mmc/Kconfig   |2 +-
 include/dt-bindings/clock/stih407-clks.h  |   90 ++
 include/dt-bindings/clock/stih410-clks.h  |   25 +
 include/dt-bindings/interrupt-controller/irq-st.h |   30 +
 include/dt-bindings/mfd/st-lpc.h  |   16 +
 include/dt-bindings/reset/stih407-resets.h|   65 +
 15 files changed, 3966 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/st-pincfg.h
 create mode 100644 arch/arm/dts/stih407-clock.dtsi
 create mode 100644 arch/arm/dts/stih407-family.dtsi
 create mode 100644 arch/arm/dts/stih407-pinctrl.dtsi
 create mode 100644 arch/arm/dts/stih410-b2260.dts
 create mode 100644 arch/arm/dts/stih410-clock.dtsi
 create mode 100644 arch/arm/dts/stih410-pinctrl.dtsi
 create mode 100644 arch/arm/dts/stih410.dtsi
 create mode 100644 include/dt-bindings/clock/stih407-clks.h
 create mode 100644 include/dt-bindings/clock/stih410-clks.h
 create mode 100644 include/dt-bindings/interrupt-controller/irq-st.h
 create mode 100644 include/dt-bindings/mfd/st-lpc.h
 create mode 100644 include/dt-bindings/reset/stih407-resets.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 2d75f64..63a44fc 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -339,6 +339,8 @@ dtb-$(CONFIG_ARCH_BCM283X) += \
 
 dtb-$(CONFIG_ARCH_ASPEED) += ast2500-evb.dtb
 
+dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb
+
 targets += $(dtb-y)
 
 # Add any required device tree compiler flags here
diff --git a/arch/arm/dts/st-pincfg.h b/arch/arm/dts/st-pincfg.h
new file mode 100644
index 000..4851c38
--- /dev/null
+++ b/arch/arm/dts/st-pincfg.h
@@ -0,0 +1,71 @@
+#ifndef _ST_PINCFG_H_
+#define _ST_PINCFG_H_
+
+/* Alternate functions */
+#define ALT1   1
+#define ALT2   2
+#define ALT3   3
+#define ALT4   4
+#define ALT5   5
+#define ALT6   6
+#define ALT7   7
+
+/* Output enable */
+#define OE (1 << 27)
+/* Pull Up */
+#define PU (1 << 26)
+/* Open Drain */
+#define OD (1 << 25)
+#define RT (1 << 23)
+#define INVERTCLK  (1 << 22)
+#define CLKNOTDATA (1 << 21)
+#define DOUBLE_EDGE(1 << 20)
+#define CLK_A  (0 << 18)
+#define CLK_B  (1 << 18)
+#define CLK_C  (2 << 18)
+#define CLK_D  (3 << 18)
+
+/* User-frendly defines for Pin Direction */
+   /* oe = 0, pu = 0, od = 0 */
+#define IN (0)
+   /* oe = 0, pu = 1, od = 0 */
+#define IN_PU  (PU)
+   /* oe = 1, pu = 0, od = 0 */
+#define OUT(OE)
+   /* oe = 1, pu = 0, od = 1 */
+#define BIDIR  (OE | OD)
+   /* oe = 1, pu = 1, od = 1 */
+#define BIDIR_PU   (OE | PU | OD)
+
+/* RETIME_TYPE */
+/*
+ * B Mode
+ * Bypass retime with optional delay parameter
+ */
+#define BYPASS (0)
+/*
+ * R0, R1, R0D, R1D modes
+ * single-edge data non inverted clock, retime data with clk
+ */
+#define SE_NICLK_IO(RT)
+/*
+ * RIV0, RIV1, RIV0D, RIV1D modes
+ * single-edge data inverted clock, retime data with clk
+ */
+#define SE_ICLK_IO (RT | INVERTCLK)
+/*
+ * R0E, R1E, R0ED, R1ED modes
+ * double-edge data, retime data with clk
+ */
+#define DE_IO  (RT | DOUBLE_EDGE)
+/*
+ * CIV0, CIV1 modes with inverted clock
+ * Retiming the clk pins will park clock & reduce the noise within the core.
+ */
+#define ICLK   (RT | CLKNOTDATA | INVERTCLK)
+/*
+ * CLK0, CLK1 modes with non-inverted clock
+ * Retiming the clk pins will park clock & reduce the noise within the core.
+ */
+#define NICLK  (RT | CLKNOTDATA)
+#endif /* _ST_PINCFG_H_ */
diff --git a/arch/arm/dts/stih407-clock.dtsi b/arch/arm/dts/stih407-clock.dtsi
new file mode 100644
index 000..13029c0
--- /dev/null
+++ b/arch/arm/dts/stih407-clock.dtsi
@@ -0,0 +1,326 @@
+/*
+ * Copyright (C) 2014 STMicroelectronics R Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software

[U-Boot] [PATCH v4 0/9] Add STMicroelectronics STiH410-B2260 board

2017-02-14 Thread patrice.chotard

From: Patrice Chotard 

v4: _ fix STi serial driver to be fully DT compliant
_ remove arch/arm/include/asm/arch-stih410/sti.h and
  include/dm/platform_data/serial_sti_asc.h which became useless
_ board file cleanup
_ fix some nits in sti_sdhci.c
_ rebased on top of v2017.03-rc2

v3: _ add reviewed-by
_ add top level MAINTAINERS entry and in the board MAINTAINERS
_ use the fallback table from include/config_fallbacks.h
_ minor update in sti_sdhci.c
_ reorder patches with functionnal board and defconfig in last
_ remove arch/arm/mach-sti/cpu.c and replace it by a sysreset DM driver
_ remove arch/arm/mach-sti/timer.c by a timer DM driver
_ remove useless arch/arm/include/asm/arch-stih410/syscfg.h
_ remove useless arch/arm/include/asm/arch-stih410/gpio.h and update 
  arch/arm/include/asm/gpio.h for ARCH_STI in patch 5

v2: _ fix remarks from Jaechon Chung on SDHCI patch
_ fix remarks from Antonio Borneo on board patch
_ replace some macro by U-boot generic's one
_ add missing maintainers in recipients

Patrice Chotard (9):
  arm: Add support for STMicroelectronics STiH410 soc
  STiH410: Add STi timer driver
  STiH410: Add STi sysreset driver
  STiH410: Add STi serial driver
  gpio: do not include  for ARCH_STI
  STiH410: Add STi SDHCI driver
  STiH410: Add STi pinctrl driver
  STiH410-B2260: Add device tree
  board: Add STMicroelectronics STiH410-B2260 support

 MAINTAINERS   |6 +
 arch/arm/Kconfig  |   13 +
 arch/arm/dts/Makefile |2 +
 arch/arm/dts/st-pincfg.h  |   71 ++
 arch/arm/dts/stih407-clock.dtsi   |  326 ++
 arch/arm/dts/stih407-family.dtsi  |  977 +++
 arch/arm/dts/stih407-pinctrl.dtsi | 1303 +
 arch/arm/dts/stih410-b2260.dts|  226 
 arch/arm/dts/stih410-clock.dtsi   |  347 ++
 arch/arm/dts/stih410-pinctrl.dtsi |   34 +
 arch/arm/dts/stih410.dtsi |  454 +++
 arch/arm/include/asm/arch-stih410/sdhci.h |   68 ++
 arch/arm/include/asm/gpio.h   |2 +-
 arch/arm/mach-sti/Kconfig |   31 +
 board/st/stih410-b2260/Kconfig|   19 +
 board/st/stih410-b2260/MAINTAINERS|7 +
 board/st/stih410-b2260/Makefile   |8 +
 board/st/stih410-b2260/board.c|   28 +
 configs/stih410-b2260_defconfig   |   26 +
 drivers/mmc/Kconfig   |7 +
 drivers/mmc/Makefile  |1 +
 drivers/mmc/sti_sdhci.c   |  141 +++
 drivers/pinctrl/Kconfig   |   10 +
 drivers/pinctrl/Makefile  |1 +
 drivers/pinctrl/pinctrl-sti.c |  320 +
 drivers/serial/Kconfig|8 +
 drivers/serial/Makefile   |1 +
 drivers/serial/serial_sti_asc.c   |  211 
 drivers/sysreset/Makefile |1 +
 drivers/sysreset/sysreset_sti.c   |   82 ++
 drivers/timer/Kconfig |7 +
 drivers/timer/Makefile|1 +
 drivers/timer/sti-timer.c |   78 ++
 include/configs/stih410-b2260.h   |   60 +
 include/dt-bindings/clock/stih407-clks.h  |   90 ++
 include/dt-bindings/clock/stih410-clks.h  |   25 +
 include/dt-bindings/interrupt-controller/irq-st.h |   30 +
 include/dt-bindings/mfd/st-lpc.h  |   16 +
 include/dt-bindings/reset/stih407-resets.h|   65 +
 39 files changed, 5102 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/st-pincfg.h
 create mode 100644 arch/arm/dts/stih407-clock.dtsi
 create mode 100644 arch/arm/dts/stih407-family.dtsi
 create mode 100644 arch/arm/dts/stih407-pinctrl.dtsi
 create mode 100644 arch/arm/dts/stih410-b2260.dts
 create mode 100644 arch/arm/dts/stih410-clock.dtsi
 create mode 100644 arch/arm/dts/stih410-pinctrl.dtsi
 create mode 100644 arch/arm/dts/stih410.dtsi
 create mode 100644 arch/arm/include/asm/arch-stih410/sdhci.h
 create mode 100644 arch/arm/mach-sti/Kconfig
 create mode 100644 board/st/stih410-b2260/Kconfig
 create mode 100644 board/st/stih410-b2260/MAINTAINERS
 create mode 100644 board/st/stih410-b2260/Makefile
 create mode 100644 board/st/stih410-b2260/board.c
 create mode 100644 configs/stih410-b2260_defconfig
 create mode 100644 drivers/mmc/sti_sdhci.c
 create mode 100644 drivers/pinctrl/pinctrl-sti.c
 create mode 100644 drivers/serial/serial_sti_asc.c
 create mode 100644 drivers/sysreset/sysreset_sti.c
 create mode 100644 drivers/timer/sti-timer.c
 create mode 100644

[U-Boot] [PATCH v4 5/9] gpio: do not include for ARCH_STI

2017-02-14 Thread patrice.chotard

From: Patrice Chotard 

As no gpio.h is defined in arch/arm/include/asm/arch-stih410,
to avoid compilation failure, do not include asm/arch/gpio.h.

This is needed for example when including sdhci.h, which include
asm/gpio.h>.

Signed-off-by: Patrice Chotard 
---
 arch/arm/include/asm/gpio.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h
index fe4419c..1c5e873 100644
--- a/arch/arm/include/asm/gpio.h
+++ b/arch/arm/include/asm/gpio.h
@@ -1,4 +1,4 @@
-#ifndef CONFIG_ARCH_UNIPHIER
+#if !defined(CONFIG_ARCH_UNIPHIER) && !defined(CONFIG_ARCH_STI)
 #include 
 #endif
 #include 
-- 
1.9.1

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[U-Boot] [PATCH v4 2/9] STiH410: Add STi timer driver

2017-02-14 Thread patrice.chotard

From: Patrice Chotard 

Add ARM global timer based timer

Signed-off-by: Patrice Chotard 
---

v3 : _ convert previous arch/arm/mach-sti/timer.c into STi timer driver 


 drivers/timer/Kconfig |  7 +
 drivers/timer/Makefile|  1 +
 drivers/timer/sti-timer.c | 78 +++
 3 files changed, 86 insertions(+)
 create mode 100644 drivers/timer/sti-timer.c

diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig
index cd38a6d..72c1416 100644
--- a/drivers/timer/Kconfig
+++ b/drivers/timer/Kconfig
@@ -58,4 +58,11 @@ config AST_TIMER
  This is mostly because they all share several registers which
  makes it difficult to completely separate them.
 
+config STI_TIMER
+   bool "STi timer support"
+   depends on TIMER
+   default y if ARCH_STI
+   help
+ Select this to enable a timer for STi devices.
+
 endmenu
diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile
index a4b1a48..ae94be8 100644
--- a/drivers/timer/Makefile
+++ b/drivers/timer/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_SANDBOX_TIMER)   += sandbox_timer.o
 obj-$(CONFIG_X86_TSC_TIMER)+= tsc_timer.o
 obj-$(CONFIG_OMAP_TIMER)   += omap-timer.o
 obj-$(CONFIG_AST_TIMER)+= ast_timer.o
+obj-$(CONFIG_STI_TIMER)+= sti-timer.o
diff --git a/drivers/timer/sti-timer.c b/drivers/timer/sti-timer.c
new file mode 100644
index 000..e1419c4
--- /dev/null
+++ b/drivers/timer/sti-timer.c
@@ -0,0 +1,78 @@
+/*
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct sti_timer_priv {
+   struct globaltimer *global_timer;
+};
+
+static int sti_timer_get_count(struct udevice *dev, u64 *count)
+{
+   struct sti_timer_priv *priv = dev_get_priv(dev);
+   struct globaltimer *global_timer = priv->global_timer;
+   u32 low, high;
+   u64 timer;
+   u32 old = readl(_timer->cnt_h);
+
+   while (1) {
+   low = readl(_timer->cnt_l);
+   high = readl(_timer->cnt_h);
+   if (old == high)
+   break;
+   else
+   old = high;
+   }
+   timer = high;
+   *count = (u64)((timer << 32) | low);
+
+   return 0;
+}
+
+static int sti_timer_probe(struct udevice *dev)
+{
+   struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+   struct sti_timer_priv *priv = dev_get_priv(dev);
+   fdt_addr_t addr;
+
+   uc_priv->clock_rate = CONFIG_SYS_HZ_CLOCK;
+
+   /* get arm global timer base address */
+   addr = fdtdec_get_addr(gd->fdt_blob, dev_of_offset(dev), "reg");
+   priv->global_timer = (struct globaltimer *)addr;
+
+   /* init timer */
+   writel(0x01, >global_timer->ctl);
+
+   return 0;
+}
+
+static const struct timer_ops sti_timer_ops = {
+   .get_count = sti_timer_get_count,
+};
+
+static const struct udevice_id sti_timer_ids[] = {
+   { .compatible = "arm,cortex-a9-global-timer" },
+   {}
+};
+
+U_BOOT_DRIVER(sti_timer) = {
+   .name = "sti_timer",
+   .id = UCLASS_TIMER,
+   .of_match = sti_timer_ids,
+   .priv_auto_alloc_size = sizeof(struct sti_timer_priv),
+   .probe = sti_timer_probe,
+   .ops = _timer_ops,
+   .flags = DM_FLAG_PRE_RELOC,
+};
-- 
1.9.1

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[U-Boot] [PATCH v4 7/9] STiH410: Add STi pinctrl driver

2017-02-14 Thread patrice.chotard

From: Patrice Chotard 

Add STMicroelectronics STiH410 pinctrl driver

Signed-off-by: Patrice Chotard 
Reviewed-by: Tom Rini 
---
 drivers/pinctrl/Kconfig   |  10 ++
 drivers/pinctrl/Makefile  |   1 +
 drivers/pinctrl/pinctrl-sti.c | 320 ++
 3 files changed, 331 insertions(+)
 create mode 100644 drivers/pinctrl/pinctrl-sti.c

diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index efcb4c0..0c832e1 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -175,6 +175,16 @@ config PIC32_PINCTRL
  by a device tree node which contains both GPIO defintion and pin 
control
  functions.
 
+config PINCTRL_STI
+   bool "STMicroelectronics STi pin-control and pin-mux driver"
+   depends on DM && ARCH_STI
+   default y
+   help
+ Support pin multiplexing control on STMicrolectronics STi SoCs.
+ The driver is controlled by a device tree node which contains both
+ the GPIO definitions and pin control functions for each available 
multiplex
+ function.
+
 endif
 
 source "drivers/pinctrl/meson/Kconfig"
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 512112a..a2f8101 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -16,3 +16,4 @@ obj-$(CONFIG_PIC32_PINCTRL)   += pinctrl_pic32.o
 obj-$(CONFIG_PINCTRL_EXYNOS)   += exynos/
 obj-$(CONFIG_PINCTRL_MESON)+= meson/
 obj-$(CONFIG_PINCTRL_MVEBU)+= mvebu/
+obj-$(CONFIG_PINCTRL_STI)  += pinctrl-sti.o
diff --git a/drivers/pinctrl/pinctrl-sti.c b/drivers/pinctrl/pinctrl-sti.c
new file mode 100644
index 000..6ee7fa7
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-sti.c
@@ -0,0 +1,320 @@
+/*
+ * Pinctrl driver for STMicroelectronics STi SoCs
+ *
+ *  Copyright (c) 2017
+ *  Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define MAX_STI_PINCONF_ENTRIES7
+/* Output enable */
+#define OE (1 << 27)
+/* Pull Up */
+#define PU (1 << 26)
+/* Open Drain */
+#define OD (1 << 25)
+
+/* User-frendly defines for Pin Direction */
+   /* oe = 0, pu = 0, od = 0 */
+#define IN (0)
+   /* oe = 0, pu = 1, od = 0 */
+#define IN_PU  (PU)
+   /* oe = 1, pu = 0, od = 0 */
+#define OUT(OE)
+   /* oe = 1, pu = 1, od = 0 */
+#define OUT_PU (OE | PU)
+   /* oe = 1, pu = 0, od = 1 */
+#define BIDIR  (OE | OD)
+   /* oe = 1, pu = 1, od = 1 */
+#define BIDIR_PU   (OE | PU | OD)
+
+struct sti_pinctrl_platdata {
+   struct regmap *regmap;
+};
+
+struct sti_pin_desc {
+   unsigned char bank;
+   unsigned char pin;
+   unsigned char alt;
+   int dir;
+};
+
+/*
+ * PIO alternative Function selector
+ */
+void sti_alternate_select(struct udevice *dev, struct sti_pin_desc *pin_desc)
+{
+   struct sti_pinctrl_platdata *plat = dev_get_platdata(dev);
+   unsigned long sysconf, *sysconfreg;
+   int alt = pin_desc->alt;
+   int bank = pin_desc->bank;
+   int pin = pin_desc->pin;
+
+   sysconfreg = (unsigned long *)plat->regmap->base;
+
+   switch (bank) {
+   case 0 ... 5:   /* in "SBC Bank" */
+   sysconfreg += bank;
+   break;
+   case 10 ... 20: /* in "FRONT Bank" */
+   sysconfreg += bank - 10;
+   break;
+   case 30 ... 35: /* in "REAR Bank" */
+   sysconfreg += bank - 30;
+   break;
+   case 40 ... 42: /* in "FLASH Bank" */
+   sysconfreg += bank - 40;
+   break;
+   default:
+   BUG();
+   return;
+   }
+
+   sysconf = readl(sysconfreg);
+   bitfield_replace(sysconf, pin * 4, 3, alt);
+   writel(sysconf, sysconfreg);
+}
+
+/* pin configuration */
+void sti_pin_configure(struct udevice *dev, struct sti_pin_desc *pin_desc)
+{
+   struct sti_pinctrl_platdata *plat = dev_get_platdata(dev);
+   int bit;
+   int oe = 0, pu = 0, od = 0;
+   unsigned long *sysconfreg;
+   int bank = pin_desc->bank;
+
+   sysconfreg = (unsigned long *)plat->regmap->base + 40;
+
+   /*
+* NOTE: The PIO configuration for the PIO pins in the
+* "FLASH Bank" are different from all the other banks!
+* Specifically, the output-enable pin control register
+* (SYS_CFG_3040) and the pull-up pin control register
+* (SYS_CFG_3050), are both classed as being "reserved".
+* Hence, we do not write to these registers to configure
+* the OE and PU features for PIOs in this bank.

[U-Boot] [PATCH v4 9/9] board: Add STMicroelectronics STiH410-B2260 support

2017-02-14 Thread patrice.chotard

From: Patrice Chotard 

This is a 96Board compliant board based on STiH410 SoC:
  - 1GB DDR
  - On-Board USB combo WiFi/Bluetooth RTL8723BU
with PCB soldered antenna
  - Ethernet 1000-BaseT
  - SATA
  - HDMI
  - 2 x USB2.0 type A
  - 1 x USB2.0 type micro-AB
  - SD card slot
  - High speed connector (SD/I2C/USB interfaces)
  - Low speed connector (UART/I2C/GPIO/SPI/PCM interfaces)

Signed-off-by: Patrice Chotard 
Reviewed-by: Tom Rini 
---

v4: _ board.c cleanup, remove serial useless platdata

v3: _ add entry in board MAINTAINERS
_ remove useless arch/arm/include/asm/arch-stih410/syscfg.h
_ remove useless arch/arm/include/asm/arch-stih410/gpio.h


 arch/arm/mach-sti/Kconfig  |  2 ++
 board/st/stih410-b2260/Kconfig | 19 
 board/st/stih410-b2260/MAINTAINERS |  7 +
 board/st/stih410-b2260/Makefile|  8 +
 board/st/stih410-b2260/board.c | 28 ++
 configs/stih410-b2260_defconfig| 26 +
 include/configs/stih410-b2260.h| 60 ++
 7 files changed, 150 insertions(+)
 create mode 100644 board/st/stih410-b2260/Kconfig
 create mode 100644 board/st/stih410-b2260/MAINTAINERS
 create mode 100644 board/st/stih410-b2260/Makefile
 create mode 100644 board/st/stih410-b2260/board.c
 create mode 100644 configs/stih410-b2260_defconfig
 create mode 100644 include/configs/stih410-b2260.h

diff --git a/arch/arm/mach-sti/Kconfig b/arch/arm/mach-sti/Kconfig
index 6c65d86..67a3b24 100644
--- a/arch/arm/mach-sti/Kconfig
+++ b/arch/arm/mach-sti/Kconfig
@@ -26,4 +26,6 @@ config TARGET_STIH410_B2260
 
 endchoice
 
+source "board/st/stih410-b2260/Kconfig"
+
 endif
diff --git a/board/st/stih410-b2260/Kconfig b/board/st/stih410-b2260/Kconfig
new file mode 100644
index 000..590add0
--- /dev/null
+++ b/board/st/stih410-b2260/Kconfig
@@ -0,0 +1,19 @@
+if TARGET_STIH410_B2260
+
+config SYS_BOARD
+   string
+   default "stih410-b2260"
+
+config SYS_VENDOR
+   string
+   default "st"
+
+config SYS_SOC
+   string
+   default "stih410"
+
+config SYS_CONFIG_NAME
+   string
+   default "stih410-b2260"
+
+endif
diff --git a/board/st/stih410-b2260/MAINTAINERS 
b/board/st/stih410-b2260/MAINTAINERS
new file mode 100644
index 000..4f557ac
--- /dev/null
+++ b/board/st/stih410-b2260/MAINTAINERS
@@ -0,0 +1,7 @@
+STIH410-B2260 BOARD
+M: Patrice Chotard 
+S: Maintained
+F: board/st/stih410-b2260/
+F: include/configs/stih410-b2260.h
+F: configs/stih410-b2260_defconfig
+F: arch/arm/dts/stih*
diff --git a/board/st/stih410-b2260/Makefile b/board/st/stih410-b2260/Makefile
new file mode 100644
index 000..68a7903
--- /dev/null
+++ b/board/st/stih410-b2260/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2017
+# Patrice Chotard, 
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y  = board.o
diff --git a/board/st/stih410-b2260/board.c b/board/st/stih410-b2260/board.c
new file mode 100644
index 000..0c06bca
--- /dev/null
+++ b/board/st/stih410-b2260/board.c
@@ -0,0 +1,28 @@
+/*
+ * Board init file for STiH410-B2260
+ *
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+   gd->ram_size = PHYS_SDRAM_1_SIZE;
+   return 0;
+}
+
+void dram_init_banksize(void)
+{
+   gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+   gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+}
+
+int board_init(void)
+{
+   return 0;
+}
diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig
new file mode 100644
index 000..4e6942f
--- /dev/null
+++ b/configs/stih410-b2260_defconfig
@@ -0,0 +1,26 @@
+CONFIG_ARM=y
+CONFIG_ARCH_STI=y
+CONFIG_IDENT_STRING="STMicroelectronics STiH410-B2260"
+CONFIG_DEFAULT_DEVICE_TREE="stih410-b2260"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SYS_PROMPT="stih410-b2260 => "
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_OF_CONTROL=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_STI=y
+CONFIG_PINCTRL=y
+CONFIG_STI_ASC_SERIAL=y
+CONFIG_SYSRESET=y
+CONFIG_TIMER=y
+CONFIG_SPL_OF_LIBFDT=y
diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h
new file mode 100644
index 000..28e2f7f
--- /dev/null
+++ b/include/configs/stih410-b2260.h
@@ -0,0 +1,60 @@
+/*
+ * (C) Copyright 2017
+ * Patrice Chotard, 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include 
+
+/* ram memory-related information */
+#define CONFIG_NR_DRAM_BANKS   1
+#define PHYS_SDRAM_1   0x4000
+#define CONFIG_SYS_SDRAM_BASE

[U-Boot] [PATCH v4 8/9] STiH410-B2260: Add device tree

2017-02-14 Thread patrice.chotard

From: Patrice Chotard 

This device tree has been extracted from v4.9 kernel

Signed-off-by: Patrice Chotard 
Reviewed-by: Tom Rini 
---

v4 : _ Add mising "stdout-path" property in arch/arm/dts/stih410-b2260.dts
   which allow serial driver to be probed

 arch/arm/dts/Makefile |2 +
 arch/arm/dts/st-pincfg.h  |   71 ++
 arch/arm/dts/stih407-clock.dtsi   |  326 ++
 arch/arm/dts/stih407-family.dtsi  |  977 +++
 arch/arm/dts/stih407-pinctrl.dtsi | 1303 +
 arch/arm/dts/stih410-b2260.dts|  226 
 arch/arm/dts/stih410-clock.dtsi   |  347 ++
 arch/arm/dts/stih410-pinctrl.dtsi |   34 +
 arch/arm/dts/stih410.dtsi |  454 +++
 drivers/mmc/Kconfig   |2 +-
 include/dt-bindings/clock/stih407-clks.h  |   90 ++
 include/dt-bindings/clock/stih410-clks.h  |   25 +
 include/dt-bindings/interrupt-controller/irq-st.h |   30 +
 include/dt-bindings/mfd/st-lpc.h  |   16 +
 include/dt-bindings/reset/stih407-resets.h|   65 +
 15 files changed, 3967 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/st-pincfg.h
 create mode 100644 arch/arm/dts/stih407-clock.dtsi
 create mode 100644 arch/arm/dts/stih407-family.dtsi
 create mode 100644 arch/arm/dts/stih407-pinctrl.dtsi
 create mode 100644 arch/arm/dts/stih410-b2260.dts
 create mode 100644 arch/arm/dts/stih410-clock.dtsi
 create mode 100644 arch/arm/dts/stih410-pinctrl.dtsi
 create mode 100644 arch/arm/dts/stih410.dtsi
 create mode 100644 include/dt-bindings/clock/stih407-clks.h
 create mode 100644 include/dt-bindings/clock/stih410-clks.h
 create mode 100644 include/dt-bindings/interrupt-controller/irq-st.h
 create mode 100644 include/dt-bindings/mfd/st-lpc.h
 create mode 100644 include/dt-bindings/reset/stih407-resets.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index eb68c20..231ebfa 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -339,6 +339,8 @@ dtb-$(CONFIG_ARCH_BCM283X) += \
 
 dtb-$(CONFIG_ARCH_ASPEED) += ast2500-evb.dtb
 
+dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb
+
 targets += $(dtb-y)
 
 # Add any required device tree compiler flags here
diff --git a/arch/arm/dts/st-pincfg.h b/arch/arm/dts/st-pincfg.h
new file mode 100644
index 000..4851c38
--- /dev/null
+++ b/arch/arm/dts/st-pincfg.h
@@ -0,0 +1,71 @@
+#ifndef _ST_PINCFG_H_
+#define _ST_PINCFG_H_
+
+/* Alternate functions */
+#define ALT1   1
+#define ALT2   2
+#define ALT3   3
+#define ALT4   4
+#define ALT5   5
+#define ALT6   6
+#define ALT7   7
+
+/* Output enable */
+#define OE (1 << 27)
+/* Pull Up */
+#define PU (1 << 26)
+/* Open Drain */
+#define OD (1 << 25)
+#define RT (1 << 23)
+#define INVERTCLK  (1 << 22)
+#define CLKNOTDATA (1 << 21)
+#define DOUBLE_EDGE(1 << 20)
+#define CLK_A  (0 << 18)
+#define CLK_B  (1 << 18)
+#define CLK_C  (2 << 18)
+#define CLK_D  (3 << 18)
+
+/* User-frendly defines for Pin Direction */
+   /* oe = 0, pu = 0, od = 0 */
+#define IN (0)
+   /* oe = 0, pu = 1, od = 0 */
+#define IN_PU  (PU)
+   /* oe = 1, pu = 0, od = 0 */
+#define OUT(OE)
+   /* oe = 1, pu = 0, od = 1 */
+#define BIDIR  (OE | OD)
+   /* oe = 1, pu = 1, od = 1 */
+#define BIDIR_PU   (OE | PU | OD)
+
+/* RETIME_TYPE */
+/*
+ * B Mode
+ * Bypass retime with optional delay parameter
+ */
+#define BYPASS (0)
+/*
+ * R0, R1, R0D, R1D modes
+ * single-edge data non inverted clock, retime data with clk
+ */
+#define SE_NICLK_IO(RT)
+/*
+ * RIV0, RIV1, RIV0D, RIV1D modes
+ * single-edge data inverted clock, retime data with clk
+ */
+#define SE_ICLK_IO (RT | INVERTCLK)
+/*
+ * R0E, R1E, R0ED, R1ED modes
+ * double-edge data, retime data with clk
+ */
+#define DE_IO  (RT | DOUBLE_EDGE)
+/*
+ * CIV0, CIV1 modes with inverted clock
+ * Retiming the clk pins will park clock & reduce the noise within the core.
+ */
+#define ICLK   (RT | CLKNOTDATA | INVERTCLK)
+/*
+ * CLK0, CLK1 modes with non-inverted clock
+ * Retiming the clk pins will park clock & reduce the noise within the core.
+ */
+#define NICLK  (RT | CLKNOTDATA)
+#endif /* _ST_PINCFG_H_ */
diff --git a/arch/arm/dts/stih407-clock.dtsi b/arch/arm/dts/stih407-clock.dtsi
new file mode 100644
index 000..13029c0
--- /dev/null
+++ b/arch/arm/dts/stih407-clock.dtsi
@@ -0,0 +1,326 @@
+/*
+ * Copyright (C) 2014 STMicroelectronics R Limited
+ *
+ * This program is free software; you can redistribute it

[U-Boot] [PATCH v4 6/9] STiH410: Add STi SDHCI driver

2017-02-14 Thread patrice.chotard

From: Patrice Chotard 

Add SDHCI host controller found on STMicroelectronics SoCs

On some ST SoCs, i.e. STiH407/STiH410, the MMC devices can live
inside a dedicated flashSS sub-system that provides an extend subset
of registers that can be used to configure the Arasan MMC/SD Host
Controller.

This means, that the SDHCI Arasan Controller can be configured to be
eMMC4.5 or 4.3 spec compliant.

W/o these settings the SDHCI will configure and use the MMC/SD
controller with limited features e.g. PIO mode, no DMA, no HS etc.

Signed-off-by: Patrice Chotard 
Reviewed-by: Simon Glass 
Reviewed-by: Jaehoon Chung 
---

v4: _ fix Simon's minor remarks

v3: _ fix Jaechoon's remarks

 arch/arm/Kconfig  |   2 +
 arch/arm/include/asm/arch-stih410/sdhci.h |  68 ++
 drivers/mmc/Kconfig   |   7 ++
 drivers/mmc/Makefile  |   1 +
 drivers/mmc/sti_sdhci.c   | 141 ++
 5 files changed, 219 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-stih410/sdhci.h
 create mode 100644 drivers/mmc/sti_sdhci.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b91a5b7..477f36b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -987,6 +987,8 @@ config ARCH_STI
select CPU_V7
select DM
select DM_SERIAL
+   select BLK
+   select DM_MMC
help
  Support for STMicroelectronics STiH407/10 SoC family.
  This SoC is used on Linaro 96Board STiH410-B2260
diff --git a/arch/arm/include/asm/arch-stih410/sdhci.h 
b/arch/arm/include/asm/arch-stih410/sdhci.h
new file mode 100644
index 000..8cd77fc
--- /dev/null
+++ b/arch/arm/include/asm/arch-stih410/sdhci.h
@@ -0,0 +1,68 @@
+/*
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __STI_SDHCI_H__
+#define __STI_SDHCI_H__
+
+#define FLASHSS_MMC_CORE_CONFIG_1  0x400
+#define FLASHSS_MMC_CORECFG_TIMEOUT_CLK_UNIT_MHZ   BIT(24)
+#define FLASHSS_MMC_CORECFG_TIMEOUT_CLK_FREQ_MIN   BIT(12)
+
+#define STI_FLASHSS_MMC_CORE_CONFIG_1  \
+   (FLASHSS_MMC_CORECFG_TIMEOUT_CLK_UNIT_MHZ   | \
+FLASHSS_MMC_CORECFG_TIMEOUT_CLK_FREQ_MIN)
+
+#define FLASHSS_MMC_CORE_CONFIG_2  0x404
+#define FLASHSS_MMC_CORECFG_HIGH_SPEED BIT(28)
+#define FLASHSS_MMC_CORECFG_8BIT_EMMC  BIT(20)
+#define MAX_BLK_LENGTH_1024BIT(16)
+#define BASE_CLK_FREQ_200  0xc8
+
+#define STI_FLASHSS_MMC_CORE_CONFIG2   \
+   (FLASHSS_MMC_CORECFG_HIGH_SPEED | \
+FLASHSS_MMC_CORECFG_8BIT_EMMC  | \
+MAX_BLK_LENGTH_1024| \
+BASE_CLK_FREQ_200 << 0)
+
+#define STI_FLASHSS_SDCARD_CORE_CONFIG2\
+   (FLASHSS_MMC_CORECFG_HIGH_SPEED | \
+MAX_BLK_LENGTH_1024| \
+BASE_CLK_FREQ_200)
+
+#define FLASHSS_MMC_CORE_CONFIG_3  0x408
+#define FLASHSS_MMC_CORECFG_SLOT_TYPE_EMMC BIT(28)
+#define FLASHSS_MMC_CORECFG_ASYNCH_INTR_SUPPORTBIT(20)
+#define FLASHSS_MMC_CORECFG_3P3_VOLT   BIT(8)
+#define FLASHSS_MMC_CORECFG_SUSP_RES_SUPPORT   BIT(4)
+#define FLASHSS_MMC_CORECFG_SDMA   BIT(0)
+
+#define STI_FLASHSS_MMC_CORE_CONFIG3   \
+(FLASHSS_MMC_CORECFG_SLOT_TYPE_EMMC| \
+FLASHSS_MMC_CORECFG_ASYNCH_INTR_SUPPORT| \
+FLASHSS_MMC_CORECFG_3P3_VOLT   | \
+FLASHSS_MMC_CORECFG_SUSP_RES_SUPPORT   | \
+FLASHSS_MMC_CORECFG_SDMA)
+
+#define STI_FLASHSS_SDCARD_CORE_CONFIG3\
+(FLASHSS_MMC_CORECFG_ASYNCH_INTR_SUPPORT   | \
+FLASHSS_MMC_CORECFG_3P3_VOLT   | \
+FLASHSS_MMC_CORECFG_SUSP_RES_SUPPORT   | \
+FLASHSS_MMC_CORECFG_SDMA)
+
+#define FLASHSS_MMC_CORE_CONFIG_4  0x40c
+#define FLASHSS_MMC_CORECFG_D_DRIVER_SUPPORT   BIT(20)
+#define FLASHSS_MMC_CORECFG_C_DRIVER_SUPPORT   BIT(16)
+#define FLASHSS_MMC_CORECFG_A_DRIVER_SUPPORT   BIT(12)
+
+#define STI_FLASHSS_MMC_CORE_CONFIG4   \
+   (FLASHSS_MMC_CORECFG_D_DRIVER_SUPPORT   | \
+FLASHSS_MMC_CORECFG_C_DRIVER_SUPPORT   | \
+FLASHSS_MMC_CORECFG_A_DRIVER_SUPPORT)
+
+#define ST_MMC_CCONFIG_REG_5   0x210
+#define SYSCONF_MMC1_ENABLE_BIT3
+
+#endif /* _STI_SDHCI_H_ */
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 01d1dbf..ea5ea08 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -299,6 +299,13 @@ config MMC_SDHCI_SPEAR
 
  If unsure, say N.
 
+config MMC_SDHCI_STI
+   bool "SDHCI support

[U-Boot] [PATCH v4 1/9] arm: Add support for STMicroelectronics STiH410 soc

2017-02-14 Thread patrice.chotard

From: Patrice Chotard 

The STiH410 is an advanced multi-HD AVC processor with 3D
graphics acceleration and 1.5-GHz ARM Cortex-A9 SMP CPU
part of the STiH407 family.

It has wide connectivity including USB 3.0, PCI-e, SATA
and gigabit ethernet.

Signed-off-by: Patrice Chotard 
---

v3: _ add top level MAINTAINERS entry

 MAINTAINERS   |  6 ++
 arch/arm/Kconfig  |  9 +
 arch/arm/mach-sti/Kconfig | 29 +
 3 files changed, 44 insertions(+)
 create mode 100644 arch/arm/mach-sti/Kconfig

diff --git a/MAINTAINERS b/MAINTAINERS
index eaa2c3b..19c0eed 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -165,6 +165,12 @@ S: Maintained
 F: arch/arm/cpu/armv7/stv0991/
 F: arch/arm/include/asm/arch-stv0991/
 
+ARM STI
+M: Patrice Chotard 
+S: Maintained
+F: arch/arm/mach-sti/
+F: arch/arm/include/asm/arch-sti*/
+
 ARM SUNXI
 M: Jagan Teki 
 M: Maxime Ripard 
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 0229800..4aa5eb9 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -982,6 +982,13 @@ config STM32
select DM
select DM_SERIAL
 
+config ARCH_STI
+   bool "Support STMicrolectronics SoCs"
+   select CPU_V7
+   help
+ Support for STMicroelectronics STiH407/10 SoC family.
+ This SoC is used on Linaro 96Board STiH410-B2260
+
 config ARCH_ROCKCHIP
bool "Support Rockchip SoCs"
select OF_CONTROL
@@ -1060,6 +1067,8 @@ source "arch/arm/mach-snapdragon/Kconfig"
 
 source "arch/arm/mach-socfpga/Kconfig"
 
+source "arch/arm/mach-sti/Kconfig"
+
 source "arch/arm/mach-stm32/Kconfig"
 
 source "arch/arm/mach-tegra/Kconfig"
diff --git a/arch/arm/mach-sti/Kconfig b/arch/arm/mach-sti/Kconfig
new file mode 100644
index 000..6c65d86
--- /dev/null
+++ b/arch/arm/mach-sti/Kconfig
@@ -0,0 +1,29 @@
+if ARCH_STI
+
+config SYS_SOC
+   default "stih410"
+
+choice
+   prompt "STiH410 board select"
+
+config TARGET_STIH410_B2260
+   bool "96Boards STiH410-B2260"
+   help
+ Support for 96Board STiH410-B2260 based on STMicrolectronics
+ STiH410 soc. This board complies with 96Board Open Platform
+ Specifications. Features:
+ - 1GB DDR
+ - On-Board USB combo WiFi/Bluetooth RTL8723BU
+   with PCB soldered antenna
+ - Ethernet 1000-BaseT
+ - Sata
+ - HDMI
+ - 2 x USB2 type A
+ - micro USB2 type AB
+ - SD card slot
+ - High speed connector (SD/I2C/USB interfaces)
+ - Slow speed connector (UART/I2C/GPIO/SPI/PCM interfaces)
+
+endchoice
+
+endif
-- 
1.9.1

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[U-Boot] [PATCH v4 4/9] STiH410: Add STi serial driver

2017-02-14 Thread patrice.chotard

From: Patrice Chotard 

This patch adds support to ASC (asynchronous serial controller)
driver, which is basically a standard serial driver. This IP
is common across other STMicroelectronics SoCs

Signed-off-by: Patrice Chotard 
---

v4: _ fix STi serial driver to be fully DT compliant
_ remove useless code already supported by serial uclass
_ remove useless arch/arm/include/asm/arch-stih410/sti.h

v3: _ use the fallback table from include/config_fallbacks.h


 arch/arm/Kconfig|   2 +
 drivers/serial/Kconfig  |   8 ++
 drivers/serial/Makefile |   1 +
 drivers/serial/serial_sti_asc.c | 211 
 4 files changed, 222 insertions(+)
 create mode 100644 drivers/serial/serial_sti_asc.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 4aa5eb9..b91a5b7 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -985,6 +985,8 @@ config STM32
 config ARCH_STI
bool "Support STMicrolectronics SoCs"
select CPU_V7
+   select DM
+   select DM_SERIAL
help
  Support for STMicroelectronics STiH407/10 SoC family.
  This SoC is used on Linaro 96Board STiH410-B2260
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index b11f3ff..7cb0eaa 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -413,4 +413,12 @@ config PXA_SERIAL
  If you have a machine based on a Marvell XScale PXA2xx CPU you
  can enable its onboard serial ports by enabling this option.
 
+config STI_ASC_SERIAL
+   bool "STMicroelectronics on-chip UART"
+   depends on DM_SERIAL && ARCH_STI
+   help
+ Select this to enable Asynchronous Serial Controller available
+ on STiH410 SoC. This is a basic implementation,  it supports
+ following baudrate 9600, 19200, 38400, 57600 and 115200.
+
 endmenu
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 8430668..84a22ce 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -41,6 +41,7 @@ obj-$(CONFIG_FSL_LINFLEXUART) += serial_linflexuart.o
 obj-$(CONFIG_ARC_SERIAL) += serial_arc.o
 obj-$(CONFIG_UNIPHIER_SERIAL) += serial_uniphier.o
 obj-$(CONFIG_STM32_SERIAL) += serial_stm32.o
+obj-$(CONFIG_STI_ASC_SERIAL) += serial_sti_asc.o
 obj-$(CONFIG_PIC32_SERIAL) += serial_pic32.o
 obj-$(CONFIG_STM32X7_SERIAL) += serial_stm32x7.o
 obj-$(CONFIG_BCM283X_MU_SERIAL) += serial_bcm283x_mu.o
diff --git a/drivers/serial/serial_sti_asc.c b/drivers/serial/serial_sti_asc.c
new file mode 100644
index 000..ce26c94
--- /dev/null
+++ b/drivers/serial/serial_sti_asc.c
@@ -0,0 +1,211 @@
+/*
+ * Support for Serial I/O using STMicroelectronics' on-chip ASC.
+ *
+ *  Copyright (c) 2017
+ *  Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define BAUDMODE   0x1000
+#define RXENABLE   0x0100
+#define RUN0x0080
+#define MODE   0x0001
+#define MODE_8BIT  0x0001
+#define STOP_1BIT  0x0008
+#define PARITYODD  0x0020
+
+#define STA_TF BIT(9)
+#define STA_RBFBIT(0)
+
+struct sti_asc_uart {
+   u32 baudrate;
+   u32 txbuf;
+   u32 rxbuf;
+   u32 control;
+   u32 inten;
+   u32 status;
+   u32 guardtime;
+   u32 timeout;
+   u32 txreset;
+   u32 rxreset;
+};
+
+struct sti_asc_serial {
+   /* address of registers in physical memory */
+   struct sti_asc_uart *regs;
+};
+
+/* Values for the BAUDRATE Register */
+#define PCLK   (200ul * 100ul)
+#define BAUDRATE_VAL_M0(bps)   (PCLK / (16 * (bps)))
+#define BAUDRATE_VAL_M1(bps)   ((bps * (1 << 14)) + (1<<13)) / (PCLK/(1 << 6))
+
+/*
+ * MODE 0
+ *   ICCLK
+ * ASCBaudRate =   
+ *   baudrate * 16
+ *
+ * MODE 1
+ *   baudrate * 16 * 2^16
+ * ASCBaudRate =   
+ *  ICCLK
+ *
+ * NOTE:
+ * Mode 1 should be used for baudrates of 19200, and above, as it
+ * has a lower deviation error than Mode 0 for higher frequencies.
+ * Mode 0 should be used for all baudrates below 19200.
+ */
+
+static int sti_asc_pending(struct udevice *dev, bool input)
+{
+   struct sti_asc_serial *priv = dev_get_priv(dev);
+   struct sti_asc_uart *const uart = priv->regs;
+   unsigned long status;
+
+   status = readl(>status);
+   if (input)
+   return status & STA_RBF;
+   else
+   return status & STA_TF;
+}
+
+static int _sti_asc_serial_setbrg(struct sti_asc_uart *uart, int baudrate)
+{
+   unsigned long val;
+   int t, mode = 1;
+
+   switch (baudrate) {
+   case 9600:
+   t = BAUDRATE_VAL_M0(9600);
+   mode = 0;
+   break;
+   case 19200:
+   t =

[U-Boot] [PATCH v4 3/9] STiH410: Add STi sysreset driver

2017-02-14 Thread patrice.chotard

From: Patrice Chotard 

Signed-off-by: Patrice Chotard 
Reviewed-by: Simon Glass 
---

v3 : _ convert previous arch/arm/mach-sti/cpu.c into STi sysreset driver 


 drivers/sysreset/Makefile   |  1 +
 drivers/sysreset/sysreset_sti.c | 82 +
 2 files changed, 83 insertions(+)
 create mode 100644 drivers/sysreset/sysreset_sti.c

diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index 37638a8..21bcc21 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -13,5 +13,6 @@ obj-$(CONFIG_ROCKCHIP_RK3288) += sysreset_rk3288.o
 obj-$(CONFIG_ROCKCHIP_RK3399) += sysreset_rk3399.o
 obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o
 obj-$(CONFIG_ARCH_SNAPDRAGON) += sysreset_snapdragon.o
+obj-$(CONFIG_ARCH_STI) += sysreset_sti.o
 obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o
 obj-$(CONFIG_ARCH_ASPEED) += sysreset_ast.o
diff --git a/drivers/sysreset/sysreset_sti.c b/drivers/sysreset/sysreset_sti.c
new file mode 100644
index 000..9b58aa8
--- /dev/null
+++ b/drivers/sysreset/sysreset_sti.c
@@ -0,0 +1,82 @@
+/*
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct sti_sysreset_priv {
+   phys_addr_t base;
+};
+
+static int sti_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+   struct sti_sysreset_priv *priv = dev_get_priv(dev);
+
+   generic_clear_bit(0, (void __iomem *)priv->base);
+
+   return -EINPROGRESS;
+}
+
+static int sti_sysreset_probe(struct udevice *dev)
+{
+   struct sti_sysreset_priv *priv = dev_get_priv(dev);
+   struct udevice *syscon;
+   struct regmap *regmap;
+   struct fdtdec_phandle_args syscfg_phandle;
+   int ret;
+
+   /* get corresponding syscon phandle */
+   ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, dev_of_offset(dev),
+"st,syscfg", NULL, 0, 0,
+_phandle);
+   if (ret < 0) {
+   error("Can't get syscfg phandle: %d\n", ret);
+   return ret;
+   }
+
+   ret = uclass_get_device_by_of_offset(UCLASS_SYSCON,
+syscfg_phandle.node,
+);
+   if (ret) {
+   error("%s: uclass_get_device_by_of_offset failed: %d\n",
+ __func__, ret);
+   return ret;
+   }
+
+   regmap = syscon_get_regmap(syscon);
+   if (!regmap) {
+   error("unable to get regmap for %s\n", syscon->name);
+   return -ENODEV;
+   }
+
+   priv->base = regmap->base;
+
+   return 0;
+}
+
+static struct sysreset_ops sti_sysreset = {
+   .request= sti_sysreset_request,
+};
+
+static const struct udevice_id sti_sysreset_ids[] = {
+   { .compatible = "st,stih407-restart" },
+   { }
+};
+
+U_BOOT_DRIVER(sysreset_sti) = {
+   .name = "sysreset_sti",
+   .id = UCLASS_SYSRESET,
+   .ops = _sysreset,
+   .probe = sti_sysreset_probe,
+   .of_match = sti_sysreset_ids,
+   .priv_auto_alloc_size = sizeof(struct sti_sysreset_priv),
+};
-- 
1.9.1

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[U-Boot] [PATCH v3 9/9] board: Add STMicroelectronics STiH410-B2260 support

2017-02-10 Thread patrice.chotard

From: Patrice Chotard 

This is a 96Board compliant board based on STiH410 SoC:
  - 1GB DDR
  - On-Board USB combo WiFi/Bluetooth RTL8723BU
with PCB soldered antenna
  - Ethernet 1000-BaseT
  - SATA
  - HDMI
  - 2 x USB2.0 type A
  - 1 x USB2.0 type micro-AB
  - SD card slot
  - High speed connector (SD/I2C/USB interfaces)
  - Low speed connector (UART/I2C/GPIO/SPI/PCM interfaces)

Signed-off-by: Patrice Chotard 
Reviewed-by: Tom Rini 
---
 arch/arm/mach-sti/Kconfig  |  2 ++
 board/st/stih410-b2260/Kconfig | 19 
 board/st/stih410-b2260/MAINTAINERS |  7 +
 board/st/stih410-b2260/Makefile|  8 +
 board/st/stih410-b2260/board.c | 40 +
 configs/stih410-b2260_defconfig| 26 
 include/configs/stih410-b2260.h| 61 ++
 7 files changed, 163 insertions(+)
 create mode 100644 board/st/stih410-b2260/Kconfig
 create mode 100644 board/st/stih410-b2260/MAINTAINERS
 create mode 100644 board/st/stih410-b2260/Makefile
 create mode 100644 board/st/stih410-b2260/board.c
 create mode 100644 configs/stih410-b2260_defconfig
 create mode 100644 include/configs/stih410-b2260.h

diff --git a/arch/arm/mach-sti/Kconfig b/arch/arm/mach-sti/Kconfig
index 6c65d86..67a3b24 100644
--- a/arch/arm/mach-sti/Kconfig
+++ b/arch/arm/mach-sti/Kconfig
@@ -26,4 +26,6 @@ config TARGET_STIH410_B2260
 
 endchoice
 
+source "board/st/stih410-b2260/Kconfig"
+
 endif
diff --git a/board/st/stih410-b2260/Kconfig b/board/st/stih410-b2260/Kconfig
new file mode 100644
index 000..590add0
--- /dev/null
+++ b/board/st/stih410-b2260/Kconfig
@@ -0,0 +1,19 @@
+if TARGET_STIH410_B2260
+
+config SYS_BOARD
+   string
+   default "stih410-b2260"
+
+config SYS_VENDOR
+   string
+   default "st"
+
+config SYS_SOC
+   string
+   default "stih410"
+
+config SYS_CONFIG_NAME
+   string
+   default "stih410-b2260"
+
+endif
diff --git a/board/st/stih410-b2260/MAINTAINERS 
b/board/st/stih410-b2260/MAINTAINERS
new file mode 100644
index 000..4f557ac
--- /dev/null
+++ b/board/st/stih410-b2260/MAINTAINERS
@@ -0,0 +1,7 @@
+STIH410-B2260 BOARD
+M: Patrice Chotard 
+S: Maintained
+F: board/st/stih410-b2260/
+F: include/configs/stih410-b2260.h
+F: configs/stih410-b2260_defconfig
+F: arch/arm/dts/stih*
diff --git a/board/st/stih410-b2260/Makefile b/board/st/stih410-b2260/Makefile
new file mode 100644
index 000..68a7903
--- /dev/null
+++ b/board/st/stih410-b2260/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2017
+# Patrice Chotard, 
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y  = board.o
diff --git a/board/st/stih410-b2260/board.c b/board/st/stih410-b2260/board.c
new file mode 100644
index 000..b2cfa7f
--- /dev/null
+++ b/board/st/stih410-b2260/board.c
@@ -0,0 +1,40 @@
+/*
+ * Board init file for STiH410-B2260
+ *
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+   gd->ram_size = PHYS_SDRAM_1_SIZE;
+   return 0;
+}
+
+void dram_init_banksize(void)
+{
+   gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+   gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+}
+
+int board_init(void)
+{
+   return 0;
+}
+
+static const struct sti_asc_serial_platdata serial_platdata = {
+   .base = (struct sti_asc_uart *)STIH410_ASC1_BASE,
+};
+
+U_BOOT_DEVICE(sti_asc) = {
+   .name = "serial_sti_asc",
+   .platdata = _platdata,
+};
diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig
new file mode 100644
index 000..4e6942f
--- /dev/null
+++ b/configs/stih410-b2260_defconfig
@@ -0,0 +1,26 @@
+CONFIG_ARM=y
+CONFIG_ARCH_STI=y
+CONFIG_IDENT_STRING="STMicroelectronics STiH410-B2260"
+CONFIG_DEFAULT_DEVICE_TREE="stih410-b2260"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SYS_PROMPT="stih410-b2260 => "
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_OF_CONTROL=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_STI=y
+CONFIG_PINCTRL=y
+CONFIG_STI_ASC_SERIAL=y
+CONFIG_SYSRESET=y
+CONFIG_TIMER=y
+CONFIG_SPL_OF_LIBFDT=y
diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h
new file mode 100644
index 000..b7f9abb
--- /dev/null
+++ b/include/configs/stih410-b2260.h
@@ -0,0 +1,61 @@
+/*
+ * (C) Copyright 2017
+ * Patrice Chotard, 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include 
+
+/* ram memory-related information */
+#define CONFIG_NR_DRAM_BANKS   1
+#define PHYS_SDRAM_1

[U-Boot] [PATCH v3 1/9] arm: Add support for STMicroelectronics STiH410 soc

2017-02-10 Thread patrice.chotard

From: Patrice Chotard 

The STiH410 is an advanced multi-HD AVC processor with 3D
graphics acceleration and 1.5-GHz ARM Cortex-A9 SMP CPU
part of the STiH407 family.

It has wide connectivity including USB 3.0, PCI-e, SATA
and gigabit ethernet.

Signed-off-by: Patrice Chotard 
---
 MAINTAINERS   |  6 ++
 arch/arm/Kconfig  |  9 +
 arch/arm/mach-sti/Kconfig | 29 +
 3 files changed, 44 insertions(+)
 create mode 100644 arch/arm/mach-sti/Kconfig

diff --git a/MAINTAINERS b/MAINTAINERS
index eaa2c3b..19c0eed 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -165,6 +165,12 @@ S: Maintained
 F: arch/arm/cpu/armv7/stv0991/
 F: arch/arm/include/asm/arch-stv0991/
 
+ARM STI
+M: Patrice Chotard 
+S: Maintained
+F: arch/arm/mach-sti/
+F: arch/arm/include/asm/arch-sti*/
+
 ARM SUNXI
 M: Jagan Teki 
 M: Maxime Ripard 
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 0229800..4aa5eb9 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -982,6 +982,13 @@ config STM32
select DM
select DM_SERIAL
 
+config ARCH_STI
+   bool "Support STMicrolectronics SoCs"
+   select CPU_V7
+   help
+ Support for STMicroelectronics STiH407/10 SoC family.
+ This SoC is used on Linaro 96Board STiH410-B2260
+
 config ARCH_ROCKCHIP
bool "Support Rockchip SoCs"
select OF_CONTROL
@@ -1060,6 +1067,8 @@ source "arch/arm/mach-snapdragon/Kconfig"
 
 source "arch/arm/mach-socfpga/Kconfig"
 
+source "arch/arm/mach-sti/Kconfig"
+
 source "arch/arm/mach-stm32/Kconfig"
 
 source "arch/arm/mach-tegra/Kconfig"
diff --git a/arch/arm/mach-sti/Kconfig b/arch/arm/mach-sti/Kconfig
new file mode 100644
index 000..6c65d86
--- /dev/null
+++ b/arch/arm/mach-sti/Kconfig
@@ -0,0 +1,29 @@
+if ARCH_STI
+
+config SYS_SOC
+   default "stih410"
+
+choice
+   prompt "STiH410 board select"
+
+config TARGET_STIH410_B2260
+   bool "96Boards STiH410-B2260"
+   help
+ Support for 96Board STiH410-B2260 based on STMicrolectronics
+ STiH410 soc. This board complies with 96Board Open Platform
+ Specifications. Features:
+ - 1GB DDR
+ - On-Board USB combo WiFi/Bluetooth RTL8723BU
+   with PCB soldered antenna
+ - Ethernet 1000-BaseT
+ - Sata
+ - HDMI
+ - 2 x USB2 type A
+ - micro USB2 type AB
+ - SD card slot
+ - High speed connector (SD/I2C/USB interfaces)
+ - Slow speed connector (UART/I2C/GPIO/SPI/PCM interfaces)
+
+endchoice
+
+endif
-- 
1.9.1

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[U-Boot] [PATCH v3 0/9] Add STMicroelectronics STiH410-B2260 board support

2017-02-10 Thread patrice.chotard

From: Patrice Chotard 

v3: _ add reviewed-by
_ add top level MAINTAINERS entry and in the board MAINTAINERS
_ use the fallback table from include/config_fallbacks.h
_ minor update in sti_sdhci.c
_ reorder patches with functionnal board and defconfig in last
_ remove arch/arm/mach-sti/cpu.c and replace it by a sysreset DM driver
_ remove arch/arm/mach-sti/timer.c by a timer DM driver
_ remove useless arch/arm/include/asm/arch-stih410/syscfg.h
_ remove useless arch/arm/include/asm/arch-stih410/gpio.h and update 
  arch/arm/include/asm/gpio.h for ARCH_STI in patch 5

v2: _ fix remarks from Jaechon Chung on SDHCI patch
_ fix remarks from Antonio Borneo on board patch
_ replace some macro by U-boot generic's one
_ add missing maintainers in recipients

Patrice Chotard (9):
  arm: Add support for STMicroelectronics STiH410 soc
  STiH410: Add STi timer driver
  STiH410: Add STi sysreset driver
  STiH410: Add STi serial driver
  gpio: do not include  for ARCH_STI
  STiH410: Add STi SDHCI driver
  STiH410: Add STi pinctrl driver
  STiH410-B2260: Add device tree
  board: Add STMicroelectronics STiH410-B2260 support

 MAINTAINERS   |6 +
 arch/arm/Kconfig  |   13 +
 arch/arm/dts/Makefile |2 +
 arch/arm/dts/st-pincfg.h  |   71 ++
 arch/arm/dts/stih407-clock.dtsi   |  326 ++
 arch/arm/dts/stih407-family.dtsi  |  977 +++
 arch/arm/dts/stih407-pinctrl.dtsi | 1303 +
 arch/arm/dts/stih410-b2260.dts|  225 
 arch/arm/dts/stih410-clock.dtsi   |  347 ++
 arch/arm/dts/stih410-pinctrl.dtsi |   34 +
 arch/arm/dts/stih410.dtsi |  454 +++
 arch/arm/include/asm/arch-stih410/sdhci.h |   68 ++
 arch/arm/include/asm/arch-stih410/sti.h   |   16 +
 arch/arm/include/asm/gpio.h   |2 +-
 arch/arm/mach-sti/Kconfig |   31 +
 board/st/stih410-b2260/Kconfig|   19 +
 board/st/stih410-b2260/MAINTAINERS|7 +
 board/st/stih410-b2260/Makefile   |8 +
 board/st/stih410-b2260/board.c|   40 +
 configs/stih410-b2260_defconfig   |   26 +
 drivers/mmc/Kconfig   |7 +
 drivers/mmc/Makefile  |1 +
 drivers/mmc/sti_sdhci.c   |  143 +++
 drivers/pinctrl/Kconfig   |   10 +
 drivers/pinctrl/Makefile  |1 +
 drivers/pinctrl/pinctrl-sti.c |  320 +
 drivers/serial/Kconfig|7 +
 drivers/serial/Makefile   |1 +
 drivers/serial/serial_sti_asc.c   |  218 
 drivers/sysreset/Makefile |1 +
 drivers/sysreset/sysreset_sti.c   |   82 ++
 drivers/timer/Kconfig |7 +
 drivers/timer/Makefile|1 +
 drivers/timer/sti-timer.c |   78 ++
 include/configs/stih410-b2260.h   |   61 +
 include/dm/platform_data/serial_sti_asc.h |   17 +
 include/dt-bindings/clock/stih407-clks.h  |   90 ++
 include/dt-bindings/clock/stih410-clks.h  |   25 +
 include/dt-bindings/interrupt-controller/irq-st.h |   30 +
 include/dt-bindings/mfd/st-lpc.h  |   16 +
 include/dt-bindings/reset/stih407-resets.h|   65 +
 41 files changed, 5155 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/st-pincfg.h
 create mode 100644 arch/arm/dts/stih407-clock.dtsi
 create mode 100644 arch/arm/dts/stih407-family.dtsi
 create mode 100644 arch/arm/dts/stih407-pinctrl.dtsi
 create mode 100644 arch/arm/dts/stih410-b2260.dts
 create mode 100644 arch/arm/dts/stih410-clock.dtsi
 create mode 100644 arch/arm/dts/stih410-pinctrl.dtsi
 create mode 100644 arch/arm/dts/stih410.dtsi
 create mode 100644 arch/arm/include/asm/arch-stih410/sdhci.h
 create mode 100644 arch/arm/include/asm/arch-stih410/sti.h
 create mode 100644 arch/arm/mach-sti/Kconfig
 create mode 100644 board/st/stih410-b2260/Kconfig
 create mode 100644 board/st/stih410-b2260/MAINTAINERS
 create mode 100644 board/st/stih410-b2260/Makefile
 create mode 100644 board/st/stih410-b2260/board.c
 create mode 100644 configs/stih410-b2260_defconfig
 create mode 100644 drivers/mmc/sti_sdhci.c
 create mode 100644 drivers/pinctrl/pinctrl-sti.c
 create mode 100644 drivers/serial/serial_sti_asc.c
 create mode 100644 drivers/sysreset/sysreset_sti.c
 create mode 100644 drivers/timer/sti-timer.c
 create mode 100644 include/configs/stih410-b2260.h
 create mode 100644 include/dm/platform_data/serial_sti_asc.h
 create mode 100644

[U-Boot] [PATCH v3 4/9] STiH410: Add STi serial driver

2017-02-10 Thread patrice.chotard

From: Patrice Chotard 

This patch adds support to ASC (asynchronous serial controller)
driver, which is basically a standard serial driver. This IP
is common across other STMicroelectronics SoCs

Signed-off-by: Patrice Chotard 
---
 arch/arm/Kconfig  |   2 +
 arch/arm/include/asm/arch-stih410/sti.h   |  16 +++
 drivers/serial/Kconfig|   7 +
 drivers/serial/Makefile   |   1 +
 drivers/serial/serial_sti_asc.c   | 218 ++
 include/dm/platform_data/serial_sti_asc.h |  17 +++
 6 files changed, 261 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-stih410/sti.h
 create mode 100644 drivers/serial/serial_sti_asc.c
 create mode 100644 include/dm/platform_data/serial_sti_asc.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 4aa5eb9..b91a5b7 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -985,6 +985,8 @@ config STM32
 config ARCH_STI
bool "Support STMicrolectronics SoCs"
select CPU_V7
+   select DM
+   select DM_SERIAL
help
  Support for STMicroelectronics STiH407/10 SoC family.
  This SoC is used on Linaro 96Board STiH410-B2260
diff --git a/arch/arm/include/asm/arch-stih410/sti.h 
b/arch/arm/include/asm/arch-stih410/sti.h
new file mode 100644
index 000..41146cc
--- /dev/null
+++ b/arch/arm/include/asm/arch-stih410/sti.h
@@ -0,0 +1,16 @@
+/*
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _STI_H_
+#define _STI_H_
+
+/* STiH410 control registers */
+#define STIH410_COMMS_BASE 0x0980
+
+/* ASC UART located in the main "COMMs" block */
+#define STIH410_ASC1_BASE (STIH410_COMMS_BASE + 0x00031000)
+
+#endif /* _STI_H_ */
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index b11f3ff..7557632 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -413,4 +413,11 @@ config PXA_SERIAL
  If you have a machine based on a Marvell XScale PXA2xx CPU you
  can enable its onboard serial ports by enabling this option.
 
+config STI_ASC_SERIAL
+   bool "STMicroelectronics on-chip UART"
+   depends on DM_SERIAL && ARCH_STI
+   help
+ Select this to enable Asynchronous Serial Controller available
+ on STiH410 SoC.
+
 endmenu
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 8430668..84a22ce 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -41,6 +41,7 @@ obj-$(CONFIG_FSL_LINFLEXUART) += serial_linflexuart.o
 obj-$(CONFIG_ARC_SERIAL) += serial_arc.o
 obj-$(CONFIG_UNIPHIER_SERIAL) += serial_uniphier.o
 obj-$(CONFIG_STM32_SERIAL) += serial_stm32.o
+obj-$(CONFIG_STI_ASC_SERIAL) += serial_sti_asc.o
 obj-$(CONFIG_PIC32_SERIAL) += serial_pic32.o
 obj-$(CONFIG_STM32X7_SERIAL) += serial_stm32x7.o
 obj-$(CONFIG_BCM283X_MU_SERIAL) += serial_bcm283x_mu.o
diff --git a/drivers/serial/serial_sti_asc.c b/drivers/serial/serial_sti_asc.c
new file mode 100644
index 000..5e21095
--- /dev/null
+++ b/drivers/serial/serial_sti_asc.c
@@ -0,0 +1,218 @@
+/*
+ * Support for Serial I/O using STMicroelectronics' on-chip ASC.
+ *
+ *  Copyright (c) 2017
+ *  Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define BAUDMODE   0x1000
+#define RXENABLE   0x0100
+#define RUN0x0080
+#define MODE   0x0001
+#define MODE_8BIT  0x0001
+#define STOP_1BIT  0x0008
+#define PARITYODD  0x0020
+
+#define STA_TF 0x0200
+#define STA_RBF0x0001
+
+struct sti_asc_uart {
+   u32 baudrate;
+   u32 txbuf;
+   u32 rxbuf;
+   u32 control;
+   u32 inten;
+   u32 status;
+   u32 guardtime;
+   u32 timeout;
+   u32 txreset;
+   u32 rxreset;
+};
+
+/* Values for the BAUDRATE Register ---*/
+#define PCLK   (200ul * 100ul)
+#define BAUDRATE_VAL_M0(bps)   (PCLK / (16 * (bps)))
+#define BAUDRATE_VAL_M1(bps)   ((bps * (1 << 14)) + (1<<13)) / (PCLK/(1 << 6))
+
+/*
+ * MODE 0
+ *   ICCLK
+ * ASCBaudRate =   
+ *   baudrate * 16
+ *
+ * MODE 1
+ *   baudrate * 16 * 2^16
+ * ASCBaudRate =   
+ *  ICCLK
+ *
+ * NOTE:
+ * Mode 1 should be used for baudrates of 19200, and above, as it
+ * has a lower deviation error than Mode 0 for higher frequencies.
+ * Mode 0 should be used for all baudrates below 19200.
+ */
+
+static int sti_asc_pending(struct udevice *dev, bool input)
+{
+   struct sti_asc_serial_platdata *plat = dev->platdata;
+   struct sti_asc_uart *const uart = plat->base;
+   unsigned long status;
+
+   status = readl(>status);
+   if (input)
+

[U-Boot] [PATCH v3 6/9] STiH410: Add STi SDHCI driver

2017-02-10 Thread patrice.chotard

From: Patrice Chotard 

Add SDHCI host controller found on STMicroelectronics SoCs

On some ST SoCs, i.e. STiH407/STiH410, the MMC devices can live
inside a dedicated flashSS sub-system that provides an extend subset
of registers that can be used to configure the Arasan MMC/SD Host
Controller.

This means, that the SDHCI Arasan Controller can be configured to be
eMMC4.5 or 4.3 spec compliant.

W/o these settings the SDHCI will configure and use the MMC/SD
controller with limited features e.g. PIO mode, no DMA, no HS etc.

Signed-off-by: Patrice Chotard 
---
 arch/arm/Kconfig  |   2 +
 arch/arm/include/asm/arch-stih410/sdhci.h |  68 ++
 drivers/mmc/Kconfig   |   7 ++
 drivers/mmc/Makefile  |   1 +
 drivers/mmc/sti_sdhci.c   | 143 ++
 5 files changed, 221 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-stih410/sdhci.h
 create mode 100644 drivers/mmc/sti_sdhci.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b91a5b7..477f36b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -987,6 +987,8 @@ config ARCH_STI
select CPU_V7
select DM
select DM_SERIAL
+   select BLK
+   select DM_MMC
help
  Support for STMicroelectronics STiH407/10 SoC family.
  This SoC is used on Linaro 96Board STiH410-B2260
diff --git a/arch/arm/include/asm/arch-stih410/sdhci.h 
b/arch/arm/include/asm/arch-stih410/sdhci.h
new file mode 100644
index 000..8cd77fc
--- /dev/null
+++ b/arch/arm/include/asm/arch-stih410/sdhci.h
@@ -0,0 +1,68 @@
+/*
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __STI_SDHCI_H__
+#define __STI_SDHCI_H__
+
+#define FLASHSS_MMC_CORE_CONFIG_1  0x400
+#define FLASHSS_MMC_CORECFG_TIMEOUT_CLK_UNIT_MHZ   BIT(24)
+#define FLASHSS_MMC_CORECFG_TIMEOUT_CLK_FREQ_MIN   BIT(12)
+
+#define STI_FLASHSS_MMC_CORE_CONFIG_1  \
+   (FLASHSS_MMC_CORECFG_TIMEOUT_CLK_UNIT_MHZ   | \
+FLASHSS_MMC_CORECFG_TIMEOUT_CLK_FREQ_MIN)
+
+#define FLASHSS_MMC_CORE_CONFIG_2  0x404
+#define FLASHSS_MMC_CORECFG_HIGH_SPEED BIT(28)
+#define FLASHSS_MMC_CORECFG_8BIT_EMMC  BIT(20)
+#define MAX_BLK_LENGTH_1024BIT(16)
+#define BASE_CLK_FREQ_200  0xc8
+
+#define STI_FLASHSS_MMC_CORE_CONFIG2   \
+   (FLASHSS_MMC_CORECFG_HIGH_SPEED | \
+FLASHSS_MMC_CORECFG_8BIT_EMMC  | \
+MAX_BLK_LENGTH_1024| \
+BASE_CLK_FREQ_200 << 0)
+
+#define STI_FLASHSS_SDCARD_CORE_CONFIG2\
+   (FLASHSS_MMC_CORECFG_HIGH_SPEED | \
+MAX_BLK_LENGTH_1024| \
+BASE_CLK_FREQ_200)
+
+#define FLASHSS_MMC_CORE_CONFIG_3  0x408
+#define FLASHSS_MMC_CORECFG_SLOT_TYPE_EMMC BIT(28)
+#define FLASHSS_MMC_CORECFG_ASYNCH_INTR_SUPPORTBIT(20)
+#define FLASHSS_MMC_CORECFG_3P3_VOLT   BIT(8)
+#define FLASHSS_MMC_CORECFG_SUSP_RES_SUPPORT   BIT(4)
+#define FLASHSS_MMC_CORECFG_SDMA   BIT(0)
+
+#define STI_FLASHSS_MMC_CORE_CONFIG3   \
+(FLASHSS_MMC_CORECFG_SLOT_TYPE_EMMC| \
+FLASHSS_MMC_CORECFG_ASYNCH_INTR_SUPPORT| \
+FLASHSS_MMC_CORECFG_3P3_VOLT   | \
+FLASHSS_MMC_CORECFG_SUSP_RES_SUPPORT   | \
+FLASHSS_MMC_CORECFG_SDMA)
+
+#define STI_FLASHSS_SDCARD_CORE_CONFIG3\
+(FLASHSS_MMC_CORECFG_ASYNCH_INTR_SUPPORT   | \
+FLASHSS_MMC_CORECFG_3P3_VOLT   | \
+FLASHSS_MMC_CORECFG_SUSP_RES_SUPPORT   | \
+FLASHSS_MMC_CORECFG_SDMA)
+
+#define FLASHSS_MMC_CORE_CONFIG_4  0x40c
+#define FLASHSS_MMC_CORECFG_D_DRIVER_SUPPORT   BIT(20)
+#define FLASHSS_MMC_CORECFG_C_DRIVER_SUPPORT   BIT(16)
+#define FLASHSS_MMC_CORECFG_A_DRIVER_SUPPORT   BIT(12)
+
+#define STI_FLASHSS_MMC_CORE_CONFIG4   \
+   (FLASHSS_MMC_CORECFG_D_DRIVER_SUPPORT   | \
+FLASHSS_MMC_CORECFG_C_DRIVER_SUPPORT   | \
+FLASHSS_MMC_CORECFG_A_DRIVER_SUPPORT)
+
+#define ST_MMC_CCONFIG_REG_5   0x210
+#define SYSCONF_MMC1_ENABLE_BIT3
+
+#endif /* _STI_SDHCI_H_ */
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 01d1dbf..ea5ea08 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -299,6 +299,13 @@ config MMC_SDHCI_SPEAR
 
  If unsure, say N.
 
+config MMC_SDHCI_STI
+   bool "SDHCI support for STMicroelectronics SoC"
+   depends on MMC_SDHCI
+   help
+ This selects the Secure Digital Host Controller Interface (SDHCI)
+ on

[U-Boot] [PATCH v3 3/9] STiH410: Add STi sysreset driver

2017-02-10 Thread patrice.chotard

From: Patrice Chotard 

Signed-off-by: Patrice Chotard 
---
 drivers/sysreset/Makefile   |  1 +
 drivers/sysreset/sysreset_sti.c | 82 +
 2 files changed, 83 insertions(+)
 create mode 100644 drivers/sysreset/sysreset_sti.c

diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index 37638a8..21bcc21 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -13,5 +13,6 @@ obj-$(CONFIG_ROCKCHIP_RK3288) += sysreset_rk3288.o
 obj-$(CONFIG_ROCKCHIP_RK3399) += sysreset_rk3399.o
 obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o
 obj-$(CONFIG_ARCH_SNAPDRAGON) += sysreset_snapdragon.o
+obj-$(CONFIG_ARCH_STI) += sysreset_sti.o
 obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o
 obj-$(CONFIG_ARCH_ASPEED) += sysreset_ast.o
diff --git a/drivers/sysreset/sysreset_sti.c b/drivers/sysreset/sysreset_sti.c
new file mode 100644
index 000..9b58aa8
--- /dev/null
+++ b/drivers/sysreset/sysreset_sti.c
@@ -0,0 +1,82 @@
+/*
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct sti_sysreset_priv {
+   phys_addr_t base;
+};
+
+static int sti_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+   struct sti_sysreset_priv *priv = dev_get_priv(dev);
+
+   generic_clear_bit(0, (void __iomem *)priv->base);
+
+   return -EINPROGRESS;
+}
+
+static int sti_sysreset_probe(struct udevice *dev)
+{
+   struct sti_sysreset_priv *priv = dev_get_priv(dev);
+   struct udevice *syscon;
+   struct regmap *regmap;
+   struct fdtdec_phandle_args syscfg_phandle;
+   int ret;
+
+   /* get corresponding syscon phandle */
+   ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, dev_of_offset(dev),
+"st,syscfg", NULL, 0, 0,
+_phandle);
+   if (ret < 0) {
+   error("Can't get syscfg phandle: %d\n", ret);
+   return ret;
+   }
+
+   ret = uclass_get_device_by_of_offset(UCLASS_SYSCON,
+syscfg_phandle.node,
+);
+   if (ret) {
+   error("%s: uclass_get_device_by_of_offset failed: %d\n",
+ __func__, ret);
+   return ret;
+   }
+
+   regmap = syscon_get_regmap(syscon);
+   if (!regmap) {
+   error("unable to get regmap for %s\n", syscon->name);
+   return -ENODEV;
+   }
+
+   priv->base = regmap->base;
+
+   return 0;
+}
+
+static struct sysreset_ops sti_sysreset = {
+   .request= sti_sysreset_request,
+};
+
+static const struct udevice_id sti_sysreset_ids[] = {
+   { .compatible = "st,stih407-restart" },
+   { }
+};
+
+U_BOOT_DRIVER(sysreset_sti) = {
+   .name = "sysreset_sti",
+   .id = UCLASS_SYSRESET,
+   .ops = _sysreset,
+   .probe = sti_sysreset_probe,
+   .of_match = sti_sysreset_ids,
+   .priv_auto_alloc_size = sizeof(struct sti_sysreset_priv),
+};
-- 
1.9.1

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[U-Boot] [PATCH v3 2/9] STiH410: Add STi timer driver

2017-02-10 Thread patrice.chotard

From: Patrice Chotard 

Add ARM global timer based timer

Signed-off-by: Patrice Chotard 
---
 drivers/timer/Kconfig |  7 +
 drivers/timer/Makefile|  1 +
 drivers/timer/sti-timer.c | 78 +++
 3 files changed, 86 insertions(+)
 create mode 100644 drivers/timer/sti-timer.c

diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig
index cd38a6d..72c1416 100644
--- a/drivers/timer/Kconfig
+++ b/drivers/timer/Kconfig
@@ -58,4 +58,11 @@ config AST_TIMER
  This is mostly because they all share several registers which
  makes it difficult to completely separate them.
 
+config STI_TIMER
+   bool "STi timer support"
+   depends on TIMER
+   default y if ARCH_STI
+   help
+ Select this to enable a timer for STi devices.
+
 endmenu
diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile
index a4b1a48..ae94be8 100644
--- a/drivers/timer/Makefile
+++ b/drivers/timer/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_SANDBOX_TIMER)   += sandbox_timer.o
 obj-$(CONFIG_X86_TSC_TIMER)+= tsc_timer.o
 obj-$(CONFIG_OMAP_TIMER)   += omap-timer.o
 obj-$(CONFIG_AST_TIMER)+= ast_timer.o
+obj-$(CONFIG_STI_TIMER)+= sti-timer.o
diff --git a/drivers/timer/sti-timer.c b/drivers/timer/sti-timer.c
new file mode 100644
index 000..e1419c4
--- /dev/null
+++ b/drivers/timer/sti-timer.c
@@ -0,0 +1,78 @@
+/*
+ * (C) Copyright 2017 Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct sti_timer_priv {
+   struct globaltimer *global_timer;
+};
+
+static int sti_timer_get_count(struct udevice *dev, u64 *count)
+{
+   struct sti_timer_priv *priv = dev_get_priv(dev);
+   struct globaltimer *global_timer = priv->global_timer;
+   u32 low, high;
+   u64 timer;
+   u32 old = readl(_timer->cnt_h);
+
+   while (1) {
+   low = readl(_timer->cnt_l);
+   high = readl(_timer->cnt_h);
+   if (old == high)
+   break;
+   else
+   old = high;
+   }
+   timer = high;
+   *count = (u64)((timer << 32) | low);
+
+   return 0;
+}
+
+static int sti_timer_probe(struct udevice *dev)
+{
+   struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+   struct sti_timer_priv *priv = dev_get_priv(dev);
+   fdt_addr_t addr;
+
+   uc_priv->clock_rate = CONFIG_SYS_HZ_CLOCK;
+
+   /* get arm global timer base address */
+   addr = fdtdec_get_addr(gd->fdt_blob, dev_of_offset(dev), "reg");
+   priv->global_timer = (struct globaltimer *)addr;
+
+   /* init timer */
+   writel(0x01, >global_timer->ctl);
+
+   return 0;
+}
+
+static const struct timer_ops sti_timer_ops = {
+   .get_count = sti_timer_get_count,
+};
+
+static const struct udevice_id sti_timer_ids[] = {
+   { .compatible = "arm,cortex-a9-global-timer" },
+   {}
+};
+
+U_BOOT_DRIVER(sti_timer) = {
+   .name = "sti_timer",
+   .id = UCLASS_TIMER,
+   .of_match = sti_timer_ids,
+   .priv_auto_alloc_size = sizeof(struct sti_timer_priv),
+   .probe = sti_timer_probe,
+   .ops = _timer_ops,
+   .flags = DM_FLAG_PRE_RELOC,
+};
-- 
1.9.1

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[U-Boot] [PATCH v3 5/9] gpio: do not include for ARCH_STI

2017-02-10 Thread patrice.chotard

From: Patrice Chotard 

As no gpio.h is defined in arch/arm/include/asm/arch-stih410,
to avoid compilation failure, do not include asm/arch/gpio.h.

This is needed for example when including sdhci.h, which include
asm/gpio.h>.

Signed-off-by: Patrice Chotard 
---
 arch/arm/include/asm/gpio.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h
index fe4419c..1c5e873 100644
--- a/arch/arm/include/asm/gpio.h
+++ b/arch/arm/include/asm/gpio.h
@@ -1,4 +1,4 @@
-#ifndef CONFIG_ARCH_UNIPHIER
+#if !defined(CONFIG_ARCH_UNIPHIER) && !defined(CONFIG_ARCH_STI)
 #include 
 #endif
 #include 
-- 
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[U-Boot] [PATCH v3 7/9] STiH410: Add STi pinctrl driver

2017-02-10 Thread patrice.chotard

From: Patrice Chotard 

Add STMicroelectronics STiH410 pinctrl driver

Signed-off-by: Patrice Chotard 
Reviewed-by: Tom Rini 
---
 drivers/pinctrl/Kconfig   |  10 ++
 drivers/pinctrl/Makefile  |   1 +
 drivers/pinctrl/pinctrl-sti.c | 320 ++
 3 files changed, 331 insertions(+)
 create mode 100644 drivers/pinctrl/pinctrl-sti.c

diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index efcb4c0..0c832e1 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -175,6 +175,16 @@ config PIC32_PINCTRL
  by a device tree node which contains both GPIO defintion and pin 
control
  functions.
 
+config PINCTRL_STI
+   bool "STMicroelectronics STi pin-control and pin-mux driver"
+   depends on DM && ARCH_STI
+   default y
+   help
+ Support pin multiplexing control on STMicrolectronics STi SoCs.
+ The driver is controlled by a device tree node which contains both
+ the GPIO definitions and pin control functions for each available 
multiplex
+ function.
+
 endif
 
 source "drivers/pinctrl/meson/Kconfig"
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 512112a..a2f8101 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -16,3 +16,4 @@ obj-$(CONFIG_PIC32_PINCTRL)   += pinctrl_pic32.o
 obj-$(CONFIG_PINCTRL_EXYNOS)   += exynos/
 obj-$(CONFIG_PINCTRL_MESON)+= meson/
 obj-$(CONFIG_PINCTRL_MVEBU)+= mvebu/
+obj-$(CONFIG_PINCTRL_STI)  += pinctrl-sti.o
diff --git a/drivers/pinctrl/pinctrl-sti.c b/drivers/pinctrl/pinctrl-sti.c
new file mode 100644
index 000..6ee7fa7
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-sti.c
@@ -0,0 +1,320 @@
+/*
+ * Pinctrl driver for STMicroelectronics STi SoCs
+ *
+ *  Copyright (c) 2017
+ *  Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define MAX_STI_PINCONF_ENTRIES7
+/* Output enable */
+#define OE (1 << 27)
+/* Pull Up */
+#define PU (1 << 26)
+/* Open Drain */
+#define OD (1 << 25)
+
+/* User-frendly defines for Pin Direction */
+   /* oe = 0, pu = 0, od = 0 */
+#define IN (0)
+   /* oe = 0, pu = 1, od = 0 */
+#define IN_PU  (PU)
+   /* oe = 1, pu = 0, od = 0 */
+#define OUT(OE)
+   /* oe = 1, pu = 1, od = 0 */
+#define OUT_PU (OE | PU)
+   /* oe = 1, pu = 0, od = 1 */
+#define BIDIR  (OE | OD)
+   /* oe = 1, pu = 1, od = 1 */
+#define BIDIR_PU   (OE | PU | OD)
+
+struct sti_pinctrl_platdata {
+   struct regmap *regmap;
+};
+
+struct sti_pin_desc {
+   unsigned char bank;
+   unsigned char pin;
+   unsigned char alt;
+   int dir;
+};
+
+/*
+ * PIO alternative Function selector
+ */
+void sti_alternate_select(struct udevice *dev, struct sti_pin_desc *pin_desc)
+{
+   struct sti_pinctrl_platdata *plat = dev_get_platdata(dev);
+   unsigned long sysconf, *sysconfreg;
+   int alt = pin_desc->alt;
+   int bank = pin_desc->bank;
+   int pin = pin_desc->pin;
+
+   sysconfreg = (unsigned long *)plat->regmap->base;
+
+   switch (bank) {
+   case 0 ... 5:   /* in "SBC Bank" */
+   sysconfreg += bank;
+   break;
+   case 10 ... 20: /* in "FRONT Bank" */
+   sysconfreg += bank - 10;
+   break;
+   case 30 ... 35: /* in "REAR Bank" */
+   sysconfreg += bank - 30;
+   break;
+   case 40 ... 42: /* in "FLASH Bank" */
+   sysconfreg += bank - 40;
+   break;
+   default:
+   BUG();
+   return;
+   }
+
+   sysconf = readl(sysconfreg);
+   bitfield_replace(sysconf, pin * 4, 3, alt);
+   writel(sysconf, sysconfreg);
+}
+
+/* pin configuration */
+void sti_pin_configure(struct udevice *dev, struct sti_pin_desc *pin_desc)
+{
+   struct sti_pinctrl_platdata *plat = dev_get_platdata(dev);
+   int bit;
+   int oe = 0, pu = 0, od = 0;
+   unsigned long *sysconfreg;
+   int bank = pin_desc->bank;
+
+   sysconfreg = (unsigned long *)plat->regmap->base + 40;
+
+   /*
+* NOTE: The PIO configuration for the PIO pins in the
+* "FLASH Bank" are different from all the other banks!
+* Specifically, the output-enable pin control register
+* (SYS_CFG_3040) and the pull-up pin control register
+* (SYS_CFG_3050), are both classed as being "reserved".
+* Hence, we do not write to these registers to configure
+* the OE and PU features for PIOs in this bank.

[U-Boot] [PATCH v3 07/13] usb: ohci: Add STi ohci support

2017-03-28 Thread patrice.chotard

From: Patrice Chotard 

Add support for on-chip ohci controller available
on STMicrolectronics SoCs.
Ohci support will be then available on both type A
USB 2.0 connectors.

Signed-off-by: Patrice Chotard 
---

v3: _ update to use new USB PHY uclass

v2: _ put board specific defines in a separate patch

 drivers/usb/host/Kconfig|  9 +
 drivers/usb/host/Makefile   |  1 +
 drivers/usb/host/ohci-sti.c | 93 +
 3 files changed, 103 insertions(+)
 create mode 100644 drivers/usb/host/ohci-sti.c

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 7c29bf5..b259a05 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -169,6 +169,15 @@ config USB_OHCI_GENERIC
---help---
  Enables support for generic OHCI controller.
 
+config USB_OHCI_STI
+   bool "Support for STMicroelectronics OHCI USB controller"
+   depends on ARCH_STI
+   depends on OF_CONTROL
+   depends on DM_USB
+   select USB_HOST
+   ---help---
+ Enables support for the on-chip OHCI controller on STMicroelectronics 
SoCs.
+
 endif # USB_OHCI_HCD
 
 config USB_UHCI_HCD
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 303aa32..b78e632 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -22,6 +22,7 @@ obj-$(CONFIG_USB_OHCI_EP93XX) += ohci-ep93xx.o
 obj-$(CONFIG_USB_OHCI_SUNXI) += ohci-sunxi.o
 obj-$(CONFIG_USB_OHCI_LPC32XX) += ohci-lpc32xx.o
 obj-$(CONFIG_USB_OHCI_GENERIC) += ohci-generic.o
+obj-$(CONFIG_USB_OHCI_STI) += ohci-sti.o
 
 # echi
 obj-$(CONFIG_USB_EHCI) += ehci-hcd.o
diff --git a/drivers/usb/host/ohci-sti.c b/drivers/usb/host/ohci-sti.c
new file mode 100644
index 000..c221313
--- /dev/null
+++ b/drivers/usb/host/ohci-sti.c
@@ -0,0 +1,93 @@
+/*
+ * Copyright (c) 2017
+ * Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include "ohci.h"
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if !defined(CONFIG_USB_OHCI_NEW)
+# error "Generic OHCI driver requires CONFIG_USB_OHCI_NEW"
+#endif
+
+struct sti_ohci_priv {
+   ohci_t ohci;
+   struct reset_ctl power_ctl;
+   struct reset_ctl softreset_ctl;
+   struct usb_phy_desc usb_phy;
+};
+
+static int ohci_usb_probe(struct udevice *dev)
+{
+   struct sti_ohci_priv *priv = dev_get_priv(dev);
+   struct ohci_regs *regs;
+   int ret;
+
+   regs = (struct ohci_regs *)dev_get_addr(dev);
+   if (regs == (void *)FDT_ADDR_T_NONE)
+   return -EINVAL;
+
+   ret = reset_get_by_name(dev, "power", >power_ctl);
+   if (ret) {
+   error("can't get power reset for %s (%d)", dev->name, ret);
+   return ret;
+   }
+
+   ret = reset_get_by_name(dev, "softreset", >softreset_ctl);
+   if (ret) {
+   error("can't get USB PHY for %s (%d)", dev->name, ret);
+   return ret;
+   }
+
+   ret = usb_phy_get_by_name(dev, "usb", >usb_phy);
+   if (ret) {
+   error("can't get soft reset for %s (%d)", dev->name, ret);
+   return ret;
+   }
+
+   ret = reset_deassert(>power_ctl);
+   if (ret < 0) {
+   error("OHCI power reset deassert failed: %d", ret);
+   return ret;
+   }
+
+   ret = reset_deassert(>softreset_ctl);
+   if (ret < 0) {
+   error("OHCI soft reset deassert failed: %d", ret);
+   return ret;
+   }
+
+   ret = usb_phy_init(>usb_phy);
+   if (ret) {
+   error("Can't init USB PHY\n");
+   return ret;
+   }
+
+   return ohci_register(dev, regs);
+}
+
+static const struct udevice_id sti_usb_ids[] = {
+   { .compatible = "st,st-ohci-300x" },
+   { }
+};
+
+U_BOOT_DRIVER(ohci_sti) = {
+   .name = "ohci_sti",
+   .id = UCLASS_USB,
+   .of_match = sti_usb_ids,
+   .probe = ohci_usb_probe,
+   .remove = ohci_deregister,
+   .ops = _usb_ops,
+   .priv_auto_alloc_size = sizeof(struct sti_ohci_priv),
+   .flags = DM_FLAG_ALLOC_PRIV_DMA,
+};
-- 
1.9.1

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[U-Boot] [PATCH v3 11/13] board: STiH410-B2260: add fastboot support

2017-03-28 Thread patrice.chotard

From: Patrice Chotard 

Add usb_gadget_handle_interrupts(), board_usb_init(),
board_usb_cleanup() and g_dnl_board_usb_cable_connected()
callbacks needed for FASTBOOT support

Signed-off-by: Patrice Chotard 
---
 board/st/stih410-b2260/board.c | 44 ++
 1 file changed, 44 insertions(+)

diff --git a/board/st/stih410-b2260/board.c b/board/st/stih410-b2260/board.c
index 0c06bca..3edfc7f 100644
--- a/board/st/stih410-b2260/board.c
+++ b/board/st/stih410-b2260/board.c
@@ -7,6 +7,9 @@
  */
 
 #include 
+#include 
+#include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -26,3 +29,44 @@ int board_init(void)
 {
return 0;
 }
+
+#ifdef CONFIG_USB_DWC3
+static struct dwc3_device dwc3_device_data = {
+   .maximum_speed = USB_SPEED_HIGH,
+   .dr_mode = USB_DR_MODE_PERIPHERAL,
+   .index = 0,
+};
+
+int usb_gadget_handle_interrupts(int index)
+{
+   dwc3_uboot_handle_interrupt(index);
+   return 0;
+}
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+   int node;
+   const void *blob = gd->fdt_blob;
+
+   /* find the snps,dwc3 node */
+   node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc3");
+
+   dwc3_device_data.base = fdtdec_get_addr(blob, node, "reg");
+
+   /* init dwc3 glue with mode forced to PERIPHERAL */
+   sti_dwc3_init(USB_DR_MODE_PERIPHERAL);
+
+   return dwc3_uboot_init(_device_data);
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+   dwc3_uboot_exit(index);
+   return 0;
+}
+
+int g_dnl_board_usb_cable_connected(void)
+{
+   return 1;
+}
+#endif
-- 
1.9.1

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[U-Boot] [PATCH v3 02/13] ARM: dts: stih410-family: Add missing reset_names for mmc1 node

2017-03-28 Thread patrice.chotard

From: Patrice Chotard 

reset-names property is needed to use the reset
API for STi sdhci driver.

Signed-off-by: Patrice Chotard 
Reviewed-by: Jaehoon Chung 
---
 arch/arm/dts/stih407-family.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/dts/stih407-family.dtsi b/arch/arm/dts/stih407-family.dtsi
index af66b53..452ac1c 100644
--- a/arch/arm/dts/stih407-family.dtsi
+++ b/arch/arm/dts/stih407-family.dtsi
@@ -563,6 +563,7 @@
clocks = <_s_c0_flexgen CLK_MMC_1>,
 <_s_c0_flexgen CLK_RX_ICN_HVA>;
resets = < STIH407_MMC1_SOFTRESET>;
+   reset-names = "softreset";
bus-width = <4>;
};
 
-- 
1.9.1

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[U-Boot] [PATCH v3 03/13] mmc: sti_sdhci: Use reset framework

2017-03-28 Thread patrice.chotard

From: Patrice Chotard 

Signed-off-by: Patrice Chotard 
Reviewed-by: Jaehoon Chung 
---
 drivers/mmc/sti_sdhci.c | 31 ++-
 1 file changed, 22 insertions(+), 9 deletions(-)

diff --git a/drivers/mmc/sti_sdhci.c b/drivers/mmc/sti_sdhci.c
index d6c4d67..8b1b2c0 100644
--- a/drivers/mmc/sti_sdhci.c
+++ b/drivers/mmc/sti_sdhci.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -16,6 +17,7 @@ DECLARE_GLOBAL_DATA_PTR;
 struct sti_sdhci_plat {
struct mmc_config cfg;
struct mmc mmc;
+   struct reset_ctl reset;
int instance;
 };
 
@@ -37,17 +39,19 @@ struct sti_sdhci_plat {
  * W/o these settings the SDHCI could configure and use the embedded controller
  * with limited features.
  */
-static void sti_mmc_core_config(struct udevice *dev)
+static int sti_mmc_core_config(struct udevice *dev)
 {
struct sti_sdhci_plat *plat = dev_get_platdata(dev);
struct sdhci_host *host = dev_get_priv(dev);
-   unsigned long *sysconf;
+   int ret;
 
/* only MMC1 has a reset line */
if (plat->instance) {
-   sysconf = (unsigned long *)(STIH410_SYSCONF5_BASE +
- ST_MMC_CCONFIG_REG_5);
-   generic_set_bit(SYSCONF_MMC1_ENABLE_BIT, sysconf);
+   ret = reset_deassert(>reset);
+   if (ret < 0) {
+   error("MMC1 deassert failed: %d", ret);
+   return ret;
+   }
}
 
writel(STI_FLASHSS_MMC_CORE_CONFIG_1,
@@ -66,6 +70,8 @@ static void sti_mmc_core_config(struct udevice *dev)
}
writel(STI_FLASHSS_MMC_CORE_CONFIG4,
   host->ioaddr + FLASHSS_MMC_CORE_CONFIG_4);
+
+   return 0;
 }
 
 static int sti_sdhci_probe(struct udevice *dev)
@@ -80,13 +86,20 @@ static int sti_sdhci_probe(struct udevice *dev)
 * MMC0 is wired to the SD slot,
 * MMC1 is wired on the high speed connector
 */
-
-   if (fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "resets", NULL))
+   if (fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "resets", NULL)) {
plat->instance = 1;
-   else
+   ret = reset_get_by_name(dev, "softreset", >reset);
+   if (ret) {
+   error("can't get reset for %s (%d)", dev->name, ret);
+   return ret;
+   }
+   } else {
plat->instance = 0;
+   }
 
-   sti_mmc_core_config(dev);
+   ret = sti_mmc_core_config(dev);
+   if (ret)
+   return ret;
 
host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD |
   SDHCI_QUIRK_32BIT_DMA_ADDR |
-- 
1.9.1

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[U-Boot] [PATCH v3 06/13] usb: ehci: Add STi ehci support

2017-03-28 Thread patrice.chotard

From: Patrice Chotard 

Add support for on-chip ehci controller available
on STMicrolectronics SoCs.
ehci support will be then available on both type A
USB 2.0 connectors.

Signed-off-by: Patrice Chotard 
---

v3: _ update to use new USB PHY uclass

v2: _ update error messages
_ add remove callback to put core into reset

 drivers/usb/host/Kconfig|   9 
 drivers/usb/host/Makefile   |   1 +
 drivers/usb/host/ehci-sti.c | 116 
 3 files changed, 126 insertions(+)
 create mode 100644 drivers/usb/host/ehci-sti.c

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 0bf8274..7c29bf5 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -121,6 +121,15 @@ config USB_EHCI_MSM
  This driver supports combination of Chipidea USB controller
  and Synapsys USB PHY in host mode only.
 
+config USB_EHCI_STI
+   bool "Support for STMicroelectronics on-chip EHCI USB controller"
+   depends on ARCH_STI
+   select STI_PHY_USB
+   default y
+   ---help---
+ Enables support for the on-chip EHCI controller on
+ STMicroelectronics SoCs.
+
 config USB_EHCI_ZYNQ
bool "Support for Xilinx Zynq on-chip EHCI USB controller"
depends on ARCH_ZYNQ
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 58c0cf5..303aa32 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -46,6 +46,7 @@ obj-$(CONFIG_USB_EHCI_MARVELL) += ehci-marvell.o
 obj-$(CONFIG_USB_EHCI_MSM) += ehci-msm.o
 obj-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o
 obj-$(CONFIG_USB_EHCI_SPEAR) += ehci-spear.o
+obj-$(CONFIG_USB_EHCI_STI) += ehci-sti.o
 obj-$(CONFIG_USB_EHCI_SUNXI) += ehci-sunxi.o
 obj-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o
 obj-$(CONFIG_USB_EHCI_VCT) += ehci-vct.o
diff --git a/drivers/usb/host/ehci-sti.c b/drivers/usb/host/ehci-sti.c
new file mode 100644
index 000..b417170
--- /dev/null
+++ b/drivers/usb/host/ehci-sti.c
@@ -0,0 +1,116 @@
+/*
+ * Copyright (c) 2017
+ * Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include "ehci.h"
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct sti_ehci_priv {
+   struct ehci_ctrl ctrl;
+   struct reset_ctl power_ctl;
+   struct reset_ctl softreset_ctl;
+   struct usb_phy_desc usb_phy;
+};
+
+static int sti_ehci_probe(struct udevice *dev)
+{
+   struct sti_ehci_priv *priv = dev_get_priv(dev);
+   struct ehci_hccr *hccr = priv->ctrl.hccr;
+   struct ehci_hcor *hcor;
+   int ret;
+
+   hccr = (struct ehci_hccr *)dev_get_addr(dev);
+
+   if (hccr == (void *)FDT_ADDR_T_NONE)
+   return -EINVAL;
+
+   ret = reset_get_by_name(dev, "power", >power_ctl);
+   if (ret) {
+   error("can't get power for %s: %d", dev->name, ret);
+   return ret;
+   }
+
+   ret = reset_get_by_name(dev, "softreset", >softreset_ctl);
+   if (ret) {
+   error("can't get soft reset for %s: %d", dev->name, ret);
+   return ret;
+   }
+
+   ret = usb_phy_get_by_name(dev, "usb", >usb_phy);
+   if (ret) {
+   error("USB PHY DT node not found for %s: %d", dev->name, ret);
+   return ret;
+   }
+
+   ret = reset_deassert(>softreset_ctl);
+   if (ret < 0) {
+   error("EHCI soft reset deassert failed: %d", ret);
+   return ret;
+   }
+
+   ret = reset_deassert(>power_ctl);
+   if (ret < 0) {
+   error("EHCI power deassert failed: %d", ret);
+   return ret;
+   }
+
+   ret = usb_phy_init(>usb_phy);
+   if (ret) {
+   error("Can't init USB PHY for %s: %d\n", dev->name, ret);
+   return ret;
+   }
+
+   hcor = (struct ehci_hcor *)((phys_addr_t)hccr +
+   HC_LENGTH(ehci_readl(&(hccr)->cr_capbase)));
+
+   return ehci_register(dev, hccr, hcor, NULL, 0, USB_INIT_HOST);
+}
+
+static int sti_ehci_remove(struct udevice *dev)
+{
+   struct sti_ehci_priv *priv = dev_get_priv(dev);
+   int ret;
+
+   ret = ehci_deregister(dev);
+   if (ret)
+   return ret;
+
+   ret = reset_assert(>power_ctl);
+   if (ret < 0) {
+   error("EHCI power assert failed: %d", ret);
+   return ret;
+   }
+
+   ret = reset_assert(>softreset_ctl);
+   if (ret < 0)
+   error("EHCI soft reset assert failed: %d", ret);
+
+   return ret;
+}
+
+static const struct udevice_id sti_usb_ids[] = {
+   { .compatible = "st,st-ehci-300x" },
+   { }
+};
+
+U_BOOT_DRIVER(ehci_sti) = {
+   .name = "ehci_sti",
+   .id = UCLASS_USB,
+   .of_match = sti_usb_ids,
+   .probe = sti_ehci_probe,
+   .remove = sti_ehci_remove,
+   .ops = _usb_ops,
+

[U-Boot] [PATCH v3 05/13] usb: phy: Add STi USB2 PHY

2017-03-28 Thread patrice.chotard

From: Patrice Chotard 

This is the generic phy driver for the picoPHY ports
used by USB2/1.1 controllers. It is found on STiH407 SoC
family from STMicroelectronics.

Signed-off-by: Patrice Chotard 
---

v3: _ convert driver to USB PHY uclass

v2: _ replace bitfield_replace() by clrsetbits_le32()

 doc/device-tree-bindings/phy/phy-stih407-usb.txt |  24 +++
 drivers/usb/phy/Kconfig  |   9 ++
 drivers/usb/phy/Makefile |   1 +
 drivers/usb/phy/sti_usb_phy.c| 181 +++
 4 files changed, 215 insertions(+)
 create mode 100644 doc/device-tree-bindings/phy/phy-stih407-usb.txt
 create mode 100644 drivers/usb/phy/sti_usb_phy.c

diff --git a/doc/device-tree-bindings/phy/phy-stih407-usb.txt 
b/doc/device-tree-bindings/phy/phy-stih407-usb.txt
new file mode 100644
index 000..de6a706
--- /dev/null
+++ b/doc/device-tree-bindings/phy/phy-stih407-usb.txt
@@ -0,0 +1,24 @@
+ST STiH407 USB PHY controller
+
+This file documents the dt bindings for the usb picoPHY driver which is the 
PHY for both USB2 and USB3
+host controllers (when controlling usb2/1.1 devices) available on STiH407 SoC 
family from STMicroelectronics.
+
+Required properties:
+- compatible   : should be "st,stih407-usb2-phy"
+- st,syscfg: phandle of sysconfig bank plus integer array 
containing phyparam and phyctrl register offsets
+- resets   : list of phandle and reset specifier pairs. There 
should be two entries, one
+ for the whole phy and one for the port
+- reset-names  : list of reset signal names. Should be "global" and 
"port"
+See: Documentation/devicetree/bindings/reset/st,sti-powerdown.txt
+See: Documentation/devicetree/bindings/reset/reset.txt
+
+Example:
+
+usb2_picophy0: usbpicophy@f8 {
+   compatible  = "st,stih407-usb2-phy";
+   #phy-cells  = <0>;
+   st,syscfg   = <_core 0x100 0xf4>;
+   resets  = < STIH407_PICOPHY_SOFTRESET>,
+ < STIH407_PICOPHY0_RESET>;
+   reset-names = "global", "port";
+};
diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
index 0539401..98c1995 100644
--- a/drivers/usb/phy/Kconfig
+++ b/drivers/usb/phy/Kconfig
@@ -7,4 +7,13 @@ config USB_PHY
  Enable driver model for USB PHY access. It defines basic
  init and exit API.
 
+config STI_USB_PHY
+   bool "STMicroelectronics USB2 picoPHY driver for STiH407 family"
+   depends on USB_PHY
+   default y if ARCH_STI
+   help
+ This is the generic phy driver for the picoPHY ports
+ used by USB2 and USB3 Host controllers available on
+ STiH407 SoC families.
+
 endmenu
diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
index 5314dcb..584cc96 100644
--- a/drivers/usb/phy/Makefile
+++ b/drivers/usb/phy/Makefile
@@ -9,3 +9,4 @@ obj-$(CONFIG_USB_PHY) += usb_phy_uclass.o
 obj-$(CONFIG_TWL4030_USB) += twl4030.o
 obj-$(CONFIG_OMAP_USB_PHY) += omap_usb_phy.o
 obj-$(CONFIG_ROCKCHIP_USB2_PHY) += rockchip_usb2_phy.o
+obj-$(CONFIG_STI_USB_PHY) += sti_usb_phy.o
diff --git a/drivers/usb/phy/sti_usb_phy.c b/drivers/usb/phy/sti_usb_phy.c
new file mode 100644
index 000..9058246
--- /dev/null
+++ b/drivers/usb/phy/sti_usb_phy.c
@@ -0,0 +1,181 @@
+/*
+ * Copyright (c) 2017
+ * Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Default PHY_SEL and REFCLKSEL configuration */
+#define STIH407_USB_PICOPHY_CTRL_PORT_CONF 0x6
+
+/* ports parameters overriding */
+#define STIH407_USB_PICOPHY_PARAM_DEF  0x39a4dc
+
+#define PHYPARAM_REG   1
+#define PHYCTRL_REG2
+#define PHYPARAM_NB3
+
+struct sti_usb_phy {
+   struct regmap *regmap;
+   struct reset_ctl global_ctl;
+   struct reset_ctl port_ctl;
+   int param;
+   int ctrl;
+};
+
+static int sti_usb_phy_deassert(struct sti_usb_phy *phy)
+{
+   int ret;
+
+   ret = reset_deassert(>global_ctl);
+   if (ret < 0) {
+   error("PHY global deassert failed: %d", ret);
+   return ret;
+   }
+
+   ret = reset_deassert(>port_ctl);
+   if (ret < 0)
+   error("PHY port deassert failed: %d", ret);
+
+   return ret;
+}
+
+static int sti_usb_phy_init(struct usb_phy_desc *usb_phy_desc)
+{
+   struct udevice *dev = usb_phy_desc->dev;
+   struct sti_usb_phy *phy = dev_get_priv(dev);
+   void __iomem *reg;
+
+   /* set ctrl picophy value */
+   reg = (void __iomem *)phy->regmap->base + phy->ctrl;
+   /* CTRL_PORT mask is 0x1f */
+   clrsetbits_le32(reg, 0x1f, STIH407_USB_PICOPHY_CTRL_PORT_CONF);
+
+   /* set ports parameters overriding */
+   reg = (void

[U-Boot] [PATCH v3 08/13] usb: xhci: Add STi xhci support

2017-03-28 Thread patrice.chotard

From: Patrice Chotard 

Add support for on-chip DWC3 controller available
on STMicrolectronics STiH407 family SoCs.
On B2260 board, the type AB USB connector is managed
by a DWC3 IP. As USB3 signals are not wired, only USB2
is supported.

Signed-off-by: Patrice Chotard 
---

v3: _ update to use the new USB PHY uclass
_ previously, xhci-sti driver binded dwc3-sti (STi glue driver) which 
was not correct.
  Now we respect the device tree hierarchy, ie the STi dwc3 glue driver 
is first probed, 
  then bind the xhci-sti driver.

 drivers/usb/host/Kconfig|   8 
 drivers/usb/host/Makefile   |   1 +
 drivers/usb/host/xhci-sti.c | 114 
 3 files changed, 123 insertions(+)
 create mode 100644 drivers/usb/host/xhci-sti.c

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index b259a05..62dc5b6 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -38,6 +38,14 @@ config USB_XHCI_ROCKCHIP
help
  Enables support for the on-chip xHCI controller on Rockchip SoCs.
 
+config USB_XHCI_STI
+   bool "Support for STMicroelectronics STiH407 family on-chip xHCI USB 
controller"
+   depends on ARCH_STI
+   default y
+   help
+ Enables support for the on-chip xHCI controller on STMicroelectronics
+ STiH407 family SoCs.
+
 config USB_XHCI_ZYNQMP
bool "Support for Xilinx ZynqMP on-chip xHCI USB controller"
depends on ARCH_ZYNQMP
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index b78e632..40ff830 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -66,6 +66,7 @@ obj-$(CONFIG_USB_XHCI_FSL) += xhci-fsl.o
 obj-$(CONFIG_USB_XHCI_MVEBU) += xhci-mvebu.o
 obj-$(CONFIG_USB_XHCI_OMAP) += xhci-omap.o
 obj-$(CONFIG_USB_XHCI_PCI) += xhci-pci.o
+obj-$(CONFIG_USB_XHCI_STI) += xhci-sti.o
 
 # designware
 obj-$(CONFIG_USB_DWC2) += dwc2.o
diff --git a/drivers/usb/host/xhci-sti.c b/drivers/usb/host/xhci-sti.c
new file mode 100644
index 000..c445dc5
--- /dev/null
+++ b/drivers/usb/host/xhci-sti.c
@@ -0,0 +1,114 @@
+/*
+ * Copyright (c) 2017
+ * Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "xhci.h"
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+__weak int __board_usb_init(int index, enum usb_init_type init)
+{
+   return 0;
+}
+/*int board_usb_init(int index, enum usb_init_type init)*/
+/*__attribute__((weak, alias("__board_usb_init")));*/
+
+struct sti_xhci_platdata {
+   struct usb_phy_desc usb_phy;
+   phys_addr_t dwc3_regs;
+};
+
+struct sti_xhci_priv {
+   struct xhci_ctrl ctrl;
+};
+
+static int sti_xhci_core_init(struct dwc3 *dwc3_reg)
+{
+   int ret;
+
+   ret = dwc3_core_init(dwc3_reg);
+   if (ret) {
+   debug("failed to initialize core\n");
+   return ret;
+   }
+
+   /* We are hard-coding DWC3 core to Host Mode */
+   dwc3_set_mode(dwc3_reg, DWC3_GCTL_PRTCAP_HOST);
+
+   return 0;
+}
+
+static int sti_xhci_ofdata_to_platdata(struct udevice *dev)
+{
+   struct sti_xhci_platdata *plat = dev_get_platdata(dev);
+   u32 reg[2];
+   int ret;
+
+   /* get the dwc3 register space base address */
+   if (fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(dev), "reg", reg,
+ARRAY_SIZE(reg))) {
+   debug("dwc3 node has bad/missing 'reg' property\n");
+   return -FDT_ERR_NOTFOUND;
+   }
+   plat->dwc3_regs = reg[0];
+
+   ret = usb_phy_get_by_name(dev, "usb2-phy", >usb_phy);
+   if (ret)
+   error("USB PHY DT node not found for %s\n", dev->name);
+
+   return 0;
+}
+
+static int sti_xhci_probe(struct udevice *dev)
+{
+   struct sti_xhci_platdata *plat = dev_get_platdata(dev);
+   struct xhci_hcor *hcor;
+   struct xhci_hccr *hccr;
+   struct dwc3 *dwc3_reg;
+   int ret;
+
+   hccr = (struct xhci_hccr *)plat->dwc3_regs;
+   hcor = (struct xhci_hcor *)((phys_addr_t)hccr +
+   HC_LENGTH(xhci_readl(&(hccr)->cr_capbase)));
+
+   ret = usb_phy_init(>usb_phy);
+   if (ret) {
+   error("Can't init USB PHY for %s\n", dev->name);
+   return ret;
+   }
+
+   dwc3_reg = (struct dwc3 *)((char *)(hccr) + DWC3_REG_OFFSET);
+
+   sti_xhci_core_init(dwc3_reg);
+
+   return xhci_register(dev, hccr, hcor);
+}
+
+static const struct udevice_id sti_xhci_ids[] = {
+   { .compatible = "snps,dwc3" },
+   { }
+};
+
+U_BOOT_DRIVER(xhci_sti) = {
+   .name = "xhci_sti",
+   .id = UCLASS_USB,
+   .of_match = sti_xhci_ids,
+   .ofdata_to_platdata = sti_xhci_ofdata_to_platdata,
+   .probe = sti_xhci_probe,
+   .remove = xhci_deregister,
+   .ops = _usb_ops,
+   .priv_auto_alloc_size =

[U-Boot] [PATCH v3 09/13] usb: dwc3: Add dwc3 glue driver support for STi

2017-03-28 Thread patrice.chotard

From: Patrice Chotard 

This patch adds the ST glue logic to manage the DWC3 HC
on STiH407 SoC family. It configures the internal glue
logic and syscfg registers.

Part of this code been extracted from kernel.org driver
(drivers/usb/dwc3/dwc3-st.c)

Signed-off-by: Patrice Chotard 
---
v3: _ rename dwc3-sti.c to dwc3-sti-glue.c
_ respect device tree hierarchy, this driver is now responsible 
  for xhci-sti binding (done in sti_dwc3_glue_bind())

v2: _ use setbits_le32() instead of read, modify, write sequence 
_ add missing parenthesis

 arch/arm/include/asm/arch-stih410/sys_proto.h |  11 +
 doc/device-tree-bindings/usb/dwc3-st.txt  |  60 ++
 drivers/usb/host/Makefile |   2 +-
 drivers/usb/host/dwc3-sti-glue.c  | 278 ++
 include/dwc3-sti-glue.h   |  43 
 5 files changed, 393 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/include/asm/arch-stih410/sys_proto.h
 create mode 100644 doc/device-tree-bindings/usb/dwc3-st.txt
 create mode 100644 drivers/usb/host/dwc3-sti-glue.c
 create mode 100644 include/dwc3-sti-glue.h

diff --git a/arch/arm/include/asm/arch-stih410/sys_proto.h 
b/arch/arm/include/asm/arch-stih410/sys_proto.h
new file mode 100644
index 000..5c40d3b
--- /dev/null
+++ b/arch/arm/include/asm/arch-stih410/sys_proto.h
@@ -0,0 +1,11 @@
+/*
+ * Copyright (c) 2017
+ * Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _ASM_ARCH_SYS_PROTO_H
+#define _ASM_ARCH_SYS_PROTO_H
+
+#endif /* _ASM_ARCH_SYS_PROTO_H */
diff --git a/doc/device-tree-bindings/usb/dwc3-st.txt 
b/doc/device-tree-bindings/usb/dwc3-st.txt
new file mode 100644
index 000..a26a139
--- /dev/null
+++ b/doc/device-tree-bindings/usb/dwc3-st.txt
@@ -0,0 +1,60 @@
+ST DWC3 glue logic
+
+This file documents the parameters for the dwc3-st driver.
+This driver controls the glue logic used to configure the dwc3 core on
+STiH407 based platforms.
+
+Required properties:
+ - compatible  : must be "st,stih407-dwc3"
+ - reg : glue logic base address and USB syscfg ctrl register offset
+ - reg-names   : should be "reg-glue" and "syscfg-reg"
+ - st,syscon   : should be phandle to system configuration node which
+ encompasses the glue registers
+ - resets  : list of phandle and reset specifier pairs. There should be 
two entries, one
+ for the powerdown and softreset lines of the usb3 IP
+ - reset-names : list of reset signal names. Names should be "powerdown" and 
"softreset"
+
+ - #address-cells, #size-cells : should be '1' if the device has sub-nodes
+   with 'reg' property
+
+ - pinctl-names: A pinctrl state named "default" must be defined
+
+ - pinctrl-0   : Pin control group
+
+ - ranges  : allows valid 1:1 translation between child's address space and
+ parent's address space
+
+Sub-nodes:
+The dwc3 core should be added as subnode to ST DWC3 glue as shown in the
+example below.
+
+NB: The dr_mode property is NOT optional for this driver, as the default value
+is "otg", which isn't supported by this SoC. Valid dr_mode values for dwc3-st 
are
+either "host" or "device".
+
+Example:
+
+st_dwc3: dwc3@8f94000 {
+   status  = "disabled";
+   compatible  = "st,stih407-dwc3";
+   reg = <0x08f94000 0x1000>, <0x110 0x4>;
+   reg-names   = "reg-glue", "syscfg-reg";
+   st,syscfg   = <_core>;
+   resets  = < STIH407_USB3_POWERDOWN>,
+ < STIH407_MIPHY2_SOFTRESET>;
+   reset-names = "powerdown", "softreset";
+   #address-cells  = <1>;
+   #size-cells = <1>;
+   pinctrl-names   = "default";
+   pinctrl-0   = <_usb3>;
+   ranges;
+
+   dwc3: dwc3@990 {
+   compatible  = "snps,dwc3";
+   reg = <0x0990 0x10>;
+   interrupts  = ;
+   dr_mode = "host";
+   phy-names   = "usb2-phy", "usb3-phy";
+   phys= <_picophy2>, <_port2 PHY_TYPE_USB3>;
+   };
+};
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 40ff830..6be40b8 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -66,7 +66,7 @@ obj-$(CONFIG_USB_XHCI_FSL) += xhci-fsl.o
 obj-$(CONFIG_USB_XHCI_MVEBU) += xhci-mvebu.o
 obj-$(CONFIG_USB_XHCI_OMAP) += xhci-omap.o
 obj-$(CONFIG_USB_XHCI_PCI) += xhci-pci.o
-obj-$(CONFIG_USB_XHCI_STI) += xhci-sti.o
+obj-$(CONFIG_USB_XHCI_STI) += xhci-sti.o dwc3-sti-glue.o
 
 # designware
 obj-$(CONFIG_USB_DWC2) += dwc2.o
diff --git a/drivers/usb/host/dwc3-sti-glue.c b/drivers/usb/host/dwc3-sti-glue.c
new file mode 100644
index 000..368d7ef
--- /dev/null
+++ b/drivers/usb/host/dwc3-sti-glue.c
@@ -0,0 +1,278 @@
+/*
+ * STiH407 family DWC3 specific Glue layer
+ *
+ * Copyright (c) 2017
+ *

[U-Boot] [PATCH v3 01/13] mmc: sti_sdhci: Rework sti_mmc_core_config()

2017-03-28 Thread patrice.chotard

From: Patrice Chotard 

Use struct udevice* as input parameter. Previous
parameters are retrieved through plat and priv data.

This to prepare to use the reset framework.

Signed-off-by: Patrice Chotard 
Reviewed-by: Jaehoon Chung 
---
 drivers/mmc/sti_sdhci.c | 33 ++---
 1 file changed, 18 insertions(+), 15 deletions(-)

diff --git a/drivers/mmc/sti_sdhci.c b/drivers/mmc/sti_sdhci.c
index 2a07082..d6c4d67 100644
--- a/drivers/mmc/sti_sdhci.c
+++ b/drivers/mmc/sti_sdhci.c
@@ -16,6 +16,7 @@ DECLARE_GLOBAL_DATA_PTR;
 struct sti_sdhci_plat {
struct mmc_config cfg;
struct mmc mmc;
+   int instance;
 };
 
 /*
@@ -26,8 +27,8 @@ struct sti_sdhci_plat {
 
 /**
  * sti_mmc_core_config: configure the Arasan HC
- * @regbase: base address
- * @mmc_instance: mmc instance id
+ * @dev : udevice
+ *
  * Description: this function is to configure the Arasan MMC HC.
  * This should be called when the system starts in case of, on the SoC,
  * it is needed to configure the host controller.
@@ -36,33 +37,35 @@ struct sti_sdhci_plat {
  * W/o these settings the SDHCI could configure and use the embedded controller
  * with limited features.
  */
-static void sti_mmc_core_config(const u32 regbase, int mmc_instance)
+static void sti_mmc_core_config(struct udevice *dev)
 {
+   struct sti_sdhci_plat *plat = dev_get_platdata(dev);
+   struct sdhci_host *host = dev_get_priv(dev);
unsigned long *sysconf;
 
/* only MMC1 has a reset line */
-   if (mmc_instance) {
+   if (plat->instance) {
sysconf = (unsigned long *)(STIH410_SYSCONF5_BASE +
  ST_MMC_CCONFIG_REG_5);
generic_set_bit(SYSCONF_MMC1_ENABLE_BIT, sysconf);
}
 
writel(STI_FLASHSS_MMC_CORE_CONFIG_1,
-  regbase + FLASHSS_MMC_CORE_CONFIG_1);
+  host->ioaddr + FLASHSS_MMC_CORE_CONFIG_1);
 
-   if (mmc_instance) {
+   if (plat->instance) {
writel(STI_FLASHSS_MMC_CORE_CONFIG2,
-  regbase + FLASHSS_MMC_CORE_CONFIG_2);
+  host->ioaddr + FLASHSS_MMC_CORE_CONFIG_2);
writel(STI_FLASHSS_MMC_CORE_CONFIG3,
-  regbase + FLASHSS_MMC_CORE_CONFIG_3);
+  host->ioaddr + FLASHSS_MMC_CORE_CONFIG_3);
} else {
writel(STI_FLASHSS_SDCARD_CORE_CONFIG2,
-  regbase + FLASHSS_MMC_CORE_CONFIG_2);
+  host->ioaddr + FLASHSS_MMC_CORE_CONFIG_2);
writel(STI_FLASHSS_SDCARD_CORE_CONFIG3,
-  regbase + FLASHSS_MMC_CORE_CONFIG_3);
+  host->ioaddr + FLASHSS_MMC_CORE_CONFIG_3);
}
writel(STI_FLASHSS_MMC_CORE_CONFIG4,
-  regbase + FLASHSS_MMC_CORE_CONFIG_4);
+  host->ioaddr + FLASHSS_MMC_CORE_CONFIG_4);
 }
 
 static int sti_sdhci_probe(struct udevice *dev)
@@ -70,7 +73,7 @@ static int sti_sdhci_probe(struct udevice *dev)
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct sti_sdhci_plat *plat = dev_get_platdata(dev);
struct sdhci_host *host = dev_get_priv(dev);
-   int ret, mmc_instance;
+   int ret;
 
/*
 * identify current mmc instance, mmc1 has a reset, not mmc0
@@ -79,11 +82,11 @@ static int sti_sdhci_probe(struct udevice *dev)
 */
 
if (fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "resets", NULL))
-   mmc_instance = 1;
+   plat->instance = 1;
else
-   mmc_instance = 0;
+   plat->instance = 0;
 
-   sti_mmc_core_config((const u32) host->ioaddr, mmc_instance);
+   sti_mmc_core_config(dev);
 
host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD |
   SDHCI_QUIRK_32BIT_DMA_ADDR |
-- 
1.9.1

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[U-Boot] [PATCH v3 00/13] STiH410-B2260: add reset, usb and fastboot support

2017-03-28 Thread patrice.chotard

From: Patrice Chotard 

This series adds :
_ update existing sdhci driver to use reset framework
_ add usb phy driver
_ add ehci support
_ add ohci support
_ add xhci support
_ add fastboot support

With all this feature enable, it's now possible to 
_ boot on usb mass storage device
_ boot from kernel image and dtb previously loaded using tftp
_ update mmc partiton using fastboot

v3: _ remove reset driver (already applied on u-boot-dm tree by Simon
  Glass)
_ patch 4: add new USB PHY uclass requested by Simon Glass
_ patch 5: convert STi usb phy driver to new USB PHY uclass
_ patch 6/7: update echi/ohci drivers to use USB PHY uclass
_ patch 8/9: rework xhci-sti.c and dwc3-sti.c. Previously, xhci-sti 
driver binded
  dwc3-sti (STi glue driver) which was not correct. Now we respect the 
device 
  tree hierarchy, ie the STi dwc3 glue driver is first probed, then 
bind the
  xhci-sti driver.

v2: _ add Reviewed-by: Jaehoon Chung  in patches 
2,3 and 4
_ fix remarks done by Marek Vasut :
_ patch 5 : replace bitfield_replace() by clrsetbits_le32()
_ patch 6 : update error messages and add remove callback
_ patch 8 : put board specific defines in a separate patch
_ patch 7: use setbits_le32() instead of read, modify, write
  sequence and add missing parenthesis
_ squash previous patches 7,9,11,12,14,16,17,18,19,20 and 21
  in patch 14

Patrice Chotard (13):
  mmc: sti_sdhci: Rework sti_mmc_core_config()
  ARM: dts: stih410-family: Add missing reset_names for mmc1 node
  mmc: sti_sdhci: Use reset framework
  dm: usb: Add a uclass for USB PHY
  usb: phy: Add STi USB2 PHY
  usb: ehci: Add STi ehci support
  usb: ohci: Add STi ohci support
  usb: xhci: Add STi xhci support
  usb: dwc3: Add dwc3 glue driver support for STi
  board: STiH410-B2260: add OHCI and XHCI related defines
  board: STiH410-B2260: add fastboot support
  STiH410-B2260: enable USB Host Networking
  STiH410-B2260: enable USB, fastboot, reset related flags

 arch/arm/dts/stih407-family.dtsi |   1 +
 arch/arm/include/asm/arch-stih410/sys_proto.h|  11 +
 board/st/stih410-b2260/board.c   |  44 
 configs/stih410-b2260_defconfig  |  36 ++-
 doc/device-tree-bindings/phy/phy-stih407-usb.txt |  24 ++
 doc/device-tree-bindings/usb/dwc3-st.txt |  60 +
 drivers/mmc/sti_sdhci.c  |  60 +++--
 drivers/usb/Kconfig  |   4 +
 drivers/usb/host/Kconfig |  26 +++
 drivers/usb/host/Makefile|   3 +
 drivers/usb/host/dwc3-sti-glue.c | 278 +++
 drivers/usb/host/ehci-sti.c  | 116 ++
 drivers/usb/host/ohci-sti.c  |  93 
 drivers/usb/host/xhci-sti.c  | 114 ++
 drivers/usb/phy/Kconfig  |  19 ++
 drivers/usb/phy/Makefile |   2 +
 drivers/usb/phy/sti_usb_phy.c| 181 +++
 drivers/usb/phy/usb_phy_uclass.c |  90 
 include/configs/stih410-b2260.h  |  16 ++
 include/dm/uclass-id.h   |   1 +
 include/dwc3-sti-glue.h  |  43 
 include/usb_phy-uclass.h |  42 
 include/usb_phy.h| 112 +
 23 files changed, 1350 insertions(+), 26 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-stih410/sys_proto.h
 create mode 100644 doc/device-tree-bindings/phy/phy-stih407-usb.txt
 create mode 100644 doc/device-tree-bindings/usb/dwc3-st.txt
 create mode 100644 drivers/usb/host/dwc3-sti-glue.c
 create mode 100644 drivers/usb/host/ehci-sti.c
 create mode 100644 drivers/usb/host/ohci-sti.c
 create mode 100644 drivers/usb/host/xhci-sti.c
 create mode 100644 drivers/usb/phy/Kconfig
 create mode 100644 drivers/usb/phy/sti_usb_phy.c
 create mode 100644 drivers/usb/phy/usb_phy_uclass.c
 create mode 100644 include/dwc3-sti-glue.h
 create mode 100644 include/usb_phy-uclass.h
 create mode 100644 include/usb_phy.h

-- 
1.9.1

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[U-Boot] [PATCH v3 13/13] STiH410-B2260: enable USB, fastboot, reset related flags

2017-03-28 Thread patrice.chotard

From: Patrice Chotard 

Signed-off-by: Patrice Chotard 
---

v2 :_ squash patch 7,9,11,12,14,16,17,18,19,20 and 21

 configs/stih410-b2260_defconfig | 36 
 1 file changed, 32 insertions(+), 4 deletions(-)

diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig
index 4e6942f..b8df85c 100644
--- a/configs/stih410-b2260_defconfig
+++ b/configs/stih410-b2260_defconfig
@@ -2,25 +2,53 @@ CONFIG_ARM=y
 CONFIG_ARCH_STI=y
 CONFIG_IDENT_STRING="STMicroelectronics STiH410-B2260"
 CONFIG_DEFAULT_DEVICE_TREE="stih410-b2260"
+CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SYS_PROMPT="stih410-b2260 => "
+CONFIG_FASTBOOT=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_CMD_FASTBOOT=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FASTBOOT_BUF_ADDR=0x4000
+CONFIG_FASTBOOT_BUF_SIZE=0x3DF0
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_TIMER=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_EXT4_WRITE=y
+# CONFIG_ISO_PARTITION is not set
 CONFIG_OF_CONTROL=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
+CONFIG_MISC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_STI=y
 CONFIG_PINCTRL=y
+CONFIG_STI_RESET=y
 CONFIG_STI_ASC_SERIAL=y
 CONFIG_SYSRESET=y
 CONFIG_TIMER=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_STI=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="STMicroelectronics"
+CONFIG_G_DNL_VENDOR_NUM=0x483
+CONFIG_G_DNL_PRODUCT_NUM=0x7270
+CONFIG_USB_PHY=y
+CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_SPL_OF_LIBFDT=y
-- 
1.9.1

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[U-Boot] [PATCH v3 12/13] STiH410-B2260: enable USB Host Networking

2017-03-28 Thread patrice.chotard

From: Patrice Chotard 

Signed-off-by: Patrice Chotard 
---
 include/configs/stih410-b2260.h | 12 
 1 file changed, 12 insertions(+)

diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h
index 3df0e04..6c84e9b 100644
--- a/include/configs/stih410-b2260.h
+++ b/include/configs/stih410-b2260.h
@@ -52,8 +52,20 @@
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
+/* USB Configs */
 #define CONFIG_USB_OHCI_NEW
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
 
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+#define CONFIG_USB_ETHER_MCS7830
+#define CONFIG_USB_ETHER_SMSC95XX
+
+/* NET Configs */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+
 #endif /* __CONFIG_H */
-- 
1.9.1

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[U-Boot] [PATCH v3 04/13] dm: usb: Add a uclass for USB PHY

2017-03-28 Thread patrice.chotard

From: Patrice Chotard 

This is a basic implementation of USB PHY which
define a standard API that link USB PHY client to
USB PHY driver controller.

Signed-off-by: Patrice Chotard 
---

v3: _ this patch intoduce new USB PHY uclass

 drivers/usb/Kconfig  |   4 ++
 drivers/usb/phy/Kconfig  |  10 
 drivers/usb/phy/Makefile |   1 +
 drivers/usb/phy/usb_phy_uclass.c |  90 +++
 include/dm/uclass-id.h   |   1 +
 include/usb_phy-uclass.h |  42 +++
 include/usb_phy.h| 112 +++
 7 files changed, 260 insertions(+)
 create mode 100644 drivers/usb/phy/Kconfig
 create mode 100644 drivers/usb/phy/usb_phy_uclass.c
 create mode 100644 include/usb_phy-uclass.h
 create mode 100644 include/usb_phy.h

diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index da3ec2f..e30c9d6 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -94,4 +94,8 @@ endif
 
 source "drivers/usb/gadget/Kconfig"
 
+comment "USB PHY"
+
+source "drivers/usb/phy/Kconfig"
+
 endif
diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
new file mode 100644
index 000..0539401
--- /dev/null
+++ b/drivers/usb/phy/Kconfig
@@ -0,0 +1,10 @@
+menu "USB PHY drivers"
+
+config USB_PHY
+   bool "Enable driver model for USB PHY drivers"
+   depends on DM
+   help
+ Enable driver model for USB PHY access. It defines basic
+ init and exit API.
+
+endmenu
diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
index 4e548c2..5314dcb 100644
--- a/drivers/usb/phy/Makefile
+++ b/drivers/usb/phy/Makefile
@@ -5,6 +5,7 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 
+obj-$(CONFIG_USB_PHY) += usb_phy_uclass.o
 obj-$(CONFIG_TWL4030_USB) += twl4030.o
 obj-$(CONFIG_OMAP_USB_PHY) += omap_usb_phy.o
 obj-$(CONFIG_ROCKCHIP_USB2_PHY) += rockchip_usb2_phy.o
diff --git a/drivers/usb/phy/usb_phy_uclass.c b/drivers/usb/phy/usb_phy_uclass.c
new file mode 100644
index 000..11da635
--- /dev/null
+++ b/drivers/usb/phy/usb_phy_uclass.c
@@ -0,0 +1,90 @@
+/*
+ * Copyright (c) 2017
+ * Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static inline struct usb_phy_ops *usb_phy_dev_ops(struct udevice *dev)
+{
+   return (struct usb_phy_ops *)dev->driver->ops;
+}
+
+int usb_phy_get_by_index(struct udevice *dev, int index,
+struct usb_phy_desc *usb_phy_desc)
+{
+   struct fdtdec_phandle_args args;
+   int ret;
+   struct udevice *dev_usb_phy;
+
+   debug("%s(dev=%p, index=%d, usb_phy_desc=%p)\n", __func__, dev, index,
+ usb_phy_desc);
+
+   ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, dev_of_offset(dev),
+"phys", "#phy-cells", 0,
+index, );
+   if (ret) {
+   debug("%s: fdtdec_parse_phandle_with_args failed: %d\n",
+ __func__, ret);
+   return ret;
+   }
+
+   ret = uclass_get_device_by_of_offset(UCLASS_USB_PHY, args.node,
+_usb_phy);
+   if (ret) {
+   debug("%s: uclass_get_device_by_of_offset failed: %d\n",
+ __func__, ret);
+   return ret;
+   }
+
+   usb_phy_desc->dev = dev_usb_phy;
+
+   return 0;
+}
+
+int usb_phy_get_by_name(struct udevice *dev, const char *name,
+   struct usb_phy_desc *usb_phy_desc)
+{
+   int index;
+
+   debug("%s(dev=%p, name=%s, usb_phy_desc=%p)\n", __func__, dev, name,
+ usb_phy_desc);
+
+   index = fdt_stringlist_search(gd->fdt_blob, dev_of_offset(dev),
+ "phy-names", name);
+   if (index < 0) {
+   debug("fdt_stringlist_search() failed: %d\n", index);
+   return index;
+   }
+
+   return usb_phy_get_by_index(dev, index, usb_phy_desc);
+}
+
+int usb_phy_init(struct usb_phy_desc *usb_phy_desc)
+{
+   struct usb_phy_ops *ops = usb_phy_dev_ops(usb_phy_desc->dev);
+
+   debug("%s(usb_phy_desc=%p)\n", __func__, usb_phy_desc);
+
+   return ops->init(usb_phy_desc);
+}
+
+int usb_phy_exit(struct usb_phy_desc *usb_phy_desc)
+{
+   struct usb_phy_ops *ops = usb_phy_dev_ops(usb_phy_desc->dev);
+
+   debug("%s(usb_phy_desc=%p)\n", __func__, usb_phy_desc);
+
+   return ops->exit(usb_phy_desc);
+}
+
+UCLASS_DRIVER(usb_phy) = {
+   .id = UCLASS_USB_PHY,
+   .name   = "usb_phy",
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 8c92d0b..feb6689 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -80,6 +80,7 @@ enum uclass_id {
UCLASS_USB, /* USB bus */
UCLASS_USB_DEV_GENERIC, /* USB generic device */

[U-Boot] [PATCH v3 10/13] board: STiH410-B2260: add OHCI and XHCI related defines

2017-03-28 Thread patrice.chotard

From: Patrice Chotard 

Signed-off-by: Patrice Chotard 
---

v3: _ squas patches 8 and 10

 include/configs/stih410-b2260.h | 4 
 1 file changed, 4 insertions(+)

diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h
index 6f4070f..3df0e04 100644
--- a/include/configs/stih410-b2260.h
+++ b/include/configs/stih410-b2260.h
@@ -52,4 +52,8 @@
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
+#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
+
 #endif /* __CONFIG_H */
-- 
1.9.1

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[U-Boot] [PATCH 3/3] board: STiH410-B2260: set ramdisk_addr_r to 0x48000000

2017-03-31 Thread patrice.chotard

From: Lee Jones 

Signed-off-by: Lee Jones 
---
 include/configs/stih410-b2260.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h
index ccbbf32..b83bef5 100644
--- a/include/configs/stih410-b2260.h
+++ b/include/configs/stih410-b2260.h
@@ -44,6 +44,7 @@
"scriptaddr=0x5000\0"   \
"fdt_high=0x\0" \
"initrd_high=0x\0"  \
+   "ramdisk_addr_r=0x4800\0"   \
BOOTENV
 
 
-- 
1.9.1

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[U-Boot] [PATCH 0/3] STiH410-B2260: update environment/configuration settings

2017-03-31 Thread patrice.chotard

From: Patrice Chotard 

Update the CONFIG_EXTRA_ENV_SETTINGS, BOOT_TARGET_DEVICES and CONFIG_BOOTARGS
Fix SDRAM size

This series depends on series "[PATCH v3 00/13] STiH410-B2260: add reset,
usb and fastboot support" [1]. Hence this series must be applied when [1]
will be merged.

[1] 
http://u-boot.10912.n7.nabble.com/PATCH-v3-00-13-STiH410-B2260-add-reset-usb-and-fastboot-support-td285525.html

Lee Jones (1):
  board: STiH410-B2260: set ramdisk_addr_r to 0x4800

Nicolas Le Bayon (1):
  board: STiH410-B2260: fix sdram size

Patrice Chotard (1):
  board: STiH410-B2260: update environment variable

 include/configs/stih410-b2260.h | 34 +++---
 1 file changed, 27 insertions(+), 7 deletions(-)

-- 
1.9.1

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[U-Boot] [PATCH 2/3] board: STiH410-B2260: fix sdram size

2017-03-31 Thread patrice.chotard

From: Nicolas Le Bayon 

32MB are reserved for Trusted Zone purpose

Signed-off-by: Nicolas Le Bayon 
---
 include/configs/stih410-b2260.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h
index 7fcb327..ccbbf32 100644
--- a/include/configs/stih410-b2260.h
+++ b/include/configs/stih410-b2260.h
@@ -14,7 +14,7 @@
 #define CONFIG_NR_DRAM_BANKS   1
 #define PHYS_SDRAM_1   0x4000
 #define CONFIG_SYS_SDRAM_BASE  PHYS_SDRAM_1
-#define PHYS_SDRAM_1_SIZE  0x3FE0
+#define PHYS_SDRAM_1_SIZE  0x3E00
 #define CONFIG_SYS_TEXT_BASE   0x7D60
 #define CONFIG_SYS_LOAD_ADDR   PHYS_SDRAM_1/* default load addr */
 
-- 
1.9.1

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[U-Boot] [PATCH 1/3] board: STiH410-B2260: update environment variable

2017-03-31 Thread patrice.chotard

From: Patrice Chotard 

Signed-off-by: Patrice Chotard 
---
 include/configs/stih410-b2260.h | 31 +--
 1 file changed, 25 insertions(+), 6 deletions(-)

diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h
index 6c84e9b..7fcb327 100644
--- a/include/configs/stih410-b2260.h
+++ b/include/configs/stih410-b2260.h
@@ -20,13 +20,32 @@
 
 #define CONFIG_SYS_HZ_CLOCK10  /* 1 GHz */
 
-#define CONFIG_BOOTARGS
\
-   "console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
-
+#include 
 /* Environment */
-#define CONFIG_EXTRA_ENV_SETTINGS \
-   "board= B2260" \
-   "load_addr= #CONFIG_SYS_LOAD_ADDR \0"
+
+/* we assume that rootfs is located on second partition formatted in ext4 */
+#define CONFIG_BOOTARGS\
+   "console=ttyAS1,115200 CONSOLE=/dev/ttyAS1 consoleblank=0 
root=/dev/mmcblk0p2 rootfstype=ext4 rw rootwait mem=992M@0x4000 
vmalloc=256m"
+
+#define CONFIG_LOADADDRCONFIG_SYS_LOAD_ADDR
+
+#define CONFIG_ENV_VARS_UBOOT_CONFIG
+
+#define BOOT_TARGET_DEVICES(func) \
+   func(MMC, mmc, 0) \
+   func(USB, usb, 0) \
+   func(DHCP, dhcp, na)
+#include 
+#define CONFIG_BOOTFILE"uImage"
+#define CONFIG_EXTRA_ENV_SETTINGS  \
+   "kernel_addr_r=0x4000\0"\
+   "fdtfile=stih410-b2260.dtb\0"   \
+   "fdt_addr_r=0x4700\0"   \
+   "scriptaddr=0x5000\0"   \
+   "fdt_high=0x\0" \
+   "initrd_high=0x\0"  \
+   BOOTENV
+
 
 #define CONFIG_ENV_IS_NOWHERE
 #define CONFIG_ENV_SIZE 0x4000
-- 
1.9.1

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[U-Boot] [PATCH 20/21] STiH410-B2260: enable CMD_GPT

2017-03-17 Thread patrice.chotard

From: Patrice Chotard 

Signed-off-by: Patrice Chotard 
---
 configs/stih410-b2260_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig
index 90de12a..4c6a0a1 100644
--- a/configs/stih410-b2260_defconfig
+++ b/configs/stih410-b2260_defconfig
@@ -15,6 +15,7 @@ CONFIG_FASTBOOT_BUF_SIZE=0x3DF0
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 # CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_DHCP=y
-- 
1.9.1

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[U-Boot] [PATCH 14/21] STiH410-B2260: enable DWC3 support

2017-03-17 Thread patrice.chotard

From: Patrice Chotard 

Signed-off-by: Patrice Chotard 
---
 configs/stih410-b2260_defconfig | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig
index fd13ea3..6deca22 100644
--- a/configs/stih410-b2260_defconfig
+++ b/configs/stih410-b2260_defconfig
@@ -35,5 +35,8 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_OHCI_STI=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_DWC3_STI=y
 CONFIG_USB_STORAGE=y
 CONFIG_SPL_OF_LIBFDT=y
-- 
1.9.1

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[U-Boot] [PATCH 06/21] usb: ehci: Add STi ehci support

2017-03-17 Thread patrice.chotard

From: Patrice Chotard 

Add support for on-chip ehci controller available
on STMicrolectronics SoCs.
ehci support will be then available on both type A
USB 2.0 connectors.

Signed-off-by: Patrice Chotard 
---
 drivers/usb/host/Kconfig|  9 +
 drivers/usb/host/Makefile   |  1 +
 drivers/usb/host/ehci-sti.c | 91 +
 3 files changed, 101 insertions(+)
 create mode 100644 drivers/usb/host/ehci-sti.c

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 5129a57..d66f49e 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -120,6 +120,15 @@ config USB_EHCI_MSM
  This driver supports combination of Chipidea USB controller
  and Synapsys USB PHY in host mode only.
 
+config USB_EHCI_STI
+   bool "Support for STMicroelectronics on-chip EHCI USB controller"
+   depends on ARCH_STI
+   select STI_PHY_USB
+   default y
+   ---help---
+ Enables support for the on-chip EHCI controller on
+ STMicroelectronics SoCs.
+
 config USB_EHCI_ZYNQ
bool "Support for Xilinx Zynq on-chip EHCI USB controller"
depends on ARCH_ZYNQ
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 58c0cf5..303aa32 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -46,6 +46,7 @@ obj-$(CONFIG_USB_EHCI_MARVELL) += ehci-marvell.o
 obj-$(CONFIG_USB_EHCI_MSM) += ehci-msm.o
 obj-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o
 obj-$(CONFIG_USB_EHCI_SPEAR) += ehci-spear.o
+obj-$(CONFIG_USB_EHCI_STI) += ehci-sti.o
 obj-$(CONFIG_USB_EHCI_SUNXI) += ehci-sunxi.o
 obj-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o
 obj-$(CONFIG_USB_EHCI_VCT) += ehci-vct.o
diff --git a/drivers/usb/host/ehci-sti.c b/drivers/usb/host/ehci-sti.c
new file mode 100644
index 000..89ca66a
--- /dev/null
+++ b/drivers/usb/host/ehci-sti.c
@@ -0,0 +1,91 @@
+/*
+ * Copyright (c) 2017
+ * Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include "ehci.h"
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct sti_ehci_priv {
+   struct ehci_ctrl ctrl;
+   struct reset_ctl power_ctl;
+   struct reset_ctl softreset_ctl;
+};
+
+static int sti_ehci_probe(struct udevice *dev)
+{
+   struct sti_ehci_priv *priv = dev_get_priv(dev);
+   struct ehci_hccr *hccr = priv->ctrl.hccr;
+   struct ehci_hcor *hcor;
+   struct udevice *dev_phy;
+   int ret, phy_node;
+
+   hccr = (struct ehci_hccr *)dev_get_addr(dev);
+
+   if (hccr == (void *)FDT_ADDR_T_NONE)
+   return -EINVAL;
+
+   ret = reset_get_by_name(dev, "power", >power_ctl);
+   if (ret) {
+   error("can't get power reset for %s (%d)", dev->name, ret);
+   return ret;
+   }
+
+   ret = reset_get_by_name(dev, "softreset", >softreset_ctl);
+   if (ret) {
+   error("can't get soft reset for %s (%d)", dev->name, ret);
+   return ret;
+   }
+
+   ret = reset_deassert(>power_ctl);
+   if (ret < 0) {
+   error("EHCI power reset deassert failed: %d", ret);
+   return ret;
+   }
+
+   ret = reset_deassert(>softreset_ctl);
+   if (ret < 0) {
+   error("EHCI soft reset deassert failed: %d", ret);
+   return ret;
+   }
+
+   /* get phy node */
+   phy_node = fdtdec_lookup_phandle(gd->fdt_blob, dev->of_offset, "phys");
+   if (phy_node <= 0) {
+   error("Not found usb phy device\n");
+   return -ENODEV;
+   }
+
+   /* probe associated phy */
+   ret = uclass_get_device_by_of_offset(UCLASS_MISC, phy_node, _phy);
+
+   hcor = (struct ehci_hcor *)((phys_addr_t)hccr +
+   HC_LENGTH(ehci_readl(&(hccr)->cr_capbase)));
+
+   return ehci_register(dev, hccr, hcor, NULL, 0, USB_INIT_HOST);
+}
+
+static const struct udevice_id sti_usb_ids[] = {
+   { .compatible = "st,st-ehci-300x" },
+   { }
+};
+
+U_BOOT_DRIVER(ehci_sti) = {
+   .name = "ehci_sti",
+   .id = UCLASS_USB,
+   .of_match = sti_usb_ids,
+   .probe = sti_ehci_probe,
+   .remove = ehci_deregister,
+   .ops = _usb_ops,
+   .priv_auto_alloc_size = sizeof(struct sti_ehci_priv),
+   .flags  = DM_FLAG_ALLOC_PRIV_DMA,
+};
-- 
1.9.1

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[U-Boot] [PATCH 13/21] usb: dwc3: Add dwc3 support for STi

2017-03-17 Thread patrice.chotard

From: Patrice Chotard 

This patch adds the ST glue logic to manage the DWC3 HC
on STiH407 SoC family. It configures the internal glue
logic and syscfg registers.

Part of this code been extracted from kernel.org driver
(drivers/usb/dwc3/dwc3-st.c)

Signed-off-by: Patrice Chotard 
---
 arch/arm/include/asm/arch-stih410/sys_proto.h |  11 +++
 drivers/usb/dwc3/Kconfig  |   8 ++
 drivers/usb/dwc3/Makefile |   1 +
 drivers/usb/dwc3/dwc3-sti.c   | 137 ++
 include/dwc3-sti-uboot.h  |  50 ++
 5 files changed, 207 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-stih410/sys_proto.h
 create mode 100644 drivers/usb/dwc3/dwc3-sti.c
 create mode 100644 include/dwc3-sti-uboot.h

diff --git a/arch/arm/include/asm/arch-stih410/sys_proto.h 
b/arch/arm/include/asm/arch-stih410/sys_proto.h
new file mode 100644
index 000..5c40d3b
--- /dev/null
+++ b/arch/arm/include/asm/arch-stih410/sys_proto.h
@@ -0,0 +1,11 @@
+/*
+ * Copyright (c) 2017
+ * Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _ASM_ARCH_SYS_PROTO_H
+#define _ASM_ARCH_SYS_PROTO_H
+
+#endif /* _ASM_ARCH_SYS_PROTO_H */
diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
index e93398f..51a7a00 100644
--- a/drivers/usb/dwc3/Kconfig
+++ b/drivers/usb/dwc3/Kconfig
@@ -37,6 +37,14 @@ config USB_DWC3_OMAP
 
  Say 'Y' here if you have one such device
 
+config USB_DWC3_STI
+   bool "STMicroelectronics STiH407 family glue driver"
+   help
+ STMicroelectronics STiH407 family SoCs use this IP for
+ USB2/3 functionality.
+
+ Say 'Y' here if you have one such device
+
 menu "PHY Subsystem"
 
 config USB_DWC3_PHY_OMAP
diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile
index 2964bae..753912d 100644
--- a/drivers/usb/dwc3/Makefile
+++ b/drivers/usb/dwc3/Makefile
@@ -11,3 +11,4 @@ obj-$(CONFIG_USB_DWC3_GADGET) += gadget.o ep0.o
 obj-$(CONFIG_USB_DWC3_OMAP)+= dwc3-omap.o
 obj-$(CONFIG_USB_DWC3_PHY_OMAP)+= ti_usb_phy.o
 obj-$(CONFIG_USB_DWC3_PHY_SAMSUNG) += samsung_usb_phy.o
+obj-$(CONFIG_USB_DWC3_STI) += dwc3-sti.o
diff --git a/drivers/usb/dwc3/dwc3-sti.c b/drivers/usb/dwc3/dwc3-sti.c
new file mode 100644
index 000..5ff3e76
--- /dev/null
+++ b/drivers/usb/dwc3/dwc3-sti.c
@@ -0,0 +1,137 @@
+/*
+ * dwc3-sti.c - STiH407 family DWC3 specific Glue layer
+ * Copyright (c) 2017
+ * Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+__weak int __board_usb_init(int index, enum usb_init_type init)
+{
+   return 0;
+}
+/*int board_usb_init(int index, enum usb_init_type init)*/
+/*__attribute__((weak, alias("__board_usb_init")));*/
+
+static int sti_dwc3_drd_init(struct sti_dwc3_platdata *plat)
+{
+   unsigned long val;
+
+   val = readl(plat->syscfg_base + plat->syscfg_offset);
+
+   val &= USB3_CONTROL_MASK;
+
+   switch (plat->mode) {
+   case USB_DR_MODE_PERIPHERAL:
+   val &= ~(USB3_DELAY_VBUSVALID
+   | USB3_SEL_FORCE_OPMODE | USB3_FORCE_OPMODE(0x3)
+   | USB3_SEL_FORCE_DPPULLDOWN2 | USB3_FORCE_DPPULLDOWN2
+   | USB3_SEL_FORCE_DMPULLDOWN2 | USB3_FORCE_DMPULLDOWN2);
+
+   val |= USB3_DEVICE_NOT_HOST | USB3_FORCE_VBUSVALID;
+   break;
+
+   case USB_DR_MODE_HOST:
+   val &= ~(USB3_DEVICE_NOT_HOST | USB3_FORCE_VBUSVALID
+   | USB3_SEL_FORCE_OPMODE | USB3_FORCE_OPMODE(0x3)
+   | USB3_SEL_FORCE_DPPULLDOWN2 | USB3_FORCE_DPPULLDOWN2
+   | USB3_SEL_FORCE_DMPULLDOWN2 | USB3_FORCE_DMPULLDOWN2);
+
+   val |= USB3_DELAY_VBUSVALID;
+   break;
+
+   default:
+   error("Unsupported mode of operation %d\n", plat->mode);
+   return -EINVAL;
+   }
+   return writel(val, plat->syscfg_base + plat->syscfg_offset);
+}
+
+static void sti_dwc3_init(struct sti_dwc3_platdata *plat)
+{
+   unsigned long reg;
+
+   reg = readl(plat->glue_base + CLKRST_CTRL);
+
+   reg |= AUX_CLK_EN | EXT_CFG_RESET_N | XHCI_REVISION;
+   reg &= ~SW_PIPEW_RESET_N;
+
+   writel(reg, plat->glue_base + CLKRST_CTRL);
+
+   /* configure mux for vbus, powerpresent and bvalid signals */
+   reg = readl(plat->glue_base + USB2_VBUS_MNGMNT_SEL1);
+
+   reg |= SEL_OVERRIDE_VBUSVALID(USB2_VBUS_UTMIOTG) |
+  SEL_OVERRIDE_POWERPRESENT(USB2_VBUS_UTMIOTG) |
+  SEL_OVERRIDE_BVALID(USB2_VBUS_UTMIOTG);
+
+   writel(reg, plat->glue_base + USB2_VBUS_MNGMNT_SEL1);
+
+   reg = readl(plat->glue_base + CLKRST_CTRL);
+   reg |=

[U-Boot] [PATCH 09/21] STiH410-B2260: enable OHCI related flags

2017-03-17 Thread patrice.chotard

From: Patrice Chotard 

Signed-off-by: Patrice Chotard 
---
 configs/stih410-b2260_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig
index c2c7256..46c20e1 100644
--- a/configs/stih410-b2260_defconfig
+++ b/configs/stih410-b2260_defconfig
@@ -29,5 +29,7 @@ CONFIG_TIMER=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_STI=y
 CONFIG_USB_STORAGE=y
 CONFIG_SPL_OF_LIBFDT=y
-- 
1.9.1

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[U-Boot] [PATCH 02/21] mmc: sti_sdhci: Rework sti_mmc_core_config()

2017-03-17 Thread patrice.chotard

From: Patrice Chotard 

Use struct udevice* as input parameter. Previous
parameters are retrieved through plat and priv data.

This to prepare to use the reset framework.

Signed-off-by: Patrice Chotard 
---
 drivers/mmc/sti_sdhci.c | 33 ++---
 1 file changed, 18 insertions(+), 15 deletions(-)

diff --git a/drivers/mmc/sti_sdhci.c b/drivers/mmc/sti_sdhci.c
index 2a07082..d6c4d67 100644
--- a/drivers/mmc/sti_sdhci.c
+++ b/drivers/mmc/sti_sdhci.c
@@ -16,6 +16,7 @@ DECLARE_GLOBAL_DATA_PTR;
 struct sti_sdhci_plat {
struct mmc_config cfg;
struct mmc mmc;
+   int instance;
 };
 
 /*
@@ -26,8 +27,8 @@ struct sti_sdhci_plat {
 
 /**
  * sti_mmc_core_config: configure the Arasan HC
- * @regbase: base address
- * @mmc_instance: mmc instance id
+ * @dev : udevice
+ *
  * Description: this function is to configure the Arasan MMC HC.
  * This should be called when the system starts in case of, on the SoC,
  * it is needed to configure the host controller.
@@ -36,33 +37,35 @@ struct sti_sdhci_plat {
  * W/o these settings the SDHCI could configure and use the embedded controller
  * with limited features.
  */
-static void sti_mmc_core_config(const u32 regbase, int mmc_instance)
+static void sti_mmc_core_config(struct udevice *dev)
 {
+   struct sti_sdhci_plat *plat = dev_get_platdata(dev);
+   struct sdhci_host *host = dev_get_priv(dev);
unsigned long *sysconf;
 
/* only MMC1 has a reset line */
-   if (mmc_instance) {
+   if (plat->instance) {
sysconf = (unsigned long *)(STIH410_SYSCONF5_BASE +
  ST_MMC_CCONFIG_REG_5);
generic_set_bit(SYSCONF_MMC1_ENABLE_BIT, sysconf);
}
 
writel(STI_FLASHSS_MMC_CORE_CONFIG_1,
-  regbase + FLASHSS_MMC_CORE_CONFIG_1);
+  host->ioaddr + FLASHSS_MMC_CORE_CONFIG_1);
 
-   if (mmc_instance) {
+   if (plat->instance) {
writel(STI_FLASHSS_MMC_CORE_CONFIG2,
-  regbase + FLASHSS_MMC_CORE_CONFIG_2);
+  host->ioaddr + FLASHSS_MMC_CORE_CONFIG_2);
writel(STI_FLASHSS_MMC_CORE_CONFIG3,
-  regbase + FLASHSS_MMC_CORE_CONFIG_3);
+  host->ioaddr + FLASHSS_MMC_CORE_CONFIG_3);
} else {
writel(STI_FLASHSS_SDCARD_CORE_CONFIG2,
-  regbase + FLASHSS_MMC_CORE_CONFIG_2);
+  host->ioaddr + FLASHSS_MMC_CORE_CONFIG_2);
writel(STI_FLASHSS_SDCARD_CORE_CONFIG3,
-  regbase + FLASHSS_MMC_CORE_CONFIG_3);
+  host->ioaddr + FLASHSS_MMC_CORE_CONFIG_3);
}
writel(STI_FLASHSS_MMC_CORE_CONFIG4,
-  regbase + FLASHSS_MMC_CORE_CONFIG_4);
+  host->ioaddr + FLASHSS_MMC_CORE_CONFIG_4);
 }
 
 static int sti_sdhci_probe(struct udevice *dev)
@@ -70,7 +73,7 @@ static int sti_sdhci_probe(struct udevice *dev)
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct sti_sdhci_plat *plat = dev_get_platdata(dev);
struct sdhci_host *host = dev_get_priv(dev);
-   int ret, mmc_instance;
+   int ret;
 
/*
 * identify current mmc instance, mmc1 has a reset, not mmc0
@@ -79,11 +82,11 @@ static int sti_sdhci_probe(struct udevice *dev)
 */
 
if (fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "resets", NULL))
-   mmc_instance = 1;
+   plat->instance = 1;
else
-   mmc_instance = 0;
+   plat->instance = 0;
 
-   sti_mmc_core_config((const u32) host->ioaddr, mmc_instance);
+   sti_mmc_core_config(dev);
 
host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD |
   SDHCI_QUIRK_32BIT_DMA_ADDR |
-- 
1.9.1

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[U-Boot] [PATCH 04/21] mmc: sti_sdhci: Use reset framework

2017-03-17 Thread patrice.chotard

From: Patrice Chotard 

Signed-off-by: Patrice Chotard 
---
 drivers/mmc/sti_sdhci.c | 31 ++-
 1 file changed, 22 insertions(+), 9 deletions(-)

diff --git a/drivers/mmc/sti_sdhci.c b/drivers/mmc/sti_sdhci.c
index d6c4d67..8b1b2c0 100644
--- a/drivers/mmc/sti_sdhci.c
+++ b/drivers/mmc/sti_sdhci.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -16,6 +17,7 @@ DECLARE_GLOBAL_DATA_PTR;
 struct sti_sdhci_plat {
struct mmc_config cfg;
struct mmc mmc;
+   struct reset_ctl reset;
int instance;
 };
 
@@ -37,17 +39,19 @@ struct sti_sdhci_plat {
  * W/o these settings the SDHCI could configure and use the embedded controller
  * with limited features.
  */
-static void sti_mmc_core_config(struct udevice *dev)
+static int sti_mmc_core_config(struct udevice *dev)
 {
struct sti_sdhci_plat *plat = dev_get_platdata(dev);
struct sdhci_host *host = dev_get_priv(dev);
-   unsigned long *sysconf;
+   int ret;
 
/* only MMC1 has a reset line */
if (plat->instance) {
-   sysconf = (unsigned long *)(STIH410_SYSCONF5_BASE +
- ST_MMC_CCONFIG_REG_5);
-   generic_set_bit(SYSCONF_MMC1_ENABLE_BIT, sysconf);
+   ret = reset_deassert(>reset);
+   if (ret < 0) {
+   error("MMC1 deassert failed: %d", ret);
+   return ret;
+   }
}
 
writel(STI_FLASHSS_MMC_CORE_CONFIG_1,
@@ -66,6 +70,8 @@ static void sti_mmc_core_config(struct udevice *dev)
}
writel(STI_FLASHSS_MMC_CORE_CONFIG4,
   host->ioaddr + FLASHSS_MMC_CORE_CONFIG_4);
+
+   return 0;
 }
 
 static int sti_sdhci_probe(struct udevice *dev)
@@ -80,13 +86,20 @@ static int sti_sdhci_probe(struct udevice *dev)
 * MMC0 is wired to the SD slot,
 * MMC1 is wired on the high speed connector
 */
-
-   if (fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "resets", NULL))
+   if (fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "resets", NULL)) {
plat->instance = 1;
-   else
+   ret = reset_get_by_name(dev, "softreset", >reset);
+   if (ret) {
+   error("can't get reset for %s (%d)", dev->name, ret);
+   return ret;
+   }
+   } else {
plat->instance = 0;
+   }
 
-   sti_mmc_core_config(dev);
+   ret = sti_mmc_core_config(dev);
+   if (ret)
+   return ret;
 
host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD |
   SDHCI_QUIRK_32BIT_DMA_ADDR |
-- 
1.9.1

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[U-Boot] [PATCH 00/21] STiH410-B2260: add reset, usb and fastboot support

2017-03-17 Thread patrice.chotard

From: Patrice Chotard 

This series adds :
_ add reset driver
_ update existing sdhci driver to use reset framework
_ add usb phy driver
_ add ehci support
_ add ohci support
_ add xhci support
_ add fastboot support

With all this feature enable, it's now possible to 
_ boot on usb mass storage device
_ boot from kernel image and dtb previously loaded using tftp
_ update mmc partiton using fastboot

Patrice Chotard (21):
  reset: Add STi reset support
  mmc: sti_sdhci: Rework sti_mmc_core_config()
  ARM: dts: stih410-family: Add missing reset_names for mmc1 node
  mmc: sti_sdhci: Use reset framework
  phy: Add STi phy usb support
  usb: ehci: Add STi ehci support
  STiH410-B2260: enable USB related flags
  usb: ohci: Add STi ohci support
  STiH410-B2260: enable OHCI related flags
  usb: xhci: Add STi xhci support
  STiH410-B2260: enable XHCI related flags
  STiH410-B2260: Enabling USB Host Networking
  usb: dwc3: Add dwc3 support for STi
  STiH410-B2260: enable DWC3 support
  board: STiH410-B2260: add fastboot support
  STiH410-B2260: enable USB download gadget related flags
  STiH410-B2260: enable FASTBOOT related flags
  STiH410-B2260: enable OF_LIBFDT_OVERLAY
  STiH410-B2260: enable CMD_EXT4_WRITE
  STiH410-B2260: enable CMD_GPT
  STiH410-B2260: enable CMD_PART

 arch/arm/Kconfig  |   1 +
 arch/arm/dts/stih407-family.dtsi  |   1 +
 arch/arm/include/asm/arch-stih410/sys_proto.h |  11 +
 board/st/stih410-b2260/board.c|  44 
 configs/stih410-b2260_defconfig   |  33 +++
 drivers/mmc/sti_sdhci.c   |  60 +++--
 drivers/reset/Kconfig |   8 +
 drivers/reset/Makefile|   1 +
 drivers/reset/sti-reset.c | 321 ++
 drivers/usb/Kconfig   |   4 +
 drivers/usb/dwc3/Kconfig  |   8 +
 drivers/usb/dwc3/Makefile |   1 +
 drivers/usb/dwc3/dwc3-sti.c   | 137 +++
 drivers/usb/host/Kconfig  |  26 +++
 drivers/usb/host/Makefile |   3 +
 drivers/usb/host/ehci-sti.c   |  91 
 drivers/usb/host/ohci-sti.c   |  90 
 drivers/usb/host/xhci-sti.c   | 156 +
 drivers/usb/phy/Kconfig   |  11 +
 drivers/usb/phy/Makefile  |   1 +
 drivers/usb/phy/sti_phy_usb.c | 158 +
 include/configs/stih410-b2260.h   |  16 ++
 include/dwc3-sti-uboot.h  |  50 
 23 files changed, 1210 insertions(+), 22 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-stih410/sys_proto.h
 create mode 100644 drivers/reset/sti-reset.c
 create mode 100644 drivers/usb/dwc3/dwc3-sti.c
 create mode 100644 drivers/usb/host/ehci-sti.c
 create mode 100644 drivers/usb/host/ohci-sti.c
 create mode 100644 drivers/usb/host/xhci-sti.c
 create mode 100644 drivers/usb/phy/Kconfig
 create mode 100644 drivers/usb/phy/sti_phy_usb.c
 create mode 100644 include/dwc3-sti-uboot.h

-- 
1.9.1

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[U-Boot] [PATCH 10/21] usb: xhci: Add STi xhci support

2017-03-17 Thread patrice.chotard

From: Patrice Chotard 

Add support for on-chip DWC3 controller available
on STMicrolectronics STiH407 family SoCs.
On B2260 board, the type AB USB connector is managed
by a DWC3 IP. As USB3 signals are not wired, only USB2
is supported.

Signed-off-by: Patrice Chotard 
---
 drivers/usb/host/Kconfig|   8 +++
 drivers/usb/host/Makefile   |   1 +
 drivers/usb/host/xhci-sti.c | 156 
 include/configs/stih410-b2260.h |   1 +
 4 files changed, 166 insertions(+)
 create mode 100644 drivers/usb/host/xhci-sti.c

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 33ded5d..58b64df 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -37,6 +37,14 @@ config USB_XHCI_ROCKCHIP
help
  Enables support for the on-chip xHCI controller on Rockchip SoCs.
 
+config USB_XHCI_STI
+   bool "Support for STMicroelectronics STiH407 family on-chip xHCI USB 
controller"
+   depends on ARCH_STI
+   default y
+   help
+ Enables support for the on-chip xHCI controller on STMicroelectronics
+ STiH407 family SoCs.
+
 config USB_XHCI_ZYNQMP
bool "Support for Xilinx ZynqMP on-chip xHCI USB controller"
depends on ARCH_ZYNQMP
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index b78e632..40ff830 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -66,6 +66,7 @@ obj-$(CONFIG_USB_XHCI_FSL) += xhci-fsl.o
 obj-$(CONFIG_USB_XHCI_MVEBU) += xhci-mvebu.o
 obj-$(CONFIG_USB_XHCI_OMAP) += xhci-omap.o
 obj-$(CONFIG_USB_XHCI_PCI) += xhci-pci.o
+obj-$(CONFIG_USB_XHCI_STI) += xhci-sti.o
 
 # designware
 obj-$(CONFIG_USB_DWC2) += dwc2.o
diff --git a/drivers/usb/host/xhci-sti.c b/drivers/usb/host/xhci-sti.c
new file mode 100644
index 000..00f17ce
--- /dev/null
+++ b/drivers/usb/host/xhci-sti.c
@@ -0,0 +1,156 @@
+/*
+ * Copyright (c) 2017
+ * Patrice Chotard 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "xhci.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct sti_xhci_platdata {
+   struct reset_ctl powerdown_ctl;
+   struct reset_ctl softreset_ctl;
+   phys_addr_t dwc3_regs;
+};
+
+struct sti_xhci_priv {
+   struct xhci_ctrl ctrl;
+};
+
+
+static int sti_xhci_ofdata_to_platdata(struct udevice *dev)
+{
+   struct sti_xhci_platdata *plat = dev_get_platdata(dev);
+   struct udevice *dev_phy;
+   int ret;
+   int phy_node;
+   int dwc3_node;
+   u32 reg[2];
+
+   /* get powerdown reset */
+   ret = reset_get_by_name(dev, "powerdown", >powerdown_ctl);
+   if (ret) {
+   error("can't get powerdown reset for %s (%d)", dev->name, ret);
+   return ret;
+   }
+
+   /* get softreset reset */
+   ret = reset_get_by_name(dev, "softreset", >softreset_ctl);
+   if (ret) {
+   error("can't get soft reset for %s (%d)", dev->name, ret);
+   return ret;
+   }
+
+   /* deassert both powerdown and softreset */
+   ret = reset_deassert(>powerdown_ctl);
+   if (ret < 0) {
+   error("DWC3 powerdown reset deassert failed: %d", ret);
+   return ret;
+   }
+
+   ret = reset_deassert(>softreset_ctl);
+   if (ret < 0) {
+   error("DWC3 soft reset deassert failed: %d", ret);
+   return ret;
+   }
+
+   /* check if dwc3 subnode is present */
+   dwc3_node = fdt_first_subnode(gd->fdt_blob, dev_of_offset(dev));
+   if (dwc3_node <= 0) {
+   error("Can't find subnode for st_dwc3 glue driver\n");
+   return -ENODEV;
+   }
+
+   if (fdt_node_check_compatible(gd->fdt_blob, dwc3_node,
+ "snps,dwc3") != 0) {
+   error("Can't find dwv3 subnode for st_dwc3 glue driver\n");
+   return -ENODEV;
+   }
+
+   /*
+* now parse the dwc3 node
+* first get the phy node: only usb2-phy, no need to get usb3-phy as
+* usb3 is not wired
+*/
+   phy_node = fdtdec_lookup_phandle(gd->fdt_blob, dwc3_node, "phys");
+   if (phy_node <= 0) {
+   error("Can't find usb phy device\n");
+   return -ENODEV;
+   }
+
+   /* get the dwc3 register space base address */
+   if (fdtdec_get_int_array(gd->fdt_blob, dwc3_node, "reg", reg,
+ARRAY_SIZE(reg))) {
+   debug("dwc3 node has bad/missing 'reg' property\n");
+   return -FDT_ERR_NOTFOUND;
+   }
+   plat->dwc3_regs = reg[0];
+
+   /* probe associated phy */
+   return uclass_get_device_by_of_offset(UCLASS_MISC, phy_node, _phy);
+};
+
+static int sti_xhci_core_init(struct dwc3 *dwc3_reg)
+{
+   int ret;
+
+   ret = dwc3_core_init(dwc3_reg);
+

[U-Boot] [PATCH 15/21] board: STiH410-B2260: add fastboot support

2017-03-17 Thread patrice.chotard

From: Patrice Chotard 

Add usb_gadget_handle_interrupts(), board_usb_init(),
board_usb_cleanup() and g_dnl_board_usb_cable_connected()
callbacks needed for FASTBOOT support

Signed-off-by: Patrice Chotard 
---
 board/st/stih410-b2260/board.c | 44 ++
 1 file changed, 44 insertions(+)

diff --git a/board/st/stih410-b2260/board.c b/board/st/stih410-b2260/board.c
index 0c06bca..363c016 100644
--- a/board/st/stih410-b2260/board.c
+++ b/board/st/stih410-b2260/board.c
@@ -7,6 +7,9 @@
  */
 
 #include 
+#include 
+#include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -26,3 +29,44 @@ int board_init(void)
 {
return 0;
 }
+
+#ifdef CONFIG_USB_DWC3
+static struct dwc3_device dwc3_device_data = {
+   .maximum_speed = USB_SPEED_HIGH,
+   .dr_mode = USB_DR_MODE_PERIPHERAL,
+   .index = 0,
+};
+
+int usb_gadget_handle_interrupts(int index)
+{
+   dwc3_uboot_handle_interrupt(index);
+   return 0;
+}
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+   int node;
+   const void *blob = gd->fdt_blob;
+
+   /* find the snps,dwc3 node */
+   node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc3");
+
+   dwc3_device_data.base = fdtdec_get_addr(blob, node, "reg");
+
+   /* init dwc3 glue with mode forced to PERIPHERAL */
+   sti_dwc3_glue_init(USB_DR_MODE_PERIPHERAL);
+
+   return dwc3_uboot_init(_device_data);
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+   dwc3_uboot_exit(index);
+   return 0;
+}
+
+int g_dnl_board_usb_cable_connected(void)
+{
+   return 1;
+}
+#endif
-- 
1.9.1

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