Re: [U-Boot-Users] [PATCH 3/7] ARM: Add arm1176 core with s3c6400 SoC

2008-07-31 Thread Wolfgang Denk
In message [EMAIL PROTECTED] you wrote:
 This is a port of s3c6400 sources by Samsung from u-boot-1.1.6.
 
 Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]

Coding style errors: indentation by space instead of TAB;

...
 +/* * reset the cpu by setting up the watchdog timer and let him time out */
 +void reset_cpu (ulong ignored)
 +{
 + printf(reset... \n\n\n);
 + SW_RST_REG = 0x6400;
 + /* loop forever and wait for reset to happen */
 + while (1)
 + {
 + if (serial_tstc())
 + {
 + serial_getc();
 + break;
 + }
 + }

Incorrect brace style.

...
 diff --git a/cpu/arm1176/s3c64xx/Makefile b/cpu/arm1176/s3c64xx/Makefile
 new file mode 100644
 index 000..0a1201d
 --- /dev/null
 +++ b/cpu/arm1176/s3c64xx/Makefile
 @@ -0,0 +1,46 @@
...
 +include $(TOPDIR)/config.mk
 +
 +LIB  = $(obj)lib$(SOC).a
 +
 +OBJS = interrupts.o
 +#OBJS= nand_cp.o serial.o usb_ohci.o interrupts.o nand.o
 +COBJS-$(CONFIG_S3C6400)  += cpu_init.o speed.o
 +
 +OBJS += $(COBJS-y)
 +
 +all: $(obj).depend $(START) $(LIB)
 +
 +$(LIB):  $(OBJS)
 + $(AR) $(ARFLAGS) $@ $(OBJS)
 +
 +#
 +
 +# defines $(obj).depend target
 +include $(SRCTREE)/rules.mk
 +
 +sinclude .depend

Broken for out-of-tree building. This applies to all your  Makefiles,
I think.



Best regards,

Wolfgang Denk

-- 
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Re: [U-Boot-Users] [PATCH 3/7] ARM: Add arm1176 core with s3c6400 SoC

2008-07-31 Thread Jean-Christophe PLAGNIOL-VILLARD
 +# This program is free software; you can redistribute it and/or
 +# modify it under the terms of the GNU General Public License as
 +# published by the Free Software Foundation; either version 2 of
 +# the License, or (at your option) any later version.
 +#
 +# This program is distributed in the hope that it will be useful,
 +# but WITHOUT ANY WARRANTY; without even the implied warranty of
 +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 +# GNU General Public License for more details.
 +#
 +# You should have received a copy of the GNU General Public License
 +# along with this program; if not, write to the Free Software
 +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 +# MA 02111-1307 USA
 +#
 +PLATFORM_RELFLAGS += -fno-strict-aliasing  -fno-common -ffixed-r8 \
 + -msoft-float
 +
 +# Make ARMv5 to allow more compilers to work, even though its v6.
 +PLATFORM_CPPFLAGS += -march=armv5t
could we do it dynamicly?
 +# =
 +#
 +# Supply options according to compiler version
 +#
 +# =
 +PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32,-mabi=apcs-gnu)
 +PLATFORM_CPPFLAGS +=$(call cc-option,-mno-thumb-interwork,)
 +PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,$(call 
 cc-option,-malignment-traps,))
 diff --git a/cpu/arm1176/cpu.c b/cpu/arm1176/cpu.c
 new file mode 100644
 index 000..54228d1
 --- /dev/null
 +++ b/cpu/arm1176/cpu.c
 @@ -0,0 +1,186 @@
 +/*
 + * (C) Copyright 2004 Texas Insturments
 + *
 + * (C) Copyright 2002
 + * Sysgo Real-Time Solutions, GmbH www.elinos.com
 + * Marius Groeger [EMAIL PROTECTED]
 + *
 + * (C) Copyright 2002
 + * Gary Jennejohn, DENX Software Engineering, [EMAIL PROTECTED]
 + *
 + * See file CREDITS for list of people who contributed to this
 + * project.
 + *

 +{
 + volatile int i;
 +
 + /* Many OMAP regs need at least 2 nops  */
so please use nop
 + for (i = 0; i  100; i++);
 +}
 +
 +/* See also ARM Ref. Man. */
 +#define C1_MMU   (10)  /* mmu off/on */
 +#define C1_ALIGN (11)  /* alignment faults off/on */
 +#define C1_DC(12)  /* dcache off/on */
 +#define C1_WB(13)  /* merging write buffer on/off 
 */
 +#define C1_BIG_ENDIAN(17)  /* big endian off/on */
 +#define C1_SYS_PROT  (18)  /* system protection */
 +#define C1_ROM_PROT  (19)  /* ROM protection */
 +#define C1_IC(112) /* icache off/on */
 +#define C1_HIGH_VECTORS  (113) /* location of vectors: low/high 
 addresses */
 +#define RESERVED_1   (0xf  3)  /* must be 111b for R/W */
 +
 +int cpu_init (void)
 +{
 + return 0;
 +}
 +
 +int cleanup_before_linux (void)
 +{
 + /*
 +  * this function is called just before we call linux
 +  * it prepares the processor for linux
 +  *
 +  * we turn off caches etc ...
 +  */
 +
 + unsigned long i;
 +
 + disable_interrupts ();
 +
 + /* turn off I/D-cache */
 + asm (mrc p15, 0, %0, c1, c0, 0:=r (i));
 + i = ~(C1_DC | C1_IC);
 + asm (mcr p15, 0, %0, c1, c0, 0: :r (i));
why don't you use icache_disable() and dcache_disable()?
 +
 + /* flush I/D-cache */
 + i = 0;
 + asm (mcr p15, 0, %0, c7, c7, 0: :r (i));  /* invalidate both caches 
 and flush btb */
 + asm (mcr p15, 0, %0, c7, c10, 4: :r (i)); /* mem barrier to sync 
 things */
please implement icache_flush() and dcache_flush()
 + return 0;
 +}
 +
 +
 +++ b/cpu/arm1176/s3c64xx/Makefile
 +#include common.h
 +#include asm/proc-armv/ptrace.h
 +#include s3c6400.h
 +
 +static ulong timer_load_val;
 +
 +#define PRESCALER167
 +
 +/* macro to read the 16 bit timer */
 +static inline ulong READ_TIMER(void)
 +{
 + S3C64XX_TIMERS *const timers = S3C64XX_GetBase_TIMERS();
please do not use UPPERCASE var type and function  co
 +
 + return timers-TCNTO4;
 +}
 +
 new file mode 100644
 index 000..f28ebe8
 --- /dev/null
 +++ b/cpu/arm1176/s3c64xx/nand_cp.c
 @@ -0,0 +1,132 @@
 +/*
 + * $Id: nand_cp.c,v 1.3 2007/02/26 06:19:52 yongkal Exp $
please remove
 + *
 + * (C) Copyright 2006 Samsung Electronics
 + *
 + * See file CREDITS for list of people who contributed to this
 + * project.
 + *
 + * This program is free software; you can redistribute it and/or
 + * modify it under the terms of the GNU General Public License as
 + * published by the Free Software Foundation; either version 2 of
 + * the License, or (at your option) any later version.
 + *
 + * This program is distributed in the hope that it will be useful,
 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 + * GNU General Public License for more details.
 + *
 + * You should have received a copy of the GNU General Public License
 + * along with this program; if not, write to the Free Software
 + *