Porting application from libevent
I have several server applications based on libevent ( https://github.com/libevent/libevent) that use high-resolution timers, UDP, and TCP sockets. Right now they run on SR-IOV instances and I would like to port these to DPDK to get access to bonded interfaces. Any advice? I read most of the DPDK Programmer's Guide, and looked at the Event Device Library, but it is quite low-level and will entail a substantial amount of rework. I looked at dpdk-ans (https://github.com/ansyun/dpdk-ans), which provides a socket API on top of DPDK, but it seems to be not recently maintained. I also looked at seastar (https://github.com/scylladb/seastar), which provides an event-driven framework on top of DPDK, but it would require a complete rewrite from libevent to futures and C++17. Any advice would be very much appreciated! -- -Ken
Mellanox & Qlogic & Molex & Intel
Hi , Please help to quote as below, destination: 宁波 China, thanks! 请提供如下价格,货到宁波,谢谢! Quantity(pcs) Item PN Model Part Vendor 100 300 500 Remark 1 MCX512A-ACAT 2x25Gb SFP28 ConnectX-5 EN Adapter Card 10/25GbE PCIe card Mellanox 100 300 500 2 MCX631102AS-ADAT 2x25G SFP28 ConnectX-6 Lx EN Adapter Card 25GbE Crypto Disabled PCIe card Mellanox 100 300 500 二选 一 3 MCX631102AN-ADAT PCIe card Mellanox 100 300 500 6 MCX542B-ACAN ConnectX®-5 EN network interface card for OCP, with host management, 25GbE dual-port SFP28, PCIe3.0 x8, UEFI Enabled, no bracket Halogen free OCP mezz Mellanox 100 300 500 7 MCX545B-CCUN ConnectX®-5 EN 1x 100GbE QSFP28 PCIe 3.0 x16 UEFI Enabled OCP mezz Mellanox 100 300 500 4 QLE2742-SR-CK PCIe 3.0, x8, Dual / 2-ports, 32GFC, SR-Optic, SFP+, Low Profile PCIe card Qlogic 100 300 500 5 QLE2672-CK 16Gb Dual-port FC HBA, PCI-E x8, LC multi-mode optic, Box, 2xSFP included PCIe card Qlogic 100 300 500 6 XXV710DA2OCP1 Ethernet network adaptor for OCP (2x25Gb 2*SPF+ EN Adapter Card 10/25GbE) OCP mezz Intel 60 300 7 BCM957414M4142C NeXtreme M225P network adaptor (2*25Gb SFP28, PCIe3.0 x8 10/25 Gbs) OCP mezz Broadcom 60 300 8 MCX4421A-ACQN Mellanox ConnectX-4 LX EN Network Interface Card For OCP2.0 2x25Гбит/сек Dual Port 2xSFP28 Host Management Mezzanine OCP 2.0 Type 1 PCI-E 3.0(MCX4421A-ACQN) OCP mezz Mellanox 100 300 500 9 205058-3020 NPIO 8x STR to 2* 4x RA, 750mm cable Molex 2000 Yours/Ken k...@whbam.com
[dpdk-users] Question about driver/controller MTU enforcement with MTU less than jumbo frame size
Is it possible to have an MTU enforced on rx that is less than jumbo size frames? >From the DPDK driver code snippet for ixgbe if MTU < 1518 then the jumbo_frame >control bit in the chip is set to 0. The controller manual says the maximum frame size is only meaningful when the jumbo_frame control bit is 1. Does it work to leave jumbo_frame set to 1 but set max frame size to something smaller than the jumbo size of 1518? >From 82559 10 GbE Controller manual, section 8.2.3.22.13, page 669, Max Frame >Size: This field defines the maximum frame size in bytes units from Ethernet MAC addresses up to inclusive the CRC. Frames received that are larger than this value are dropped. This field is meaningful when jumbo frames are enabled (HLREG0.JUMBOEN = 1b). When jumbo frames are not enabled the 82599 uses a hardwired value of 1518 for this field. The MFS does not include the 4 bytes of the VLAN header. Packets with VLAN header can be as large as MFS + 4. When double VLAN is enabled, the device adds 8 to the MFS for any packets. This value has no effect on transmit frames; it is the responsibility of software to limit the size of transmit frames. 10G driver dpdk/drivers/net/ixgbe/ixgbe_ethdev.c: ixgbe_dev_mtu_set(struct rte_ethd_dev *dev, uint16_t mtu) uint32_t frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; /* + 18 */ ETHER_MAX_LEN = 1518 /* switch to jumbo mode if needed */ if (frame_size > ETHER_MAX_LEN) { dev->data->dev_conf.rxmode.jumbo_frame = 1; hlreg0 |= IXGBE_HLREG0_JUMBOEN; } else { dev->data->dev_conf.rxmode.jumbo_frame = 0; hlreg0 &= ~IXGBE_HLREG0_JUMBOEN; } IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0); /* update max frame size */ dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size; maxfrs = IXGBE_READ_REG(hw, IXGBE_MAXFRS); maxfrs &= 0x; maxfrs |= (dev->data->dev_conf.rxmode.max_rx_pkt_len << 16); IXGBE_WRITE_REG(hw, IXGBE_MAXFRS, maxfrs); Ken Coulson Software Engineer 509-242-9273 Ciena