Re: [Scilab-users] Sockets in scilab 6.0

2018-07-12 Thread James Holland
The tcl script that I'm running is below. It always returns datareadyflag =
-1 even though it should stay in the loop until there is data to collect.


#declare variables
set outStr "*IDN?"
set dataReadyFlag 1
set tclDataReceived "noData"

#/
#open a connection

set tclsocket1 [socket "192.168.1.72" 3000]

fconfigure $tclsocket1 -blocking 0 -translation binary

#/
#send a command

puts $tclsocket1 $outStr

flush $tclsocket1

after 100


#/
#get a response

while {dataReadyFlag>=0} {
set $dataReadyFlag [gets $tclsocket1 tclDataReceived]
puts "tclDataReceived $tclDataReceived"
}

#output to console
puts "dataReadyFlag $dataReadyFlag"
puts "done" 




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Re: [Scilab-users] From Xcos model to DLL

2018-07-12 Thread Grzegorz Skiba
Dear Qian,

If you need out of the box solution for rapid control prototyping and data
acquisition you can check MicroDAQ toolbox [1]. It features automatic code
generation for MicroDAQ DSP processor, Xcos blocks for ADC, DAC, Encoder,
PWM, DIO,... real-time data access with standard Xcos sink block,
legacy/custom C code integration, target execution profiling, standalone
DSP application generation, data acquisition functionality.

[1]: https://atoms.scilab.org/toolboxes/microdaq/1.2.1

Grzegorz

2018-07-12 18:47 GMT+02:00 Q Z :

> Hi Clément,
>
> Thanks for the suggestions! I have tried the code generator in Xcos.
> However, it seems the C code was generated to substitute the blocks, but
> the code generator cannot handle the I/O blocks and deliver a standalone
> executable for real-time control. Also, when I put everything in my model
> to a single superblock and tried generating C code for it, the process kept
> running for hours without giving any output. I think it may be that my
> controller model has too many inputs and layers.
>
> I am trying the RTAI and see if I can move forward with it.
>
> Kind regards,
> Qian
>
> On Thu, Jul 12, 2018 at 8:50 AM, Clément David <
> clement.da...@esi-group.com> wrote:
>
>> Hello Qian,
>>
>> The most obvious solution is to use the Tools->Code generator that will
>> generate C code for the
>> schema (the calls to the simulation functions) and using the simulation
>> functions shipped with
>> Scilab (and freely available within Scilab source code).
>>
>> If you want to target a specific hardware, the STM32 toolbox [1] (based
>> on the same code generator)
>> will let you generate similar C code but optimized and with some blocks
>> for hardware support !
>>
>> [1]: https://atoms.scilab.org/toolboxes/xcos_stm32_toolbox
>>
>> --
>> Clément
>>
>> Le lundi 02 juillet 2018 à 15:58 -0700, qzhong a écrit :
>> > Dear all,
>> >
>> > I am working on a controller model in Xcos which takes inputs from
>> sensors
>> > and generates control decisions. The Xcos model has been built and
>> compiled
>> > with no error. The issue I have is that I need to generate a .dll file
>> from
>> > the Xcos model and use it in another simulation tool, similar to the
>> process
>> > done in Simulink by the Real Time Workshop module. I am not quite sure
>> > whether similar packages exist for Scilab/Xcos.
>> >
>> > Does anyone have a similar experience when using Scilab/Xcos? Any
>> comments
>> > would be much appreciated.
>> >
>> > Qian
>> >
>> >
>> >
>> > --
>> > Sent from: http://mailinglists.scilab.org/Scilab-users-Mailing-Lists-
>> Archives-f2602246.html
>> > ___
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>> users@lists.scilab.org
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>>
>
>
>
> --
> Qian Zhong
> Graduate
> Department of Mechanical Engineering
> University of California, Berkeley
>
>
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Re: [Scilab-users] From Xcos model to DLL

2018-07-12 Thread Q Z
Hi Clément,

Thanks for the suggestions! I have tried the code generator in Xcos.
However, it seems the C code was generated to substitute the blocks, but
the code generator cannot handle the I/O blocks and deliver a standalone
executable for real-time control. Also, when I put everything in my model
to a single superblock and tried generating C code for it, the process kept
running for hours without giving any output. I think it may be that my
controller model has too many inputs and layers.

I am trying the RTAI and see if I can move forward with it.

Kind regards,
Qian

On Thu, Jul 12, 2018 at 8:50 AM, Clément David 
wrote:

> Hello Qian,
>
> The most obvious solution is to use the Tools->Code generator that will
> generate C code for the
> schema (the calls to the simulation functions) and using the simulation
> functions shipped with
> Scilab (and freely available within Scilab source code).
>
> If you want to target a specific hardware, the STM32 toolbox [1] (based on
> the same code generator)
> will let you generate similar C code but optimized and with some blocks
> for hardware support !
>
> [1]: https://atoms.scilab.org/toolboxes/xcos_stm32_toolbox
>
> --
> Clément
>
> Le lundi 02 juillet 2018 à 15:58 -0700, qzhong a écrit :
> > Dear all,
> >
> > I am working on a controller model in Xcos which takes inputs from
> sensors
> > and generates control decisions. The Xcos model has been built and
> compiled
> > with no error. The issue I have is that I need to generate a .dll file
> from
> > the Xcos model and use it in another simulation tool, similar to the
> process
> > done in Simulink by the Real Time Workshop module. I am not quite sure
> > whether similar packages exist for Scilab/Xcos.
> >
> > Does anyone have a similar experience when using Scilab/Xcos? Any
> comments
> > would be much appreciated.
> >
> > Qian
> >
> >
> >
> > --
> > Sent from: http://mailinglists.scilab.org/Scilab-users-Mailing-
> Lists-Archives-f2602246.html
> > ___
> > users mailing list
> > users@lists.scilab.org
> > http://lists.scilab.org/mailman/listinfo/users
> ___
> users mailing list
> users@lists.scilab.org
> http://lists.scilab.org/mailman/listinfo/users
>



-- 
Qian Zhong
Graduate
Department of Mechanical Engineering
University of California, Berkeley
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Re: [Scilab-users] From Xcos model to DLL

2018-07-12 Thread Clément David
Hello Qian,

The most obvious solution is to use the Tools->Code generator that will 
generate C code for the
schema (the calls to the simulation functions) and using the simulation 
functions shipped with
Scilab (and freely available within Scilab source code).

If you want to target a specific hardware, the STM32 toolbox [1] (based on the 
same code generator)
will let you generate similar C code but optimized and with some blocks for 
hardware support !

[1]: https://atoms.scilab.org/toolboxes/xcos_stm32_toolbox

--
Clément

Le lundi 02 juillet 2018 à 15:58 -0700, qzhong a écrit :
> Dear all,
> 
> I am working on a controller model in Xcos which takes inputs from sensors
> and generates control decisions. The Xcos model has been built and compiled
> with no error. The issue I have is that I need to generate a .dll file from
> the Xcos model and use it in another simulation tool, similar to the process
> done in Simulink by the Real Time Workshop module. I am not quite sure
> whether similar packages exist for Scilab/Xcos. 
> 
> Does anyone have a similar experience when using Scilab/Xcos? Any comments
> would be much appreciated.
> 
> Qian
> 
> 
> 
> --
> Sent from: 
> http://mailinglists.scilab.org/Scilab-users-Mailing-Lists-Archives-f2602246.html
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Re: [Scilab-users] Sockets in scilab 6.0

2018-07-12 Thread Samuel Gougeon

Le 21/06/2018 à 22:23, James Holland a écrit :

.../...

I've modified the write routine from this:


function SOCKET_write(id,commande)
TCL_EvalStr([   "puts $tclsocket"+string(id)+" 
"""+commande+ascii(10)+;
"flush $tclsocket"+string(id)]);
endfunction

to this:

function SOCKET_write(id,commande)
TCL_EvalStr([   "puts $tclsocket"+string(id)+"" ""+commande+"";
"flush $tclsocket"+string(id)]);

endfunction

That has already removed some spurious LF/CRs.
Putty also works OK and doesn't add the CR/LF at the end.


Agreed. I will push this proposal in the next release.

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Re: [Scilab-users] Sockets in scilab 6.0

2018-07-12 Thread James Holland
I was able to compile for Scilab 6.0 by making a couple of small changes to
the builder script
I haven't had any time to look at this recently but I did try running a
simple Tcl/Tk script directly and was having issues getting the data back so
I am sure its not a Scilab issue. I have some concerns regarding the use of
'gets' when using binary mode, I am planning on trying 'read' instead. I
wonder if the script only returns data when the buffer is full and therefore
gets is not looking for an EOL terminator.
The single quote issue I was able to resolve using an example I found
on-line, I will look for those details.



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Re: [Scilab-users] Sockets in scilab 6.0

2018-07-12 Thread Samuel Gougeon

Hello James,

A new release of the socket_toolbox is now available on ATOMS (version 
2.0.2):

https://atoms.scilab.org/toolboxes/socket_toolbox
It is recompiled for Scilab 6.0 and is now visible and installable in a 
straightforward way with Scilab 6.


Some of the issues that you have met and described are fixed (or 
attenuated):

Please see the CHANGES 2.0.1 => 2.0.2  section in the description.

As indicated in the WARNING section, socket_toolbox for Scilab 6.0 may 
be affected by the bug http://bugzilla.scilab.org/15607 that is specific 
to Scilab 6.
However, when trying some simple requests, even the former 
socket_toolbox release made Scilab 5.5.2 crashed.


The "sync" option is now used in SOCKET_read() to improve 
synchronization issues yielding the "mat" error. But there are still 
some issues: for a same given request, sometimes SOCKET_read() returns 
successfully, sometimes it does not return at all.
Despite i think 2.0.2 is better as well for Scilab 5.5, i did not push 
any binaries for Scilab 5.5 for it.


May be some parts of SOCKET_read() would deserve being rewritten.
As well, SOCKET_pause() used in SOCKET_query() looks a bit strange to me,
instead of simply using sleep().

It looks also that when the returned content has some single quotes ', 
it makes troubles with SOCKET_read(). This was clearly a part of the 
issue with the demo pointing to www.google.fr.
I have tried to protect ' as " already are, but it does not work. More 
work is needed on this side.


I hope this release will improve the situation for your usage cases.
Please do not hesitate to report your trials results on the ATOMS page.

Best regards
Samuel

Le 27/06/2018 à 09:35, James Holland a écrit :

Hello Adrian
I have inmode outmode working now, I didn't initially realise that the curly
brackets are supposed to be included, I suspect there is a bug there because
binary and lf behave the same, the LF is always appended.
The flush I need because I'm not (or shouldn't be) sending a LF.
I was wondering if the problem is that the scilab script and the TCL are
executing simultaneously and I need to somehow wait for the TCL to finish.
I've downloaded TCL now, I will try running the same code directly.



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